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From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-mtd@lists.infradead.org
Subject: [PATCH 2/2] mtd: spi-nor: refine Spansion S25FL512S ID
Date: Wed, 16 Jan 2019 20:53:25 +0300	[thread overview]
Message-ID: <09a2508e-f63e-4804-bf11-76832faae1f5@cogentembedded.com> (raw)
In-Reply-To: <610761cf-5a19-c182-07d8-8d118ca20035@cogentembedded.com>

Spansion S25FL512S ID is erroneously using 5-byte JEDEC ID, while the chip
family ID is stored in the 6th byte. Due to using only 5-byte ID, it's also
covering S25FS512S and now that we have added 6-byte ID for that chip, we
can convert S25FL512S to using a proper 6-byte ID as well...

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
 drivers/mtd/spi-nor/spi-nor.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Index: linux-mtd/drivers/mtd/spi-nor/spi-nor.c
===================================================================
--- linux-mtd.orig/drivers/mtd/spi-nor/spi-nor.c
+++ linux-mtd/drivers/mtd/spi-nor/spi-nor.c
@@ -1887,8 +1887,8 @@ static const struct flash_info spi_nor_i
 	{ "s25sl064p",  INFO(0x010216, 0x4d00,  64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
 	{ "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, USE_CLSR) },
 	{ "s25fl256s1", INFO(0x010219, 0x4d01,  64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
+	{ "s25fl512s",  INFO6(0x010220, 0x4d0080, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ "s25fs512s",  INFO6(0x010220, 0x4d0081, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
-	{ "s25fl512s",  INFO(0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) },
 	{ "s70fl01gs",  INFO(0x010221, 0x4d00, 256 * 1024, 256, 0) },
 	{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024,  64, 0) },
 	{ "s25sl12801", INFO(0x012018, 0x0301,  64 * 1024, 256, 0) },

  parent reply	other threads:[~2019-01-16 17:53 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-16 17:49 [PATCH 0/2] Untangle Spansion S25F{L|S}512S chip IDs Sergei Shtylyov
2019-01-16 17:51 ` [PATCH 1/2] mtd: spi-nor: add Spansion S25FS512S ID Sergei Shtylyov
2019-01-22 10:18   ` Tudor.Ambarus
2019-01-24 11:55   ` [1/2] " Boris Brezillon
2019-01-16 17:53 ` Sergei Shtylyov [this message]
2019-01-22 10:18   ` [PATCH 2/2] mtd: spi-nor: refine Spansion S25FL512S ID Tudor.Ambarus
2019-01-24 11:55   ` [2/2] " Boris Brezillon
2019-03-05 14:05   ` [PATCH 2/2] " Geert Uytterhoeven
2019-03-05 14:05     ` Geert Uytterhoeven
2019-03-06 10:59     ` Tudor.Ambarus
2019-03-06 10:59       ` Tudor.Ambarus
2019-03-06 11:28     ` Tudor.Ambarus
2019-03-06 11:28       ` Tudor.Ambarus
2019-03-12 11:02     ` Geert Uytterhoeven
2019-03-12 11:02       ` Geert Uytterhoeven
2019-01-21  8:28 ` [PATCH 0/2] Untangle Spansion S25F{L|S}512S chip IDs Tudor.Ambarus
2019-01-21 17:40   ` Sergei Shtylyov
2019-05-31 18:31 ` [PATCH v4] mtd: devices: m25p80: Use the spi-mem dirmap API Sergei Shtylyov
2019-06-18  4:30   ` Vignesh Raghavendra
2019-07-03 20:26 ` [PATCH] mtd: chips: gen_probe: kill useless initializer in mtd_do_chip_probe() Sergei Shtylyov
2019-09-17  4:24   ` Vignesh Raghavendra
2019-09-17 19:28 ` [PATCH] mtd: cfi_util: use DIV_ROUND_UP() in cfi_udelay() Sergei Shtylyov
2019-09-17 19:43   ` Geert Uytterhoeven
2019-09-17 19:53     ` Sergei Shtylyov
2019-09-17 21:23       ` Geert Uytterhoeven
2019-09-18  5:45         ` Vignesh Raghavendra
2019-09-27 20:15           ` Sergei Shtylyov
2019-10-25 20:26 ` [PATCH] mtd: spi-nor: use spi-mem dirmap API Sergei Shtylyov
2019-10-26  7:36   ` Boris Brezillon
2019-11-07 18:51     ` Sergei Shtylyov
2019-11-07 20:49 ` [PATCH v2] " Sergei Shtylyov
2019-11-07 20:56   ` Sergei Shtylyov
2019-11-07 20:56   ` Sergei Shtylyov
2019-11-09 19:35   ` Boris Brezillon
2019-11-10 19:49     ` Sergei Shtylyov
2020-02-01 20:55 ` [PATCH] mtd: spi-nor: use le32_to_cpu_array() Sergei Shtylyov
2020-02-17  0:03   ` Tudor.Ambarus

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