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[62.143.94.109]) by smtp.gmail.com with ESMTPSA id y16-20020a056402271000b0042b6a84b230sm4559765edd.90.2022.05.25.08.17.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 May 2022 08:17:18 -0700 (PDT) Message-ID: <09b050e3-b8e2-fc58-c4cf-e1c81c5eac84@canonical.com> Date: Wed, 25 May 2022 17:17:17 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH 1/5] riscv: cpu_ops_sbi: Support for 64bit hartid Content-Language: en-US To: Sunil V L Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-efi@vger.kernel.org, Sunil V L , Paul Walmsley , Albert Ou , Thomas Gleixner , Atish Patra , Anup Patel , Marc Zyngier , Ard Biesheuvel , Daniel Lezcano , Palmer Dabbelt References: <20220525151106.2176147-1-sunilvl@ventanamicro.com> <20220525151106.2176147-2-sunilvl@ventanamicro.com> From: Heinrich Schuchardt In-Reply-To: <20220525151106.2176147-2-sunilvl@ventanamicro.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/25/22 17:11, Sunil V L wrote: > The hartid can be a 64bit value on RV64 platforms. This patch modifies > the hartid variable type to unsigned long so that it can hold 64bit > value on RV64 platforms. > > Signed-off-by: Sunil V L Reviewed-by: Heinrich Schuchardt > --- > arch/riscv/kernel/cpu_ops_sbi.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c > index 4f5a6f84e2a4..efa0f0816634 100644 > --- a/arch/riscv/kernel/cpu_ops_sbi.c > +++ b/arch/riscv/kernel/cpu_ops_sbi.c > @@ -65,7 +65,7 @@ static int sbi_hsm_hart_get_status(unsigned long hartid) > static int sbi_cpu_start(unsigned int cpuid, struct task_struct *tidle) > { > unsigned long boot_addr = __pa_symbol(secondary_start_sbi); > - int hartid = cpuid_to_hartid_map(cpuid); > + unsigned long hartid = cpuid_to_hartid_map(cpuid); > unsigned long hsm_data; > struct sbi_hart_boot_data *bdata = &per_cpu(boot_data, cpuid); > > @@ -107,7 +107,7 @@ static void sbi_cpu_stop(void) > static int sbi_cpu_is_stopped(unsigned int cpuid) > { > int rc; > - int hartid = cpuid_to_hartid_map(cpuid); > + unsigned long hartid = cpuid_to_hartid_map(cpuid); > > rc = sbi_hsm_hart_get_status(hartid); > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0383AC433EF for ; Wed, 25 May 2022 15:17:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: Content-Transfer-Encoding:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To:Subject: MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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[62.143.94.109]) by smtp.gmail.com with ESMTPSA id y16-20020a056402271000b0042b6a84b230sm4559765edd.90.2022.05.25.08.17.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 May 2022 08:17:18 -0700 (PDT) Message-ID: <09b050e3-b8e2-fc58-c4cf-e1c81c5eac84@canonical.com> Date: Wed, 25 May 2022 17:17:17 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.0 Subject: Re: [PATCH 1/5] riscv: cpu_ops_sbi: Support for 64bit hartid Content-Language: en-US To: Sunil V L Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-efi@vger.kernel.org, Sunil V L , Paul Walmsley , Albert Ou , Thomas Gleixner , Atish Patra , Anup Patel , Marc Zyngier , Ard Biesheuvel , Daniel Lezcano , Palmer Dabbelt References: <20220525151106.2176147-1-sunilvl@ventanamicro.com> <20220525151106.2176147-2-sunilvl@ventanamicro.com> From: Heinrich Schuchardt In-Reply-To: <20220525151106.2176147-2-sunilvl@ventanamicro.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220525_081728_135746_CEDD8A38 X-CRM114-Status: GOOD ( 17.85 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org On 5/25/22 17:11, Sunil V L wrote: > The hartid can be a 64bit value on RV64 platforms. This patch modifies > the hartid variable type to unsigned long so that it can hold 64bit > value on RV64 platforms. > > Signed-off-by: Sunil V L Reviewed-by: Heinrich Schuchardt > --- > arch/riscv/kernel/cpu_ops_sbi.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/kernel/cpu_ops_sbi.c b/arch/riscv/kernel/cpu_ops_sbi.c > index 4f5a6f84e2a4..efa0f0816634 100644 > --- a/arch/riscv/kernel/cpu_ops_sbi.c > +++ b/arch/riscv/kernel/cpu_ops_sbi.c > @@ -65,7 +65,7 @@ static int sbi_hsm_hart_get_status(unsigned long hartid) > static int sbi_cpu_start(unsigned int cpuid, struct task_struct *tidle) > { > unsigned long boot_addr = __pa_symbol(secondary_start_sbi); > - int hartid = cpuid_to_hartid_map(cpuid); > + unsigned long hartid = cpuid_to_hartid_map(cpuid); > unsigned long hsm_data; > struct sbi_hart_boot_data *bdata = &per_cpu(boot_data, cpuid); > > @@ -107,7 +107,7 @@ static void sbi_cpu_stop(void) > static int sbi_cpu_is_stopped(unsigned int cpuid) > { > int rc; > - int hartid = cpuid_to_hartid_map(cpuid); > + unsigned long hartid = cpuid_to_hartid_map(cpuid); > > rc = sbi_hsm_hart_get_status(hartid); > _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv