From mboxrd@z Thu Jan 1 00:00:00 1970 From: Auer, Lukas Date: Sun, 16 Sep 2018 20:56:40 +0000 Subject: [U-Boot] [RESEND PATCH v2 11/15] riscv: Make start.S available for all targets In-Reply-To: <1536641694-4200-12-git-send-email-bmeng.cn@gmail.com> References: <1536641694-4200-1-git-send-email-bmeng.cn@gmail.com> <1536641694-4200-12-git-send-email-bmeng.cn@gmail.com> Message-ID: <09e62cda2c4a0207e49692d7d69691618cb35c2d.camel@aisec.fraunhofer.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Mon, 2018-09-10 at 21:54 -0700, Bin Meng wrote: > Currently start.S is inside arch/riscv/cpu/ax25/, but it can be > common for all RISC-V targets. > > Signed-off-by: Bin Meng > Reviewed-by: Lukas Auer