From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Liu Yu-B13201" Subject: RE: [PATCH 7/9] KVM: PPC: Emulate trap SRR1 flags properly Date: Thu, 21 Jan 2010 16:09:43 +0800 Message-ID: <0A1FE637C2C7E148B9573BB60CC630E5712289@zch01exm26.fsl.freescale.net> References: <1262915889-11526-1-git-send-email-agraf@suse.de> <1262915889-11526-8-git-send-email-agraf@suse.de> Mime-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: QUOTED-PRINTABLE Cc: , "kvm-ppc" , "Benjamin Herrenschmidt" To: "Hollis Blanchard" , "Alexander Graf" Return-path: Content-class: urn:content-classes:message In-Reply-To: Sender: kvm-ppc-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: kvm.vger.kernel.org =20 > -----Original Message----- > From: kvm-ppc-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org=20 > [mailto:kvm-ppc-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org] On Behalf Of Hollis Blanchard > Sent: Saturday, January 09, 2010 3:30 AM > To: Alexander Graf > Cc: kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; kvm-ppc; Benjamin Herrenschmidt; Liu Yu > Subject: Re: [PATCH 7/9] KVM: PPC: Emulate trap SRR1 flags properly >=20 > > diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c > > index 338baf9..e283e44 100644 > > --- a/arch/powerpc/kvm/booke.c > > +++ b/arch/powerpc/kvm/booke.c > > @@ -82,8 +82,9 @@ static void=20 > kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, > > =A0 =A0 =A0 =A0set_bit(priority, &vcpu->arch.pending_exceptions); > > =A0} > > > > -void kvmppc_core_queue_program(struct kvm_vcpu *vcpu) > > +void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags) > > =A0{ > > + =A0 =A0 =A0 /* BookE does flags in ESR, so ignore those we get he= re */ > > =A0 =A0 =A0 =A0kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGR= AM); > > =A0} >=20 > Actually, I think Book E prematurely sets ESR, since it's done before > the program interrupt is actually delivered. Architecturally, I'm not > sure if it's a problem, but philosophically I've always wanted it to > work the way you've just implemented for Book S. >=20 ESR is updated not only by program but by data_tlb, data_storage, etc. Should we rearrange them all?=20 Also DEAR has the same situation as ESR. Should it be updated when we decide to inject interrupt to guest? From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Liu Yu-B13201" Date: Thu, 21 Jan 2010 08:09:43 +0000 Subject: RE: [PATCH 7/9] KVM: PPC: Emulate trap SRR1 flags properly Message-Id: <0A1FE637C2C7E148B9573BB60CC630E5712289@zch01exm26.fsl.freescale.net> List-Id: References: <1262915889-11526-1-git-send-email-agraf@suse.de> <1262915889-11526-8-git-send-email-agraf@suse.de> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable To: Hollis Blanchard , Alexander Graf Cc: kvm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, kvm-ppc , Benjamin Herrenschmidt =20 > -----Original Message----- > From: kvm-ppc-owner@vger.kernel.org=20 > [mailto:kvm-ppc-owner@vger.kernel.org] On Behalf Of Hollis Blanchard > Sent: Saturday, January 09, 2010 3:30 AM > To: Alexander Graf > Cc: kvm@vger.kernel.org; kvm-ppc; Benjamin Herrenschmidt; Liu Yu > Subject: Re: [PATCH 7/9] KVM: PPC: Emulate trap SRR1 flags properly >=20 > > diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c > > index 338baf9..e283e44 100644 > > --- a/arch/powerpc/kvm/booke.c > > +++ b/arch/powerpc/kvm/booke.c > > @@ -82,8 +82,9 @@ static void=20 > kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, > > =A0 =A0 =A0 =A0set_bit(priority, &vcpu->arch.pending_exceptions); > > =A0} > > > > -void kvmppc_core_queue_program(struct kvm_vcpu *vcpu) > > +void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags) > > =A0{ > > + =A0 =A0 =A0 /* BookE does flags in ESR, so ignore those we get here */ > > =A0 =A0 =A0 =A0kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); > > =A0} >=20 > Actually, I think Book E prematurely sets ESR, since it's done before > the program interrupt is actually delivered. Architecturally, I'm not > sure if it's a problem, but philosophically I've always wanted it to > work the way you've just implemented for Book S. >=20 ESR is updated not only by program but by data_tlb, data_storage, etc. Should we rearrange them all?=20 Also DEAR has the same situation as ESR. Should it be updated when we decide to inject interrupt to guest?