RE: Unstable bits and JFFS2

[Atlant Schmidt <aschmidt@dekaresearch.com>]

Artem:

> Yeah, thanks for correcting. Yeah, read/write-disturb may make bits
> to become unstable, but we assume this is a slow process which will
> gradually make more and more bits flip and ECC will take care of
> that. So I think Matej can exclude this.

  Unfortunately, ECC can only fix those PEBs that
  are actually read. If one of the PEBs in your
  filesystem is being used entirely to contain
  obscure data that only gets read once in a
  blue moon (i.e., very rarely), then multiple
  read-/write-disturbs can hit accumulate in
  that PEB and when it is finally read, it may
  already contains too many errors to be
  corrected by the ECC.

  We've seen this exact scenario occur with the
  current UBI/UBIfs and will be implementing a
  userland "scrubbing" system to ensure that
  every PEB gets read at least once in a while
  (e.g., weekly or whatever interval seems right).

                              Atlant

-----Original Message-----
From: Artem Bityutskiy [mailto:dedekind1@gmail.com]
Sent: Friday, April 13, 2012 12:28
To: Atlant Schmidt
Cc: 'Matej Kupljen'; Brian Norris; linux-mtd
Subject: RE: Unstable bits and JFFS2

On Wed, 2012-04-04 at 06:54 -0400, Atlant Schmidt wrote:
> Matej:
>
> > Artem, you said that this unstable bits only happen
> > during power cuts, is this right? Would those appear
> > also on simulated power cuts, the ones that integck
> > can produce?
>
>   (Note: This isn't Artem replying.)
>
>   Unstable bits can happen anytime, but *REAL* power-cuts
>   while writing are certainly a great way to produce them;
>   after all, if you've only transferred half the electrons
>   to the floating gate when power goes away, well, that
>   Flash cell is now a roll-of-the-quantum-dice each time
>   you read it.
>
>   Simulated power cuts (that just stop the software
>   processing at arbitrary and random points) can't
>   produce this effect.
>
>   But any time a read-disturb or write-disturb takes place,
>   there's some probability that a Flash cell will be left
>   with a "near-threshold" charge on the floating gate, so
>   unstable bits are a fact of life that must be faced by
>   any software that drives NAND Flash memory chips. This
>   is, of course, especially true of MLC chips and even
>   more-true for TLC chips (with three bits per cell).

Yeah, thanks for correcting. Yeah, read/write-disturb may make bits to
become unstable, but we assume this is a slow process which will
gradually make more and more bits flip and ECC will take care of that.
So I think Matej can exclude this.

--
Best Regards,
Artem Bityutskiy

This e-mail and the information, including any attachments, it contains are intended to be a confidential communication only to the person or entity to whom it is addressed and may contain information that is privileged. If the reader of this message is not the intended recipient, you are hereby notified that any dissemination, distribution or copying of this communication is strictly prohibited. If you have received this communication in error, please immediately notify the sender and destroy the original message.

Thank you.

Please consider the environment before printing this email.