From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Xu, Rosen" Subject: Re: [PATCH v3 3/6] mk/rte.app.mk: Add Intel FPGA Bus Build Configuration Macro To App Script Date: Sat, 31 Mar 2018 16:27:02 +0000 Message-ID: <0E78D399C70DA940A335608C6ED296D739F267C2@SHSMSX104.ccr.corp.intel.com> References: <1521553556-62982-1-git-send-email-rosen.xu@intel.com> <1522229396-17898-1-git-send-email-rosen.xu@intel.com> <1522229396-17898-4-git-send-email-rosen.xu@intel.com> <20180328132834.pw7babp7o2uq7w23@bidouze.vm.6wind.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Cc: "dev@dpdk.org" , "Doherty, Declan" , "Richardson, Bruce" , "shreyansh.jain@nxp.com" , "Zhang, Tianfei" , "Wu, Hao" To: "gaetan.rivet@6wind.com" Return-path: Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by dpdk.org (Postfix) with ESMTP id 630C62BDF for ; Sat, 31 Mar 2018 18:27:07 +0200 (CEST) In-Reply-To: <20180328132834.pw7babp7o2uq7w23@bidouze.vm.6wind.com> Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Ga=EBtan Rivet [mailto:gaetan.rivet@6wind.com] > Sent: Wednesday, March 28, 2018 21:29 > To: Xu, Rosen > Cc: dev@dpdk.org; Doherty, Declan ; > Richardson, Bruce ; shreyansh.jain@nxp.com; > Zhang, Tianfei ; Wu, Hao > Subject: Re: [PATCH v3 3/6] mk/rte.app.mk: Add Intel FPGA Bus Build > Configuration Macro To App Script >=20 > On Wed, Mar 28, 2018 at 05:29:53PM +0800, Rosen Xu wrote: > > Signed-off-by: Rosen Xu > > --- > > mk/rte.app.mk | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/mk/rte.app.mk b/mk/rte.app.mk index 3eb41d1..958b6b5 > > 100644 > > --- a/mk/rte.app.mk > > +++ b/mk/rte.app.mk > > @@ -107,6 +107,9 @@ _LDLIBS-$(CONFIG_RTE_LIBRTE_CMDLINE) +=3D - > lrte_cmdline > > _LDLIBS-$(CONFIG_RTE_LIBRTE_REORDER) +=3D -lrte_reorder > > _LDLIBS-$(CONFIG_RTE_LIBRTE_SCHED) +=3D -lrte_sched > > > > +_LDLIBS-$(CONFIG_RTE_LIBRTE_IFPGA_BUS) +=3D -lrte_bus_ifpga > > +_LDLIBS-$(CONFIG_RTE_LIBRTE_IFPGA_RAWDEV) +=3D - > lrte_ifpga_rawdev > > + >=20 > This however, should trigger a link error given that the relevant librari= es are > not yet available. Same as before, please squash with the patch introduci= ng > the libraries. It's done by PATCH v4. > > ifeq ($(CONFIG_RTE_EXEC_ENV_LINUXAPP),y) > > _LDLIBS-$(CONFIG_RTE_LIBRTE_KNI) +=3D -lrte_kni > > endif > > -- > > 1.8.3.1 > > >=20 > -- > Ga=EBtan Rivet > 6WIND