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* Registering interrupt handler for performance counter overflow
@ 2019-05-19 18:46 ` Eitan Kaplan
  0 siblings, 0 replies; 6+ messages in thread
From: Eitan Kaplan @ 2019-05-19 18:46 UTC (permalink / raw)
  To: xen-devel


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Hi all,

I am a computer engineering student at Columbia University. This is my
first time writing to this list (please let me know if this isn't the place
for this type of question!).

I am working with a professor on a project to mitigate Spectre and Meltdown
(and other similar cache timing side-channel attacks).  We are using Xen
and modifying its source as a way of modeling the affect certain potential
hardware changes. As part of that project, we need to use the performance
counters to generate interrupts at certain microarchitectural events.  I
have successfully added into xen/arch/x86/setup.c a few lines to setup the
(Intel Sandy Bridge) performance counter control MSRs and set the counter
itself to a few below overflow.  All that's missing is a simple interrupt
handler that will reset the counter to a few below overflow (and perhaps do
some logging).

I am having trouble figuring out how to register my handler in Xen.  I
assume that I have to call request_irq(), but I am not sure how to set all
the arguments for that call.  Would anyone be able to give me any
pointers?  Suggestions or pointers to resources/examples for registering
interrupt handlers in Xen would be really helpful!

Alternatively, is there an existing interrupt handler that is already setup
for PMC overflow interrupts that I might be able to tweak?

Thank you!
Eitan Kaplan

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_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Xen-devel] Registering interrupt handler for performance counter overflow
@ 2019-05-19 18:46 ` Eitan Kaplan
  0 siblings, 0 replies; 6+ messages in thread
From: Eitan Kaplan @ 2019-05-19 18:46 UTC (permalink / raw)
  To: xen-devel


[-- Attachment #1.1: Type: text/plain, Size: 1369 bytes --]

Hi all,

I am a computer engineering student at Columbia University. This is my
first time writing to this list (please let me know if this isn't the place
for this type of question!).

I am working with a professor on a project to mitigate Spectre and Meltdown
(and other similar cache timing side-channel attacks).  We are using Xen
and modifying its source as a way of modeling the affect certain potential
hardware changes. As part of that project, we need to use the performance
counters to generate interrupts at certain microarchitectural events.  I
have successfully added into xen/arch/x86/setup.c a few lines to setup the
(Intel Sandy Bridge) performance counter control MSRs and set the counter
itself to a few below overflow.  All that's missing is a simple interrupt
handler that will reset the counter to a few below overflow (and perhaps do
some logging).

I am having trouble figuring out how to register my handler in Xen.  I
assume that I have to call request_irq(), but I am not sure how to set all
the arguments for that call.  Would anyone be able to give me any
pointers?  Suggestions or pointers to resources/examples for registering
interrupt handlers in Xen would be really helpful!

Alternatively, is there an existing interrupt handler that is already setup
for PMC overflow interrupts that I might be able to tweak?

Thank you!
Eitan Kaplan

[-- Attachment #1.2: Type: text/html, Size: 1535 bytes --]

[-- Attachment #2: Type: text/plain, Size: 157 bytes --]

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: Registering interrupt handler for performance counter overflow
@ 2019-05-20 10:52   ` Andrew Cooper
  0 siblings, 0 replies; 6+ messages in thread
From: Andrew Cooper @ 2019-05-20 10:52 UTC (permalink / raw)
  To: xen-devel

On 19/05/2019 19:46, Eitan Kaplan wrote:
> Hi all,
>
> I am a computer engineering student at Columbia University. This is my
> first time writing to this list (please let me know if this isn't the
> place for this type of question!).

This is indeed the correct place for this kind of question.

>
> I am working with a professor on a project to mitigate Spectre and
> Meltdown (and other similar cache timing side-channel attacks).  We
> are using Xen and modifying its source as a way of modeling the affect
> certain potential hardware changes. As part of that project, we need
> to use the performance counters to generate interrupts at certain
> microarchitectural events.  I have successfully added into
> xen/arch/x86/setup.c a few lines to setup the (Intel Sandy Bridge)
> performance counter control MSRs and set the counter itself to a few
> below overflow.  All that's missing is a simple interrupt handler that
> will reset the counter to a few below overflow (and perhaps do some
> logging).
>
> I am having trouble figuring out how to register my handler in Xen.  I
> assume that I have to call request_irq(), but I am not sure how to set
> all the arguments for that call.  Would anyone be able to give me any
> pointers?  Suggestions or pointers to resources/examples for
> registering interrupt handlers in Xen would be really helpful!
>
> Alternatively, is there an existing interrupt handler that is already
> setup for PMC overflow interrupts that I might be able to tweak?

In the Xen code, there are two uses performance counters.

One is the watchdog (cmdline "watchdog", xen/arch/x86/nmi.c) which uses
the unhalted cycles counter to generated an NMI on a periodic basis. 
See setup_apic_nmi_watchdog() for the setup details.

The second is the vpmu infrastructure (cmdline "vpmu"
xen/arch/x86/cpu/vpmu*) which is for virtualising the performance
counters for guest use, and is probably closer to what you're wanting. 
In particular, see how PMU_APIC_VECTOR is configured, which includes the
interrupt registration and LAPIC programming.

~Andrew

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [Xen-devel] Registering interrupt handler for performance counter overflow
@ 2019-05-20 10:52   ` Andrew Cooper
  0 siblings, 0 replies; 6+ messages in thread
From: Andrew Cooper @ 2019-05-20 10:52 UTC (permalink / raw)
  To: xen-devel

On 19/05/2019 19:46, Eitan Kaplan wrote:
> Hi all,
>
> I am a computer engineering student at Columbia University. This is my
> first time writing to this list (please let me know if this isn't the
> place for this type of question!).

This is indeed the correct place for this kind of question.

>
> I am working with a professor on a project to mitigate Spectre and
> Meltdown (and other similar cache timing side-channel attacks).  We
> are using Xen and modifying its source as a way of modeling the affect
> certain potential hardware changes. As part of that project, we need
> to use the performance counters to generate interrupts at certain
> microarchitectural events.  I have successfully added into
> xen/arch/x86/setup.c a few lines to setup the (Intel Sandy Bridge)
> performance counter control MSRs and set the counter itself to a few
> below overflow.  All that's missing is a simple interrupt handler that
> will reset the counter to a few below overflow (and perhaps do some
> logging).
>
> I am having trouble figuring out how to register my handler in Xen.  I
> assume that I have to call request_irq(), but I am not sure how to set
> all the arguments for that call.  Would anyone be able to give me any
> pointers?  Suggestions or pointers to resources/examples for
> registering interrupt handlers in Xen would be really helpful!
>
> Alternatively, is there an existing interrupt handler that is already
> setup for PMC overflow interrupts that I might be able to tweak?

In the Xen code, there are two uses performance counters.

One is the watchdog (cmdline "watchdog", xen/arch/x86/nmi.c) which uses
the unhalted cycles counter to generated an NMI on a periodic basis. 
See setup_apic_nmi_watchdog() for the setup details.

The second is the vpmu infrastructure (cmdline "vpmu"
xen/arch/x86/cpu/vpmu*) which is for virtualising the performance
counters for guest use, and is probably closer to what you're wanting. 
In particular, see how PMU_APIC_VECTOR is configured, which includes the
interrupt registration and LAPIC programming.

~Andrew

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: Registering interrupt handler for performance counter overflow
@ 2019-05-20 10:55   ` Andrew Cooper
  0 siblings, 0 replies; 6+ messages in thread
From: Andrew Cooper @ 2019-05-20 10:55 UTC (permalink / raw)
  To: e.kaplan, xen-devel

On 19/05/2019 19:46, Eitan Kaplan wrote:
> Hi all,
>
> I am a computer engineering student at Columbia University. This is my
> first time writing to this list (please let me know if this isn't the
> place for this type of question!).

(Apologies for the repost - I accidentally dropped the CC list the first
time around.)

This is indeed the correct place for this kind of question.

>
> I am working with a professor on a project to mitigate Spectre and
> Meltdown (and other similar cache timing side-channel attacks).  We
> are using Xen and modifying its source as a way of modeling the affect
> certain potential hardware changes. As part of that project, we need
> to use the performance counters to generate interrupts at certain
> microarchitectural events.  I have successfully added into
> xen/arch/x86/setup.c a few lines to setup the (Intel Sandy Bridge)
> performance counter control MSRs and set the counter itself to a few
> below overflow.  All that's missing is a simple interrupt handler that
> will reset the counter to a few below overflow (and perhaps do some
> logging).
>
> I am having trouble figuring out how to register my handler in Xen.  I
> assume that I have to call request_irq(), but I am not sure how to set
> all the arguments for that call.  Would anyone be able to give me any
> pointers?  Suggestions or pointers to resources/examples for
> registering interrupt handlers in Xen would be really helpful!
>
> Alternatively, is there an existing interrupt handler that is already
> setup for PMC overflow interrupts that I might be able to tweak?

In the Xen code, there are two uses performance counters.

One is the watchdog (cmdline "watchdog", xen/arch/x86/nmi.c) which uses
the unhalted cycles counter to generated an NMI on a periodic basis. 
See setup_apic_nmi_watchdog() for the setup details.

The second is the vpmu infrastructure (cmdline "vpmu"
xen/arch/x86/cpu/vpmu*) which is for virtualising the performance
counters for guest use, and is probably closer to what you're wanting. 
In particular, see how PMU_APIC_VECTOR is configured, which includes the
interrupt registration and LAPIC programming.

~Andrew

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [Xen-devel] Registering interrupt handler for performance counter overflow
@ 2019-05-20 10:55   ` Andrew Cooper
  0 siblings, 0 replies; 6+ messages in thread
From: Andrew Cooper @ 2019-05-20 10:55 UTC (permalink / raw)
  To: e.kaplan, xen-devel

On 19/05/2019 19:46, Eitan Kaplan wrote:
> Hi all,
>
> I am a computer engineering student at Columbia University. This is my
> first time writing to this list (please let me know if this isn't the
> place for this type of question!).

(Apologies for the repost - I accidentally dropped the CC list the first
time around.)

This is indeed the correct place for this kind of question.

>
> I am working with a professor on a project to mitigate Spectre and
> Meltdown (and other similar cache timing side-channel attacks).  We
> are using Xen and modifying its source as a way of modeling the affect
> certain potential hardware changes. As part of that project, we need
> to use the performance counters to generate interrupts at certain
> microarchitectural events.  I have successfully added into
> xen/arch/x86/setup.c a few lines to setup the (Intel Sandy Bridge)
> performance counter control MSRs and set the counter itself to a few
> below overflow.  All that's missing is a simple interrupt handler that
> will reset the counter to a few below overflow (and perhaps do some
> logging).
>
> I am having trouble figuring out how to register my handler in Xen.  I
> assume that I have to call request_irq(), but I am not sure how to set
> all the arguments for that call.  Would anyone be able to give me any
> pointers?  Suggestions or pointers to resources/examples for
> registering interrupt handlers in Xen would be really helpful!
>
> Alternatively, is there an existing interrupt handler that is already
> setup for PMC overflow interrupts that I might be able to tweak?

In the Xen code, there are two uses performance counters.

One is the watchdog (cmdline "watchdog", xen/arch/x86/nmi.c) which uses
the unhalted cycles counter to generated an NMI on a periodic basis. 
See setup_apic_nmi_watchdog() for the setup details.

The second is the vpmu infrastructure (cmdline "vpmu"
xen/arch/x86/cpu/vpmu*) which is for virtualising the performance
counters for guest use, and is probably closer to what you're wanting. 
In particular, see how PMU_APIC_VECTOR is configured, which includes the
interrupt registration and LAPIC programming.

~Andrew

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xenproject.org
https://lists.xenproject.org/mailman/listinfo/xen-devel

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2019-05-20 10:55 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-05-19 18:46 Registering interrupt handler for performance counter overflow Eitan Kaplan
2019-05-19 18:46 ` [Xen-devel] " Eitan Kaplan
2019-05-20 10:52 ` Andrew Cooper
2019-05-20 10:52   ` [Xen-devel] " Andrew Cooper
2019-05-20 10:55 ` Andrew Cooper
2019-05-20 10:55   ` [Xen-devel] " Andrew Cooper

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