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From: Sowjanya Komatineni <skomatineni@nvidia.com>
To: Rob Herring <robh+dt@kernel.org>
Cc: Thierry Reding <thierry.reding@gmail.com>,
	Jon Hunter <jonathanh@nvidia.com>, <devicetree@vger.kernel.org>,
	"open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)" 
	<linux-ide@vger.kernel.org>,
	linux-tegra <linux-tegra@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 3/6] dt-bindings: ata: tegra: Convert binding documentation to YAML
Date: Mon, 23 Nov 2020 11:01:42 -0800	[thread overview]
Message-ID: <0a6e99c8-9149-8756-3511-d4cb1814d3c6@nvidia.com> (raw)
In-Reply-To: <CAL_JsqKkGmRwsv48xdX7xMSEaTSqdEnWuy0E19eohBxJKMywJg@mail.gmail.com>


On 11/20/20 12:17 PM, Rob Herring wrote:
> On Fri, Nov 13, 2020 at 1:36 PM Sowjanya Komatineni
> <skomatineni@nvidia.com> wrote:
>> This patch converts text based dt-binding document to YAML based
>> dt-binding document.
>>
>> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
>> ---
>>   .../devicetree/bindings/ata/nvidia,tegra-ahci.yaml | 137 +++++++++++++++++++++
>>   .../bindings/ata/nvidia,tegra124-ahci.txt          |  44 -------
>>   2 files changed, 137 insertions(+), 44 deletions(-)
>>   create mode 100644 Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml
>>   delete mode 100644 Documentation/devicetree/bindings/ata/nvidia,tegra124-ahci.txt
>>
>> diff --git a/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml b/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml
>> new file mode 100644
>> index 0000000..dbbe460
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/ata/nvidia,tegra-ahci.yaml
>> @@ -0,0 +1,137 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/ata/nvidia,tegra-ahci.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Tegra AHCI SATA Controller
>> +
>> +maintainers:
>> +  - Thierry Reding <thierry.reding@gmail.com>
>> +  - Jonathan Hunter <jonathanh@nvidia.com>
>> +
>> +properties:
>> +  compatible:
>> +    enum:
>> +      - nvidia,tegra124-ahci
>> +      - nvidia,tegra132-ahci
>> +      - nvidia,tegra210-ahci
>> +
>> +  reg:
>> +    minItems: 2
>> +    maxItems: 3
>> +    items:
>> +      - description: AHCI registers
>> +      - description: SATA configuration and IPFS registers
>> +      - description: SATA AUX registers
>> +
>> +  interrupts:
>> +    maxItems: 1
>> +
>> +  clock-names:
>> +    items:
>> +      - const: sata
>> +      - const: sata-oob
>> +
>> +  clocks:
>> +    maxItems: 2
>> +
>> +  reset-names:
>> +    items:
>> +      - const: sata
>> +      - const: sata-cold
>> +      - const: sata-oob
>> +
>> +  resets:
>> +    maxItems: 3
>> +
>> +  phy-names:
>> +    items:
>> +      - const: sata-0
>> +
>> +  phys:
>> +    maxItems: 1
>> +
>> +  hvdd-supply:
>> +    description: SATA HVDD regulator supply.
>> +
>> +  vddio-supply:
>> +    description: SATA VDDIO regulator supply.
>> +
>> +  avdd-supply:
>> +    description: SATA AVDD regulator supply.
>> +
>> +  target-5v-supply:
>> +    description: SATA 5V power regulator supply.
>> +
>> +  target-12v-supply:
>> +    description: SATA 12V power regulator supply.
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - interrupts
>> +  - clock-names
>> +  - clocks
>> +  - reset-names
>> +  - resets
>> +
>> +allOf:
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            enum:
>> +              - nvidia,tegra124-ahci
>> +              - nvidia,tegra132-ahci
>> +    then:
>> +      properties:
>> +        reg:
>> +          maxItems: 2
>> +        reset-names:
>> +          minItems: 3
>> +        resets:
>> +          minItems: 3
>> +      required:
>> +        - phys
>> +        - phy-names
>> +        - hvdd-supply
>> +        - vddio-supply
>> +        - avdd-supply
>> +
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            enum:
>> +              - nvidia,tegra210-ahci
>> +    then:
>> +      properties:
>> +        reg:
>> +          minItems: 3
>> +        reset-names:
>> +          minItems: 3
>> +        resets:
>> +          minItems: 3
>> +
>> +additionalProperties: true
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/clock/tegra210-car.h>
>> +    #include <dt-bindings/reset/tegra210-car.h>
>> +
>> +    sata@70020000 {
>> +            compatible = "nvidia,tegra210-ahci";
>> +            reg = <0x0 0x70027000 0x0 0x00002000>, /* AHCI */
>> +                  <0x0 0x70020000 0x0 0x00007000>, /* SATA */
>> +                  <0x0 0x70001100 0x0 0x00010000>; /* SATA AUX */
> The default sizes are 1 cell for address and size, so this will give
> you warnings. You either need to adjust the entries here or add a
> parent node setting the sizes to 2 cells.

Thanks Rob.

tegra210.dtsi already has address and size set to 2 cells in parent node 
of sata.

Do you mean to add parent node and address and size cells set to 2 in 
this yaml example as well?

>
>> +            interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
> The error is because you need the include files for these defines.
Will add header file for interrupts in yaml example.
>
>> +            clocks = <&tegra_car TEGRA210_CLK_SATA>,
>> +                     <&tegra_car TEGRA210_CLK_SATA_OOB>;
>> +            clock-names = "sata", "sata-oob";
>> +            resets = <&tegra_car 124>,
>> +                     <&tegra_car 129>,
>> +                     <&tegra_car 123>;
>> +            reset-names = "sata", "sata-cold", "sata-oob";
>> +    };

  reply	other threads:[~2020-11-23 19:01 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-13 19:36 [PATCH v2 0/6] Add AHCI support for Tegra186 Sowjanya Komatineni
2020-11-13 19:36 ` [PATCH v2 1/6] arm: tegra: Change order of SATA resets for Tegra124 Sowjanya Komatineni
2020-11-13 19:36 ` [PATCH v2 2/6] arm64: tegra: Change order of SATA resets for Tegra132 and Tegra210 Sowjanya Komatineni
2020-11-13 19:36 ` [PATCH v2 3/6] dt-bindings: ata: tegra: Convert binding documentation to YAML Sowjanya Komatineni
2020-11-16 15:00   ` Rob Herring
2020-11-17 16:15     ` Sowjanya Komatineni
2020-11-20 20:14       ` Rob Herring
2020-11-20 20:17   ` Rob Herring
2020-11-23 19:01     ` Sowjanya Komatineni [this message]
2020-11-23 20:03       ` Sowjanya Komatineni
2020-11-13 19:36 ` [PATCH v2 4/6] dt-binding: ata: tegra: Add dt-binding documentation for Tegra186 Sowjanya Komatineni
2020-11-21 14:04   ` Rob Herring
2020-11-13 19:36 ` [PATCH v2 5/6] arm64: tegra: Enable AHCI on Jetson TX2 Sowjanya Komatineni
2020-11-13 19:36 ` [PATCH v2 6/6] ata: ahci_tegra: Add AHCI support for Tegra186 Sowjanya Komatineni
2020-11-13 20:29 ` [PATCH v2 0/6] " Thierry Reding

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