All of lore.kernel.org
 help / color / mirror / Atom feed
* [dpdk-dev] [PATCH] net/hns3: fix TM QCN error event report by MSIX
@ 2021-05-08  7:40 Min Hu (Connor)
  2021-05-11 17:35 ` Ferruh Yigit
  0 siblings, 1 reply; 2+ messages in thread
From: Min Hu (Connor) @ 2021-05-08  7:40 UTC (permalink / raw)
  To: dev; +Cc: ferruh.yigit

From: Chengwen Feng <fengchengwen@huawei.com>

The TM QCN error event should report by RAS other than MSIX.

Also this patch adds fifo int enable configuration before the TM QCN
error event is enabled.

Fixes: f53a793bb7c2 ("net/hns3: add more hardware error types")
Fixes: 3903c05382c5 ("net/hns3: remove read when enabling TM QCN error event")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
---
 drivers/net/hns3/hns3_intr.c | 5 ++++-
 drivers/net/hns3/hns3_intr.h | 2 ++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/net/hns3/hns3_intr.c b/drivers/net/hns3/hns3_intr.c
index 905c6d9..6bdb17f 100644
--- a/drivers/net/hns3/hns3_intr.c
+++ b/drivers/net/hns3/hns3_intr.c
@@ -1783,8 +1783,11 @@ enable_tm_err_intr(struct hns3_adapter *hns, bool en)
 
 	/* configure TM QCN hw errors */
 	hns3_cmd_setup_basic_desc(&desc, HNS3_OPC_TM_QCN_MEM_INT_CFG, false);
-	if (en)
+	desc.data[0] = rte_cpu_to_le_32(HNS3_TM_QCN_ERR_INT_TYPE);
+	if (en) {
+		desc.data[0] |= rte_cpu_to_le_32(HNS3_TM_QCN_FIFO_INT_EN);
 		desc.data[1] = rte_cpu_to_le_32(HNS3_TM_QCN_MEM_ERR_INT_EN);
+	}
 
 	ret = hns3_cmd_send(hw, &desc, 1);
 	if (ret)
diff --git a/drivers/net/hns3/hns3_intr.h b/drivers/net/hns3/hns3_intr.h
index 8bee8d7..1a0f196 100644
--- a/drivers/net/hns3/hns3_intr.h
+++ b/drivers/net/hns3/hns3_intr.h
@@ -77,6 +77,8 @@
 #define HNS3_NCSI_ERR_INT_EN			0x3
 
 #define HNS3_TM_SCH_ECC_ERR_INT_EN		0x3
+#define HNS3_TM_QCN_ERR_INT_TYPE		0x29
+#define HNS3_TM_QCN_FIFO_INT_EN			0xFFFF00
 #define HNS3_TM_QCN_MEM_ERR_INT_EN		0xFFFFFF
 
 #define HNS3_RESET_PROCESS_MS			200
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [dpdk-dev] [PATCH] net/hns3: fix TM QCN error event report by MSIX
  2021-05-08  7:40 [dpdk-dev] [PATCH] net/hns3: fix TM QCN error event report by MSIX Min Hu (Connor)
@ 2021-05-11 17:35 ` Ferruh Yigit
  0 siblings, 0 replies; 2+ messages in thread
From: Ferruh Yigit @ 2021-05-11 17:35 UTC (permalink / raw)
  To: Min Hu (Connor), dev

On 5/8/2021 8:40 AM, Min Hu (Connor) wrote:
> From: Chengwen Feng <fengchengwen@huawei.com>
> 
> The TM QCN error event should report by RAS other than MSIX.
> 
> Also this patch adds fifo int enable configuration before the TM QCN
> error event is enabled.
> 
> Fixes: f53a793bb7c2 ("net/hns3: add more hardware error types")
> Fixes: 3903c05382c5 ("net/hns3: remove read when enabling TM QCN error event")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
> Signed-off-by: Min Hu (Connor) <humin29@huawei.com>

Applied to dpdk-next-net/main, thanks.

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2021-05-11 17:35 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-05-08  7:40 [dpdk-dev] [PATCH] net/hns3: fix TM QCN error event report by MSIX Min Hu (Connor)
2021-05-11 17:35 ` Ferruh Yigit

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.