* [PATCH 2/9] global: Remove unused or unnecessary CONFIG symbols related to DDR
2021-08-21 17:50 [PATCH 1/9] Kconfig: Use spaces not tabs in Kconfig entires Tom Rini
@ 2021-08-21 17:50 ` Tom Rini
2021-08-21 17:50 ` [PATCH 3/9] mvebu: Migrate CONFIG_DDR_32BIT/64BIT to Kconfig Tom Rini
` (7 subsequent siblings)
8 siblings, 0 replies; 20+ messages in thread
From: Tom Rini @ 2021-08-21 17:50 UTC (permalink / raw)
To: u-boot
These symbols are now either unused or were only used within the config
file to determine other logic, which could be done in a way that doesn't
further pollute the CONFIG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/powerpc/cpu/mpc83xx/spd_sdram.c | 10 -------
arch/powerpc/include/asm/config.h | 3 +-
board/freescale/mpc8349emds/mpc8349emds.c | 23 ---------------
drivers/dma/fsl_dma.c | 4 +--
include/configs/MPC8349EMDS.h | 36 -----------------------
include/configs/MPC8349EMDS_SDRAM.h | 36 -----------------------
include/configs/MPC837XERDB.h | 8 -----
include/configs/UCP1020.h | 9 ------
include/configs/km/km-mpc83xx.h | 1 -
include/configs/socrates.h | 1 -
post/cpu/mpc83xx/ecc.c | 5 ----
11 files changed, 2 insertions(+), 134 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/spd_sdram.c b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
index a861e8dd2ddc..e12043b26093 100644
--- a/arch/powerpc/cpu/mpc83xx/spd_sdram.c
+++ b/arch/powerpc/cpu/mpc83xx/spd_sdram.c
@@ -834,12 +834,6 @@ long int spd_sdram()
#endif
debug(" DDRC ECC mode: %s\n", ddrc_ecc_enable ? "ON":"OFF");
-#if defined(CONFIG_DDR_2T_TIMING)
- /*
- * Enable 2T timing by setting sdram_cfg[16].
- */
- sdram_cfg |= SDRAM_CFG_2T_EN;
-#endif
/* Enable controller, and GO! */
ddr->sdram_cfg = sdram_cfg;
sync();
@@ -914,16 +908,12 @@ void ddr_enable_ecc(unsigned int dram_size)
pattern[0] = 0xdeadbeef;
pattern[1] = 0xdeadbeef;
-#if defined(CONFIG_DDR_ECC_INIT_VIA_DMA)
- dma_meminit(pattern[0], dram_size);
-#else
debug("ddr init: CPU FP write method\n");
size = dram_size;
for (p = 0; p < (u64*)(size); p++) {
ppcDWstore((u32*)p, pattern);
}
sync();
-#endif
t_end = get_tbms();
icache_disable();
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index 2c96378efef8..2a78551ce39c 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -28,8 +28,7 @@
/* Check if boards need to enable FSL DMA engine for SDRAM init */
#if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
-#if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \
- ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
+#if ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
!defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
#define CONFIG_FSL_DMA
#endif
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
index 5f38639afd42..861cf5d6b7ec 100644
--- a/board/freescale/mpc8349emds/mpc8349emds.c
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -102,21 +102,6 @@ int fixed_sdram(void)
#if (CONFIG_SYS_DDR_SIZE != 256)
#warning Currenly any ddr size other than 256 is not supported
#endif
-#ifdef CONFIG_DDR_II
- im->ddr.csbnds[2].csbnds = CONFIG_SYS_DDR_CS2_BNDS;
- im->ddr.cs_config[2] = CONFIG_SYS_DDR_CS2_CONFIG;
- im->ddr.timing_cfg_0 = CONFIG_SYS_DDR_TIMING_0;
- im->ddr.timing_cfg_1 = CONFIG_SYS_DDR_TIMING_1;
- im->ddr.timing_cfg_2 = CONFIG_SYS_DDR_TIMING_2;
- im->ddr.timing_cfg_3 = CONFIG_SYS_DDR_TIMING_3;
- im->ddr.sdram_cfg = CONFIG_SYS_DDR_SDRAM_CFG;
- im->ddr.sdram_cfg2 = CONFIG_SYS_DDR_SDRAM_CFG2;
- im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
- im->ddr.sdram_mode2 = CONFIG_SYS_DDR_MODE2;
- im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
- im->ddr.sdram_clk_cntl = CONFIG_SYS_DDR_CLK_CNTL;
-#else
-
#if ((CONFIG_SYS_SDRAM_BASE & 0x00FFFFFF) != 0)
#warning Chip select bounds is only configurable in 16MB increments
#endif
@@ -136,18 +121,10 @@ int fixed_sdram(void)
im->ddr.sdram_cfg =
SDRAM_CFG_SREN
-#if defined(CONFIG_DDR_2T_TIMING)
- | SDRAM_CFG_2T_EN
-#endif
| 2 << SDRAM_CFG_SDRAM_TYPE_SHIFT;
-#if defined (CONFIG_DDR_32BIT)
- /* for 32-bit mode burst length is 8 */
- im->ddr.sdram_cfg |= (SDRAM_CFG_32_BE | SDRAM_CFG_8_BE);
-#endif
im->ddr.sdram_mode = CONFIG_SYS_DDR_MODE;
im->ddr.sdram_interval = CONFIG_SYS_DDR_INTERVAL;
-#endif
udelay(200);
/* enable DDR controller */
diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c
index b7eddf0f04c5..1864b5d88b08 100644
--- a/drivers/dma/fsl_dma.c
+++ b/drivers/dma/fsl_dma.c
@@ -130,11 +130,9 @@ int dmacpy(phys_addr_t dest, phys_addr_t src, phys_size_t count) {
/*
* 85xx/86xx use dma to initialize SDRAM when !CONFIG_ECC_INIT_VIA_DDRCONTROLLER
- * while 83xx uses dma to initialize SDRAM when CONFIG_DDR_ECC_INIT_VIA_DMA
*/
#if ((!defined CONFIG_MPC83xx && defined(CONFIG_DDR_ECC) && \
- !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)) || \
- (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)))
+ !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)))
void dma_meminit(uint val, uint size)
{
uint *p = 0;
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index d6ae419456ae..97f6d2678dab 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -38,23 +38,9 @@
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
-/*
- * 32-bit data path mode.
- *
- * Please note that using this mode for devices with the real density of 64-bit
- * effectively reduces the amount of available memory due to the effect of
- * wrapping around while translating address to row/columns, for example in the
- * 256MB module the upper 128MB get aliased with contents of the lower
- * 128MB); normally this define should be used for devices with real 32-bit
- * data path.
- */
-#undef CONFIG_DDR_32BIT
-
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory*/
#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \
| DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
-#undef CONFIG_DDR_2T_TIMING
-
/*
* DDRCDR - DDR Control Driver Register
*/
@@ -70,21 +56,6 @@
* Manually set up DDR parameters
*/
#define CONFIG_SYS_DDR_SIZE 256 /* MB */
-#if defined(CONFIG_DDR_II)
-#define CONFIG_SYS_DDRCDR 0x80080001
-#define CONFIG_SYS_DDR_CS2_BNDS 0x0000000f
-#define CONFIG_SYS_DDR_CS2_CONFIG 0x80330102
-#define CONFIG_SYS_DDR_TIMING_0 0x00220802
-#define CONFIG_SYS_DDR_TIMING_1 0x38357322
-#define CONFIG_SYS_DDR_TIMING_2 0x2f9048c8
-#define CONFIG_SYS_DDR_TIMING_3 0x00000000
-#define CONFIG_SYS_DDR_CLK_CNTL 0x02000000
-#define CONFIG_SYS_DDR_MODE 0x47d00432
-#define CONFIG_SYS_DDR_MODE2 0x8000c000
-#define CONFIG_SYS_DDR_INTERVAL 0x03cf0080
-#define CONFIG_SYS_DDR_SDRAM_CFG 0x43000000
-#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000
-#else
#define CONFIG_SYS_DDR_CS2_CONFIG (CSCONFIG_EN \
| CSCONFIG_ROW_BIT_13 \
| CSCONFIG_COL_BIT_10)
@@ -93,17 +64,10 @@
#define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */
#define CONFIG_SYS_DDR_INTERVAL 0x04060100 /* autocharge,no open page */
-#if defined(CONFIG_DDR_32BIT)
-/* set burst length to 8 for 32-bit data path */
- /* DLL,normal,seq,4/2.5, 8 burst len */
-#define CONFIG_SYS_DDR_MODE 0x00000023
-#else
/* the default burst length is 4 - for 64-bit data path */
/* DLL,normal,seq,4/2.5, 4 burst len */
#define CONFIG_SYS_DDR_MODE 0x00000022
#endif
-#endif
-#endif
/*
* SDRAM on the Local Bus
diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h
index 8ebca99d98b8..4c1073d52720 100644
--- a/include/configs/MPC8349EMDS_SDRAM.h
+++ b/include/configs/MPC8349EMDS_SDRAM.h
@@ -38,23 +38,9 @@
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
-/*
- * 32-bit data path mode.
- *
- * Please note that using this mode for devices with the real density of 64-bit
- * effectively reduces the amount of available memory due to the effect of
- * wrapping around while translating address to row/columns, for example in the
- * 256MB module the upper 128MB get aliased with contents of the lower
- * 128MB); normally this define should be used for devices with real 32-bit
- * data path.
- */
-#undef CONFIG_DDR_32BIT
-
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory*/
#define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN \
| DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
-#undef CONFIG_DDR_2T_TIMING
-
/*
* DDRCDR - DDR Control Driver Register
*/
@@ -70,21 +56,6 @@
* Manually set up DDR parameters
*/
#define CONFIG_SYS_DDR_SIZE 256 /* MB */
-#if defined(CONFIG_DDR_II)
-#define CONFIG_SYS_DDRCDR 0x80080001
-#define CONFIG_SYS_DDR_CS2_BNDS 0x0000000f
-#define CONFIG_SYS_DDR_CS2_CONFIG 0x80330102
-#define CONFIG_SYS_DDR_TIMING_0 0x00220802
-#define CONFIG_SYS_DDR_TIMING_1 0x38357322
-#define CONFIG_SYS_DDR_TIMING_2 0x2f9048c8
-#define CONFIG_SYS_DDR_TIMING_3 0x00000000
-#define CONFIG_SYS_DDR_CLK_CNTL 0x02000000
-#define CONFIG_SYS_DDR_MODE 0x47d00432
-#define CONFIG_SYS_DDR_MODE2 0x8000c000
-#define CONFIG_SYS_DDR_INTERVAL 0x03cf0080
-#define CONFIG_SYS_DDR_SDRAM_CFG 0x43000000
-#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00401000
-#else
#define CONFIG_SYS_DDR_CS2_CONFIG (CSCONFIG_EN \
| CSCONFIG_ROW_BIT_13 \
| CSCONFIG_COL_BIT_10)
@@ -93,17 +64,10 @@
#define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */
#define CONFIG_SYS_DDR_INTERVAL 0x04060100 /* autocharge,no open page */
-#if defined(CONFIG_DDR_32BIT)
-/* set burst length to 8 for 32-bit data path */
- /* DLL,normal,seq,4/2.5, 8 burst len */
-#define CONFIG_SYS_DDR_MODE 0x00000023
-#else
/* the default burst length is 4 - for 64-bit data path */
/* DLL,normal,seq,4/2.5, 4 burst len */
#define CONFIG_SYS_DDR_MODE 0x00000022
#endif
-#endif
-#endif
/*
* SDRAM on the Local Bus
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 0a136b4f92f5..f60bc5c1ee0e 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -113,17 +113,9 @@
| (0 << SDRAM_INTERVAL_BSTOPRE_SHIFT))
/* 0x06090100 */
-#if defined(CONFIG_DDR_2T_TIMING)
-#define CONFIG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SREN \
- | SDRAM_CFG_SDRAM_TYPE_DDR2 \
- | SDRAM_CFG_32_BE \
- | SDRAM_CFG_2T_EN)
- /* 0x43088000 */
-#else
#define CONFIG_SYS_DDR_SDRAM_CFG (SDRAM_CFG_SREN \
| SDRAM_CFG_SDRAM_TYPE_DDR2)
/* 0x43000000 */
-#endif
#define CONFIG_SYS_DDR_SDRAM_CFG2 0x00001000 /* 1 posted refresh */
#define CONFIG_SYS_DDR_MODE ((0x0406 << SDRAM_MODE_ESD_SHIFT) \
| (0x0442 << SDRAM_MODE_SD_SHIFT))
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index d9a777ea1a0e..70dbb4cb0d20 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -171,11 +171,6 @@
#endif
/* DDR Setup */
-#define CONFIG_DDR_ECC_ENABLE
-#ifndef CONFIG_DDR_ECC_ENABLE
-#define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_DDR_SPD
-#endif
#define CONFIG_SYS_SPD_BUS_NUM 1
#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_512M
@@ -204,11 +199,7 @@
#define CONFIG_SYS_DDR_SR_CNTR 0x00000000
#define CONFIG_SYS_DDR_RCW_1 0x00000000
#define CONFIG_SYS_DDR_RCW_2 0x00000000
-#ifdef CONFIG_DDR_ECC_ENABLE
#define CONFIG_SYS_DDR_CONTROL 0xE70C0000 /* Type = DDR3 & ECC */
-#else
-#define CONFIG_SYS_DDR_CONTROL 0xC70C0000 /* Type = DDR3 */
-#endif
#define CONFIG_SYS_DDR_CONTROL_2 0x04401050
#define CONFIG_SYS_DDR_TIMING_4 0x00220001
#define CONFIG_SYS_DDR_TIMING_5 0x03402400
diff --git a/include/configs/km/km-mpc83xx.h b/include/configs/km/km-mpc83xx.h
index ecf4378bf1cc..96eb81df4c20 100644
--- a/include/configs/km/km-mpc83xx.h
+++ b/include/configs/km/km-mpc83xx.h
@@ -18,7 +18,6 @@
/*
* Manually set up DDR parameters
*/
-#define CONFIG_DDR_II
#define CONFIG_SYS_DDR_SIZE 2048 /* MB */
/*
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index da60546966cd..0efb44ad43c3 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -72,7 +72,6 @@
/* I2C addresses of SPD EEPROMs */
#define SPD_EEPROM_ADDRESS 0x50 /* CTLR 0 DIMM 0 */
-#define CONFIG_DDR_DEFAULT_CL 30 /* CAS latency 3 */
/* Hardcoded values, to use instead of SPD */
#define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f
diff --git a/post/cpu/mpc83xx/ecc.c b/post/cpu/mpc83xx/ecc.c
index cc971a890978..f88eff8998f9 100644
--- a/post/cpu/mpc83xx/ecc.c
+++ b/post/cpu/mpc83xx/ecc.c
@@ -70,10 +70,6 @@ int ecc_post_test(int flags)
int_state = disable_interrupts();
icache_enable();
-#ifdef CONFIG_DDR_32BIT
- /* It seems like no one really uses the CONFIG_DDR_32BIT mode */
-#error "Add ECC POST support for CONFIG_DDR_32BIT here!"
-#else
for (addr = (u64*)CONFIG_SYS_POST_ECC_START_ADDR, errbit=0;
addr < (u64*)CONFIG_SYS_POST_ECC_STOP_ADDR; addr++, errbit++ ) {
@@ -138,7 +134,6 @@ int ecc_post_test(int flags)
errbit %= 63;
}
-#endif /* !CONFIG_DDR_32BIT */
ecc_clear(ddr);
--
2.17.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 3/9] mvebu: Migrate CONFIG_DDR_32BIT/64BIT to Kconfig
2021-08-21 17:50 [PATCH 1/9] Kconfig: Use spaces not tabs in Kconfig entires Tom Rini
2021-08-21 17:50 ` [PATCH 2/9] global: Remove unused or unnecessary CONFIG symbols related to DDR Tom Rini
@ 2021-08-21 17:50 ` Tom Rini
2021-08-24 10:53 ` Marek Behún
2021-08-31 5:45 ` Stefan Roese
2021-08-21 17:50 ` [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE Tom Rini
` (6 subsequent siblings)
8 siblings, 2 replies; 20+ messages in thread
From: Tom Rini @ 2021-08-21 17:50 UTC (permalink / raw)
To: u-boot; +Cc: Marek Behún, Stefan Roese
Move CONFIG_DDR_32BIT/64BIT to Kconfig as a choice for Armada XP
platforms. Make 64bit the default as this mirrors the current code.
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/mach-mvebu/Kconfig | 13 +++++++++++++
configs/ds414_defconfig | 1 +
include/configs/ds414.h | 3 ---
3 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 89737a37ad9e..1daa64763b03 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -184,6 +184,19 @@ config TARGET_CRS3XX_98DX3236
endchoice
+choice
+ prompt "DDR bus width"
+ default DDR_64BIT
+ depends on ARMADA_XP
+
+config DDR_64BIT
+ bool "64bit bus width"
+
+config DDR_32BIT
+ bool "32bit bus width"
+
+endchoice
+
config SYS_BOARD
default "clearfog" if TARGET_CLEARFOG
default "helios4" if TARGET_HELIOS4
diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
index bfe2e5f4fe70..d3fb1dcd40b1 100644
--- a/configs/ds414_defconfig
+++ b/configs/ds414_defconfig
@@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=2
CONFIG_TARGET_DS414=y
+CONFIG_DDR_32BIT=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0x7E0000
CONFIG_ENV_SECT_SIZE=0x10000
diff --git a/include/configs/ds414.h b/include/configs/ds414.h
index 5d401281c7e6..66bbff71a948 100644
--- a/include/configs/ds414.h
+++ b/include/configs/ds414.h
@@ -67,9 +67,6 @@
#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
-/* DS414 bus width is 32bits */
-#define CONFIG_DDR_32BIT
-
/* Default Environment */
#define CONFIG_LOADADDR 0x80000
#define CONFIG_BOOTCOMMAND \
--
2.17.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH 3/9] mvebu: Migrate CONFIG_DDR_32BIT/64BIT to Kconfig
2021-08-21 17:50 ` [PATCH 3/9] mvebu: Migrate CONFIG_DDR_32BIT/64BIT to Kconfig Tom Rini
@ 2021-08-24 10:53 ` Marek Behún
2021-08-31 5:45 ` Stefan Roese
1 sibling, 0 replies; 20+ messages in thread
From: Marek Behún @ 2021-08-24 10:53 UTC (permalink / raw)
To: Tom Rini; +Cc: u-boot, Stefan Roese
Acked-by: Marek Behún <marek.behun@nic.cz>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 3/9] mvebu: Migrate CONFIG_DDR_32BIT/64BIT to Kconfig
2021-08-21 17:50 ` [PATCH 3/9] mvebu: Migrate CONFIG_DDR_32BIT/64BIT to Kconfig Tom Rini
2021-08-24 10:53 ` Marek Behún
@ 2021-08-31 5:45 ` Stefan Roese
1 sibling, 0 replies; 20+ messages in thread
From: Stefan Roese @ 2021-08-31 5:45 UTC (permalink / raw)
To: Tom Rini, u-boot; +Cc: Marek Behún
On 21.08.21 19:50, Tom Rini wrote:
> Move CONFIG_DDR_32BIT/64BIT to Kconfig as a choice for Armada XP
> platforms. Make 64bit the default as this mirrors the current code.
>
> Cc: Marek Behún <marek.behun@nic.cz>
> Cc: Stefan Roese <sr@denx.de>
> Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Thanks,
Stefan
> ---
> arch/arm/mach-mvebu/Kconfig | 13 +++++++++++++
> configs/ds414_defconfig | 1 +
> include/configs/ds414.h | 3 ---
> 3 files changed, 14 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
> index 89737a37ad9e..1daa64763b03 100644
> --- a/arch/arm/mach-mvebu/Kconfig
> +++ b/arch/arm/mach-mvebu/Kconfig
> @@ -184,6 +184,19 @@ config TARGET_CRS3XX_98DX3236
>
> endchoice
>
> +choice
> + prompt "DDR bus width"
> + default DDR_64BIT
> + depends on ARMADA_XP
> +
> +config DDR_64BIT
> + bool "64bit bus width"
> +
> +config DDR_32BIT
> + bool "32bit bus width"
> +
> +endchoice
> +
> config SYS_BOARD
> default "clearfog" if TARGET_CLEARFOG
> default "helios4" if TARGET_HELIOS4
> diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig
> index bfe2e5f4fe70..d3fb1dcd40b1 100644
> --- a/configs/ds414_defconfig
> +++ b/configs/ds414_defconfig
> @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
> CONFIG_SYS_MALLOC_F_LEN=0x2000
> CONFIG_NR_DRAM_BANKS=2
> CONFIG_TARGET_DS414=y
> +CONFIG_DDR_32BIT=y
> CONFIG_ENV_SIZE=0x10000
> CONFIG_ENV_OFFSET=0x7E0000
> CONFIG_ENV_SECT_SIZE=0x10000
> diff --git a/include/configs/ds414.h b/include/configs/ds414.h
> index 5d401281c7e6..66bbff71a948 100644
> --- a/include/configs/ds414.h
> +++ b/include/configs/ds414.h
> @@ -67,9 +67,6 @@
> #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
> #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
>
> -/* DS414 bus width is 32bits */
> -#define CONFIG_DDR_32BIT
> -
> /* Default Environment */
> #define CONFIG_LOADADDR 0x80000
> #define CONFIG_BOOTCOMMAND \
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
2021-08-21 17:50 [PATCH 1/9] Kconfig: Use spaces not tabs in Kconfig entires Tom Rini
2021-08-21 17:50 ` [PATCH 2/9] global: Remove unused or unnecessary CONFIG symbols related to DDR Tom Rini
2021-08-21 17:50 ` [PATCH 3/9] mvebu: Migrate CONFIG_DDR_32BIT/64BIT to Kconfig Tom Rini
@ 2021-08-21 17:50 ` Tom Rini
2021-08-22 11:35 ` Marek Behún
` (2 more replies)
2021-08-21 17:50 ` [PATCH 5/9] mvebe: Migrate CONFIG_DDR_LOG_LEVEL to Kconfig Tom Rini
` (5 subsequent siblings)
8 siblings, 3 replies; 20+ messages in thread
From: Tom Rini @ 2021-08-21 17:50 UTC (permalink / raw)
To: u-boot; +Cc: Marek Behún, Stefan Roese
We have a number of CONFIG symbols to express the fixed size of system
memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
size rather than MiB.
Cc: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++--
include/configs/maxbcm.h | 4 +++-
include/configs/theadorable.h | 4 +++-
3 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
index 270691e9bcd3..970651f87029 100644
--- a/drivers/ddr/marvell/axp/ddr3_axp.h
+++ b/drivers/ddr/marvell/axp/ddr3_axp.h
@@ -19,10 +19,10 @@
#define FAR_END_DIMM_ADDR 0x50
#define MAX_DIMM_ADDR 0x60
-#ifndef CONFIG_DDR_FIXED_SIZE
+#ifndef CONFIG_SYS_SDRAM_SIZE
#define SDRAM_CS_SIZE 0xFFFFFFF
#else
-#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
+#define SDRAM_CS_SIZE ((CONFIG_SYS_SDRAM_SIZE >> 10) - 1)
#endif
#define SDRAM_CS_BASE 0x0
#define SDRAM_DIMM_SIZE 0x80000000
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
index fc2393204bec..5098f12f5425 100644
--- a/include/configs/maxbcm.h
+++ b/include/configs/maxbcm.h
@@ -6,6 +6,8 @@
#ifndef _CONFIG_DB_MV7846MP_GP_H
#define _CONFIG_DB_MV7846MP_GP_H
+#include <linux/sizes.h>
+
/*
* High Level Configuration Options (easy to change)
*/
@@ -65,7 +67,7 @@
/* SPL related SPI defines */
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
-#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
+#define CONFIG_SYS_SDRAM_SIZE SZ_1G
#define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
#endif /* _CONFIG_DB_MV7846MP_GP_H */
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index 760713d3ef87..abc48ff44ca5 100644
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -6,6 +6,8 @@
#ifndef _CONFIG_THEADORABLE_H
#define _CONFIG_THEADORABLE_H
+#include <linux/sizes.h>
+
/*
* High Level Configuration Options (easy to change)
*/
@@ -93,6 +95,6 @@
#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
-#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
+#define CONFIG_SYS_SDRAM_SIZE SZ_2G
#endif /* _CONFIG_THEADORABLE_H */
--
2.17.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
2021-08-21 17:50 ` [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE Tom Rini
@ 2021-08-22 11:35 ` Marek Behún
2021-08-22 11:40 ` Pali Rohár
2021-08-24 10:52 ` Marek Behún
2021-08-31 5:51 ` Stefan Roese
2 siblings, 1 reply; 20+ messages in thread
From: Marek Behún @ 2021-08-22 11:35 UTC (permalink / raw)
To: pali; +Cc: Tom Rini, u-boot, Stefan Roese
+ pali, who can tell whether this won't break how the code is aligned
with upstream mv-ddr
On Sat, 21 Aug 2021 13:50:14 -0400
Tom Rini <trini@konsulko.com> wrote:
> We have a number of CONFIG symbols to express the fixed size of system
> memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
> and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
> size rather than MiB.
>
> Cc: Marek Behún <marek.behun@nic.cz>
> Cc: Stefan Roese <sr@denx.de>
> Signed-off-by: Tom Rini <trini@konsulko.com>
> ---
> drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++--
> include/configs/maxbcm.h | 4 +++-
> include/configs/theadorable.h | 4 +++-
> 3 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
> index 270691e9bcd3..970651f87029 100644
> --- a/drivers/ddr/marvell/axp/ddr3_axp.h
> +++ b/drivers/ddr/marvell/axp/ddr3_axp.h
> @@ -19,10 +19,10 @@
> #define FAR_END_DIMM_ADDR 0x50
> #define MAX_DIMM_ADDR 0x60
>
> -#ifndef CONFIG_DDR_FIXED_SIZE
> +#ifndef CONFIG_SYS_SDRAM_SIZE
> #define SDRAM_CS_SIZE 0xFFFFFFF
> #else
> -#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
> +#define SDRAM_CS_SIZE ((CONFIG_SYS_SDRAM_SIZE >> 10) - 1)
> #endif
> #define SDRAM_CS_BASE 0x0
> #define SDRAM_DIMM_SIZE 0x80000000
> diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
> index fc2393204bec..5098f12f5425 100644
> --- a/include/configs/maxbcm.h
> +++ b/include/configs/maxbcm.h
> @@ -6,6 +6,8 @@
> #ifndef _CONFIG_DB_MV7846MP_GP_H
> #define _CONFIG_DB_MV7846MP_GP_H
>
> +#include <linux/sizes.h>
> +
> /*
> * High Level Configuration Options (easy to change)
> */
> @@ -65,7 +67,7 @@
> /* SPL related SPI defines */
>
> /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
> -#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
> +#define CONFIG_SYS_SDRAM_SIZE SZ_1G
> #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
>
> #endif /* _CONFIG_DB_MV7846MP_GP_H */
> diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
> index 760713d3ef87..abc48ff44ca5 100644
> --- a/include/configs/theadorable.h
> +++ b/include/configs/theadorable.h
> @@ -6,6 +6,8 @@
> #ifndef _CONFIG_THEADORABLE_H
> #define _CONFIG_THEADORABLE_H
>
> +#include <linux/sizes.h>
> +
> /*
> * High Level Configuration Options (easy to change)
> */
> @@ -93,6 +95,6 @@
> #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
>
> /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
> -#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
> +#define CONFIG_SYS_SDRAM_SIZE SZ_2G
>
> #endif /* _CONFIG_THEADORABLE_H */
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
2021-08-22 11:35 ` Marek Behún
@ 2021-08-22 11:40 ` Pali Rohár
0 siblings, 0 replies; 20+ messages in thread
From: Pali Rohár @ 2021-08-22 11:40 UTC (permalink / raw)
To: Marek Behún; +Cc: Tom Rini, u-boot, Stefan Roese
On Sunday 22 August 2021 13:35:54 Marek Behún wrote:
> + pali, who can tell whether this won't break how the code is aligned
> with upstream mv-ddr
This one change touch only drivers/ddr/marvell/axp/ files which are for
Armada XP. Upstream mv-ddr code does not contain Armada XP code. It
contains code for new platforms: A38x, A37xx, A70xx, A80xx, CN913x.
So only code which touches drivers/ddr/marvell/a38x/ needs care for
upstream synchronization.
> On Sat, 21 Aug 2021 13:50:14 -0400
> Tom Rini <trini@konsulko.com> wrote:
>
> > We have a number of CONFIG symbols to express the fixed size of system
> > memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
> > and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
> > size rather than MiB.
> >
> > Cc: Marek Behún <marek.behun@nic.cz>
> > Cc: Stefan Roese <sr@denx.de>
> > Signed-off-by: Tom Rini <trini@konsulko.com>
> > ---
> > drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++--
> > include/configs/maxbcm.h | 4 +++-
> > include/configs/theadorable.h | 4 +++-
> > 3 files changed, 8 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
> > index 270691e9bcd3..970651f87029 100644
> > --- a/drivers/ddr/marvell/axp/ddr3_axp.h
> > +++ b/drivers/ddr/marvell/axp/ddr3_axp.h
> > @@ -19,10 +19,10 @@
> > #define FAR_END_DIMM_ADDR 0x50
> > #define MAX_DIMM_ADDR 0x60
> >
> > -#ifndef CONFIG_DDR_FIXED_SIZE
> > +#ifndef CONFIG_SYS_SDRAM_SIZE
> > #define SDRAM_CS_SIZE 0xFFFFFFF
> > #else
> > -#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
> > +#define SDRAM_CS_SIZE ((CONFIG_SYS_SDRAM_SIZE >> 10) - 1)
> > #endif
> > #define SDRAM_CS_BASE 0x0
> > #define SDRAM_DIMM_SIZE 0x80000000
> > diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
> > index fc2393204bec..5098f12f5425 100644
> > --- a/include/configs/maxbcm.h
> > +++ b/include/configs/maxbcm.h
> > @@ -6,6 +6,8 @@
> > #ifndef _CONFIG_DB_MV7846MP_GP_H
> > #define _CONFIG_DB_MV7846MP_GP_H
> >
> > +#include <linux/sizes.h>
> > +
> > /*
> > * High Level Configuration Options (easy to change)
> > */
> > @@ -65,7 +67,7 @@
> > /* SPL related SPI defines */
> >
> > /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
> > -#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
> > +#define CONFIG_SYS_SDRAM_SIZE SZ_1G
> > #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
> >
> > #endif /* _CONFIG_DB_MV7846MP_GP_H */
> > diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
> > index 760713d3ef87..abc48ff44ca5 100644
> > --- a/include/configs/theadorable.h
> > +++ b/include/configs/theadorable.h
> > @@ -6,6 +6,8 @@
> > #ifndef _CONFIG_THEADORABLE_H
> > #define _CONFIG_THEADORABLE_H
> >
> > +#include <linux/sizes.h>
> > +
> > /*
> > * High Level Configuration Options (easy to change)
> > */
> > @@ -93,6 +95,6 @@
> > #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
> >
> > /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
> > -#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
> > +#define CONFIG_SYS_SDRAM_SIZE SZ_2G
> >
> > #endif /* _CONFIG_THEADORABLE_H */
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
2021-08-21 17:50 ` [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE Tom Rini
2021-08-22 11:35 ` Marek Behún
@ 2021-08-24 10:52 ` Marek Behún
2021-08-31 5:51 ` Stefan Roese
2 siblings, 0 replies; 20+ messages in thread
From: Marek Behún @ 2021-08-24 10:52 UTC (permalink / raw)
To: Tom Rini; +Cc: u-boot, Stefan Roese
Acked-by: Marek Behún <marek.behun@nic.cz>
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
2021-08-21 17:50 ` [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE Tom Rini
2021-08-22 11:35 ` Marek Behún
2021-08-24 10:52 ` Marek Behún
@ 2021-08-31 5:51 ` Stefan Roese
2021-08-31 12:43 ` Tom Rini
2 siblings, 1 reply; 20+ messages in thread
From: Stefan Roese @ 2021-08-31 5:51 UTC (permalink / raw)
To: Tom Rini, u-boot; +Cc: Marek Behún
Hi Tom,
On 21.08.21 19:50, Tom Rini wrote:
> We have a number of CONFIG symbols to express the fixed size of system
> memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
> and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
> size rather than MiB.
>
> Cc: Marek Behún <marek.behun@nic.cz>
> Cc: Stefan Roese <sr@denx.de>
> Signed-off-by: Tom Rini <trini@konsulko.com>
> ---
> drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++--
> include/configs/maxbcm.h | 4 +++-
> include/configs/theadorable.h | 4 +++-
> 3 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
> index 270691e9bcd3..970651f87029 100644
> --- a/drivers/ddr/marvell/axp/ddr3_axp.h
> +++ b/drivers/ddr/marvell/axp/ddr3_axp.h
> @@ -19,10 +19,10 @@
> #define FAR_END_DIMM_ADDR 0x50
> #define MAX_DIMM_ADDR 0x60
>
> -#ifndef CONFIG_DDR_FIXED_SIZE
> +#ifndef CONFIG_SYS_SDRAM_SIZE
> #define SDRAM_CS_SIZE 0xFFFFFFF
> #else
> -#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
> +#define SDRAM_CS_SIZE ((CONFIG_SYS_SDRAM_SIZE >> 10) - 1)
Why are you using ">> 10" (dividing by 1024) here?
Thanks,
Stefan
> #endif
> #define SDRAM_CS_BASE 0x0
> #define SDRAM_DIMM_SIZE 0x80000000
> diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
> index fc2393204bec..5098f12f5425 100644
> --- a/include/configs/maxbcm.h
> +++ b/include/configs/maxbcm.h
> @@ -6,6 +6,8 @@
> #ifndef _CONFIG_DB_MV7846MP_GP_H
> #define _CONFIG_DB_MV7846MP_GP_H
>
> +#include <linux/sizes.h>
> +
> /*
> * High Level Configuration Options (easy to change)
> */
> @@ -65,7 +67,7 @@
> /* SPL related SPI defines */
>
> /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
> -#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
> +#define CONFIG_SYS_SDRAM_SIZE SZ_1G
> #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
>
> #endif /* _CONFIG_DB_MV7846MP_GP_H */
> diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
> index 760713d3ef87..abc48ff44ca5 100644
> --- a/include/configs/theadorable.h
> +++ b/include/configs/theadorable.h
> @@ -6,6 +6,8 @@
> #ifndef _CONFIG_THEADORABLE_H
> #define _CONFIG_THEADORABLE_H
>
> +#include <linux/sizes.h>
> +
> /*
> * High Level Configuration Options (easy to change)
> */
> @@ -93,6 +95,6 @@
> #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
>
> /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
> -#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
> +#define CONFIG_SYS_SDRAM_SIZE SZ_2G
>
> #endif /* _CONFIG_THEADORABLE_H */
>
Viele Grüße,
Stefan
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
2021-08-31 5:51 ` Stefan Roese
@ 2021-08-31 12:43 ` Tom Rini
2021-09-01 5:27 ` Stefan Roese
0 siblings, 1 reply; 20+ messages in thread
From: Tom Rini @ 2021-08-31 12:43 UTC (permalink / raw)
To: Stefan Roese; +Cc: u-boot, Marek Behún
[-- Attachment #1: Type: text/plain, Size: 3236 bytes --]
On Tue, Aug 31, 2021 at 07:51:29AM +0200, Stefan Roese wrote:
> Hi Tom,
>
> On 21.08.21 19:50, Tom Rini wrote:
> > We have a number of CONFIG symbols to express the fixed size of system
> > memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
> > and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
> > size rather than MiB.
> >
> > Cc: Marek Behún <marek.behun@nic.cz>
> > Cc: Stefan Roese <sr@denx.de>
> > Signed-off-by: Tom Rini <trini@konsulko.com>
> > ---
> > drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++--
> > include/configs/maxbcm.h | 4 +++-
> > include/configs/theadorable.h | 4 +++-
> > 3 files changed, 8 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
> > index 270691e9bcd3..970651f87029 100644
> > --- a/drivers/ddr/marvell/axp/ddr3_axp.h
> > +++ b/drivers/ddr/marvell/axp/ddr3_axp.h
> > @@ -19,10 +19,10 @@
> > #define FAR_END_DIMM_ADDR 0x50
> > #define MAX_DIMM_ADDR 0x60
> > -#ifndef CONFIG_DDR_FIXED_SIZE
> > +#ifndef CONFIG_SYS_SDRAM_SIZE
> > #define SDRAM_CS_SIZE 0xFFFFFFF
> > #else
> > -#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
> > +#define SDRAM_CS_SIZE ((CONFIG_SYS_SDRAM_SIZE >> 10) - 1)
>
> Why are you using ">> 10" (dividing by 1024) here?
>
> Thanks,
> Stefan
>
> > #endif
> > #define SDRAM_CS_BASE 0x0
> > #define SDRAM_DIMM_SIZE 0x80000000
> > diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
> > index fc2393204bec..5098f12f5425 100644
> > --- a/include/configs/maxbcm.h
> > +++ b/include/configs/maxbcm.h
> > @@ -6,6 +6,8 @@
> > #ifndef _CONFIG_DB_MV7846MP_GP_H
> > #define _CONFIG_DB_MV7846MP_GP_H
> > +#include <linux/sizes.h>
> > +
> > /*
> > * High Level Configuration Options (easy to change)
> > */
> > @@ -65,7 +67,7 @@
> > /* SPL related SPI defines */
> > /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
> > -#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
> > +#define CONFIG_SYS_SDRAM_SIZE SZ_1G
OK, so before my change, SDRAM_CS_SIZE = 0xfffff. After my change,
SDRAM_CS_SIZE = 0xfffff, still.
> > #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
> > #endif /* _CONFIG_DB_MV7846MP_GP_H */
> > diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
> > index 760713d3ef87..abc48ff44ca5 100644
> > --- a/include/configs/theadorable.h
> > +++ b/include/configs/theadorable.h
> > @@ -6,6 +6,8 @@
> > #ifndef _CONFIG_THEADORABLE_H
> > #define _CONFIG_THEADORABLE_H
> > +#include <linux/sizes.h>
> > +
> > /*
> > * High Level Configuration Options (easy to change)
> > */
> > @@ -93,6 +95,6 @@
> > #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
> > /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
> > -#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
> > +#define CONFIG_SYS_SDRAM_SIZE SZ_2G
Here, before SDRAM_CS_SIZE = 0x1fffff and then after SDRAM_CS_SIZE =
0x1fffff.
This is because CONFIG_DDR_FIXED_SIZE is kilobytes and
CONFIG_SYS_SDRAM_SIZE is bytes, yes? Thanks.
--
Tom
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
2021-08-31 12:43 ` Tom Rini
@ 2021-09-01 5:27 ` Stefan Roese
2021-09-01 11:29 ` Tom Rini
0 siblings, 1 reply; 20+ messages in thread
From: Stefan Roese @ 2021-09-01 5:27 UTC (permalink / raw)
To: Tom Rini; +Cc: u-boot, Marek Behún
Hi Tom,
On 31.08.21 14:43, Tom Rini wrote:
> On Tue, Aug 31, 2021 at 07:51:29AM +0200, Stefan Roese wrote:
>> Hi Tom,
>>
>> On 21.08.21 19:50, Tom Rini wrote:
>>> We have a number of CONFIG symbols to express the fixed size of system
>>> memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
>>> and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
>>> size rather than MiB.
>>>
>>> Cc: Marek Behún <marek.behun@nic.cz>
>>> Cc: Stefan Roese <sr@denx.de>
>>> Signed-off-by: Tom Rini <trini@konsulko.com>
>>> ---
>>> drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++--
>>> include/configs/maxbcm.h | 4 +++-
>>> include/configs/theadorable.h | 4 +++-
>>> 3 files changed, 8 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
>>> index 270691e9bcd3..970651f87029 100644
>>> --- a/drivers/ddr/marvell/axp/ddr3_axp.h
>>> +++ b/drivers/ddr/marvell/axp/ddr3_axp.h
>>> @@ -19,10 +19,10 @@
>>> #define FAR_END_DIMM_ADDR 0x50
>>> #define MAX_DIMM_ADDR 0x60
>>> -#ifndef CONFIG_DDR_FIXED_SIZE
>>> +#ifndef CONFIG_SYS_SDRAM_SIZE
>>> #define SDRAM_CS_SIZE 0xFFFFFFF
>>> #else
>>> -#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
>>> +#define SDRAM_CS_SIZE ((CONFIG_SYS_SDRAM_SIZE >> 10) - 1)
>>
>> Why are you using ">> 10" (dividing by 1024) here?
>>
>> Thanks,
>> Stefan
>>
>>> #endif
>>> #define SDRAM_CS_BASE 0x0
>>> #define SDRAM_DIMM_SIZE 0x80000000
>>> diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
>>> index fc2393204bec..5098f12f5425 100644
>>> --- a/include/configs/maxbcm.h
>>> +++ b/include/configs/maxbcm.h
>>> @@ -6,6 +6,8 @@
>>> #ifndef _CONFIG_DB_MV7846MP_GP_H
>>> #define _CONFIG_DB_MV7846MP_GP_H
>>> +#include <linux/sizes.h>
>>> +
>>> /*
>>> * High Level Configuration Options (easy to change)
>>> */
>>> @@ -65,7 +67,7 @@
>>> /* SPL related SPI defines */
>>> /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
>>> -#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
>>> +#define CONFIG_SYS_SDRAM_SIZE SZ_1G
>
> OK, so before my change, SDRAM_CS_SIZE = 0xfffff. After my change,
> SDRAM_CS_SIZE = 0xfffff, still.
>
>>> #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
>>> #endif /* _CONFIG_DB_MV7846MP_GP_H */
>>> diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
>>> index 760713d3ef87..abc48ff44ca5 100644
>>> --- a/include/configs/theadorable.h
>>> +++ b/include/configs/theadorable.h
>>> @@ -6,6 +6,8 @@
>>> #ifndef _CONFIG_THEADORABLE_H
>>> #define _CONFIG_THEADORABLE_H
>>> +#include <linux/sizes.h>
>>> +
>>> /*
>>> * High Level Configuration Options (easy to change)
>>> */
>>> @@ -93,6 +95,6 @@
>>> #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
>>> /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
>>> -#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
>>> +#define CONFIG_SYS_SDRAM_SIZE SZ_2G
>
> Here, before SDRAM_CS_SIZE = 0x1fffff and then after SDRAM_CS_SIZE =
> 0x1fffff.
>
> This is because CONFIG_DDR_FIXED_SIZE is kilobytes and
> CONFIG_SYS_SDRAM_SIZE is bytes, yes? Thanks.
Only if CONFIG_DDR_FIXED_SIZE / CONFIG_SYS_SDRAM_SIZE is undefined.
Please see e.g. theadorable.h above. Here we have:
#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
With this, the following will happen in ddr3_axp.h:
#ifndef CONFIG_DDR_FIXED_SIZE
#define SDRAM_CS_SIZE 0xFFFFFFF
#else
#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
#endif
So SDRAM_CS_SIZE will be set to "(2 << 20) - 1".
AFAICT, on Armada XP CONFIG_DDR_FIXED_SIZE is bytes and not
kilobytes.
Thanks,
Stefan
^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
2021-09-01 5:27 ` Stefan Roese
@ 2021-09-01 11:29 ` Tom Rini
2021-09-01 14:32 ` Stefan Roese
0 siblings, 1 reply; 20+ messages in thread
From: Tom Rini @ 2021-09-01 11:29 UTC (permalink / raw)
To: Stefan Roese; +Cc: u-boot, Marek Behún
[-- Attachment #1: Type: text/plain, Size: 4702 bytes --]
On Wed, Sep 01, 2021 at 07:27:54AM +0200, Stefan Roese wrote:
> Hi Tom,
>
> On 31.08.21 14:43, Tom Rini wrote:
> > On Tue, Aug 31, 2021 at 07:51:29AM +0200, Stefan Roese wrote:
> > > Hi Tom,
> > >
> > > On 21.08.21 19:50, Tom Rini wrote:
> > > > We have a number of CONFIG symbols to express the fixed size of system
> > > > memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
> > > > and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
> > > > size rather than MiB.
> > > >
> > > > Cc: Marek Behún <marek.behun@nic.cz>
> > > > Cc: Stefan Roese <sr@denx.de>
> > > > Signed-off-by: Tom Rini <trini@konsulko.com>
> > > > ---
> > > > drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++--
> > > > include/configs/maxbcm.h | 4 +++-
> > > > include/configs/theadorable.h | 4 +++-
> > > > 3 files changed, 8 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
> > > > index 270691e9bcd3..970651f87029 100644
> > > > --- a/drivers/ddr/marvell/axp/ddr3_axp.h
> > > > +++ b/drivers/ddr/marvell/axp/ddr3_axp.h
> > > > @@ -19,10 +19,10 @@
> > > > #define FAR_END_DIMM_ADDR 0x50
> > > > #define MAX_DIMM_ADDR 0x60
> > > > -#ifndef CONFIG_DDR_FIXED_SIZE
> > > > +#ifndef CONFIG_SYS_SDRAM_SIZE
> > > > #define SDRAM_CS_SIZE 0xFFFFFFF
> > > > #else
> > > > -#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
> > > > +#define SDRAM_CS_SIZE ((CONFIG_SYS_SDRAM_SIZE >> 10) - 1)
> > >
> > > Why are you using ">> 10" (dividing by 1024) here?
> > >
> > > Thanks,
> > > Stefan
> > >
> > > > #endif
> > > > #define SDRAM_CS_BASE 0x0
> > > > #define SDRAM_DIMM_SIZE 0x80000000
> > > > diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
> > > > index fc2393204bec..5098f12f5425 100644
> > > > --- a/include/configs/maxbcm.h
> > > > +++ b/include/configs/maxbcm.h
> > > > @@ -6,6 +6,8 @@
> > > > #ifndef _CONFIG_DB_MV7846MP_GP_H
> > > > #define _CONFIG_DB_MV7846MP_GP_H
> > > > +#include <linux/sizes.h>
> > > > +
> > > > /*
> > > > * High Level Configuration Options (easy to change)
> > > > */
> > > > @@ -65,7 +67,7 @@
> > > > /* SPL related SPI defines */
> > > > /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
> > > > -#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
> > > > +#define CONFIG_SYS_SDRAM_SIZE SZ_1G
> >
> > OK, so before my change, SDRAM_CS_SIZE = 0xfffff. After my change,
> > SDRAM_CS_SIZE = 0xfffff, still.
> >
> > > > #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
> > > > #endif /* _CONFIG_DB_MV7846MP_GP_H */
> > > > diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
> > > > index 760713d3ef87..abc48ff44ca5 100644
> > > > --- a/include/configs/theadorable.h
> > > > +++ b/include/configs/theadorable.h
> > > > @@ -6,6 +6,8 @@
> > > > #ifndef _CONFIG_THEADORABLE_H
> > > > #define _CONFIG_THEADORABLE_H
> > > > +#include <linux/sizes.h>
> > > > +
> > > > /*
> > > > * High Level Configuration Options (easy to change)
> > > > */
> > > > @@ -93,6 +95,6 @@
> > > > #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
> > > > /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
> > > > -#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
> > > > +#define CONFIG_SYS_SDRAM_SIZE SZ_2G
> >
> > Here, before SDRAM_CS_SIZE = 0x1fffff and then after SDRAM_CS_SIZE =
> > 0x1fffff.
> >
> > This is because CONFIG_DDR_FIXED_SIZE is kilobytes and
> > CONFIG_SYS_SDRAM_SIZE is bytes, yes? Thanks.
>
> Only if CONFIG_DDR_FIXED_SIZE / CONFIG_SYS_SDRAM_SIZE is undefined.
>
> Please see e.g. theadorable.h above. Here we have:
>
> #define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
>
> With this, the following will happen in ddr3_axp.h:
>
> #ifndef CONFIG_DDR_FIXED_SIZE
> #define SDRAM_CS_SIZE 0xFFFFFFF
> #else
> #define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
> #endif
>
> So SDRAM_CS_SIZE will be set to "(2 << 20) - 1".
>
> AFAICT, on Armada XP CONFIG_DDR_FIXED_SIZE is bytes and not
> kilobytes.
I'm not follow, sorry. There's exactly two defines of
CONFIG_DDR_FIXED_SIZE before this patch, neither platform also set
CONFIG_SYS_SDRAM_SIZE, and they're converted to CONFIG_SYS_SDRAM_SIZE
now. I did the evaluations to confirm the code is unchanged.
As an aside, I do need to get merging of Pali's series to finish
reproducible builds as I could then do a before/after world build where
I verify things by objdump before/after.
--
Tom
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 20+ messages in thread
* Re: [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
2021-09-01 11:29 ` Tom Rini
@ 2021-09-01 14:32 ` Stefan Roese
0 siblings, 0 replies; 20+ messages in thread
From: Stefan Roese @ 2021-09-01 14:32 UTC (permalink / raw)
To: Tom Rini; +Cc: u-boot, Marek Behún
On 01.09.21 13:29, Tom Rini wrote:
> On Wed, Sep 01, 2021 at 07:27:54AM +0200, Stefan Roese wrote:
>> Hi Tom,
>>
>> On 31.08.21 14:43, Tom Rini wrote:
>>> On Tue, Aug 31, 2021 at 07:51:29AM +0200, Stefan Roese wrote:
>>>> Hi Tom,
>>>>
>>>> On 21.08.21 19:50, Tom Rini wrote:
>>>>> We have a number of CONFIG symbols to express the fixed size of system
>>>>> memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
>>>>> and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
>>>>> size rather than MiB.
>>>>>
>>>>> Cc: Marek Behún <marek.behun@nic.cz>
>>>>> Cc: Stefan Roese <sr@denx.de>
>>>>> Signed-off-by: Tom Rini <trini@konsulko.com>
>>>>> ---
>>>>> drivers/ddr/marvell/axp/ddr3_axp.h | 4 ++--
>>>>> include/configs/maxbcm.h | 4 +++-
>>>>> include/configs/theadorable.h | 4 +++-
>>>>> 3 files changed, 8 insertions(+), 4 deletions(-)
>>>>>
>>>>> diff --git a/drivers/ddr/marvell/axp/ddr3_axp.h b/drivers/ddr/marvell/axp/ddr3_axp.h
>>>>> index 270691e9bcd3..970651f87029 100644
>>>>> --- a/drivers/ddr/marvell/axp/ddr3_axp.h
>>>>> +++ b/drivers/ddr/marvell/axp/ddr3_axp.h
>>>>> @@ -19,10 +19,10 @@
>>>>> #define FAR_END_DIMM_ADDR 0x50
>>>>> #define MAX_DIMM_ADDR 0x60
>>>>> -#ifndef CONFIG_DDR_FIXED_SIZE
>>>>> +#ifndef CONFIG_SYS_SDRAM_SIZE
>>>>> #define SDRAM_CS_SIZE 0xFFFFFFF
>>>>> #else
>>>>> -#define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
>>>>> +#define SDRAM_CS_SIZE ((CONFIG_SYS_SDRAM_SIZE >> 10) - 1)
>>>>
>>>> Why are you using ">> 10" (dividing by 1024) here?
>>>>
>>>> Thanks,
>>>> Stefan
>>>>
>>>>> #endif
>>>>> #define SDRAM_CS_BASE 0x0
>>>>> #define SDRAM_DIMM_SIZE 0x80000000
>>>>> diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h
>>>>> index fc2393204bec..5098f12f5425 100644
>>>>> --- a/include/configs/maxbcm.h
>>>>> +++ b/include/configs/maxbcm.h
>>>>> @@ -6,6 +6,8 @@
>>>>> #ifndef _CONFIG_DB_MV7846MP_GP_H
>>>>> #define _CONFIG_DB_MV7846MP_GP_H
>>>>> +#include <linux/sizes.h>
>>>>> +
>>>>> /*
>>>>> * High Level Configuration Options (easy to change)
>>>>> */
>>>>> @@ -65,7 +67,7 @@
>>>>> /* SPL related SPI defines */
>>>>> /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
>>>>> -#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */
>>>>> +#define CONFIG_SYS_SDRAM_SIZE SZ_1G
>>>
>>> OK, so before my change, SDRAM_CS_SIZE = 0xfffff. After my change,
>>> SDRAM_CS_SIZE = 0xfffff, still.
>>>
>>>>> #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */
>>>>> #endif /* _CONFIG_DB_MV7846MP_GP_H */
>>>>> diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
>>>>> index 760713d3ef87..abc48ff44ca5 100644
>>>>> --- a/include/configs/theadorable.h
>>>>> +++ b/include/configs/theadorable.h
>>>>> @@ -6,6 +6,8 @@
>>>>> #ifndef _CONFIG_THEADORABLE_H
>>>>> #define _CONFIG_THEADORABLE_H
>>>>> +#include <linux/sizes.h>
>>>>> +
>>>>> /*
>>>>> * High Level Configuration Options (easy to change)
>>>>> */
>>>>> @@ -93,6 +95,6 @@
>>>>> #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
>>>>> /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
>>>>> -#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
>>>>> +#define CONFIG_SYS_SDRAM_SIZE SZ_2G
>>>
>>> Here, before SDRAM_CS_SIZE = 0x1fffff and then after SDRAM_CS_SIZE =
>>> 0x1fffff.
>>>
>>> This is because CONFIG_DDR_FIXED_SIZE is kilobytes and
>>> CONFIG_SYS_SDRAM_SIZE is bytes, yes? Thanks.
>>
>> Only if CONFIG_DDR_FIXED_SIZE / CONFIG_SYS_SDRAM_SIZE is undefined.
>>
>> Please see e.g. theadorable.h above. Here we have:
>>
>> #define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */
>>
>> With this, the following will happen in ddr3_axp.h:
>>
>> #ifndef CONFIG_DDR_FIXED_SIZE
>> #define SDRAM_CS_SIZE 0xFFFFFFF
>> #else
>> #define SDRAM_CS_SIZE (CONFIG_DDR_FIXED_SIZE - 1)
>> #endif
>>
>> So SDRAM_CS_SIZE will be set to "(2 << 20) - 1".
>>
>> AFAICT, on Armada XP CONFIG_DDR_FIXED_SIZE is bytes and not
>> kilobytes.
>
> I'm not follow, sorry. There's exactly two defines of
> CONFIG_DDR_FIXED_SIZE before this patch, neither platform also set
> CONFIG_SYS_SDRAM_SIZE, and they're converted to CONFIG_SYS_SDRAM_SIZE
> now. I did the evaluations to confirm the code is unchanged.
Ah, now I see my misunderstanding. "2 << 20" is of course 2MiB and
not 2GiB. I was mislead by the comment in the header.
But now I'm thinking that SDRAM_CS_SIZE might need to be set to the
CS size in bytes and *not* in kilobytes for Armada XP. But this is a
different issue which I need to investigate and perhaps follow up on.
Thanks,
Stefan
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 5/9] mvebe: Migrate CONFIG_DDR_LOG_LEVEL to Kconfig
2021-08-21 17:50 [PATCH 1/9] Kconfig: Use spaces not tabs in Kconfig entires Tom Rini
` (2 preceding siblings ...)
2021-08-21 17:50 ` [PATCH 4/9] mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE Tom Rini
@ 2021-08-21 17:50 ` Tom Rini
2021-08-21 17:50 ` [PATCH 6/9] ddr: Migrate DDR_SPD " Tom Rini
` (4 subsequent siblings)
8 siblings, 0 replies; 20+ messages in thread
From: Tom Rini @ 2021-08-21 17:50 UTC (permalink / raw)
To: u-boot
Move this specific option to Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/mach-mvebu/Kconfig | 14 ++++++++++++++
drivers/ddr/marvell/axp/ddr3_axp_config.h | 4 ----
2 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-mvebu/Kconfig b/arch/arm/mach-mvebu/Kconfig
index 1daa64763b03..944bbee7634d 100644
--- a/arch/arm/mach-mvebu/Kconfig
+++ b/arch/arm/mach-mvebu/Kconfig
@@ -197,6 +197,20 @@ config DDR_32BIT
endchoice
+config DDR_LOG_LEVEL
+ int "DDR training code log level"
+ depends on ARMADA_XP
+ default 0
+ range 0 3
+ help
+ Amount of information provided on error while running the DDR
+ training code. At level 0, provides an error code in a case of
+ failure, RL, WL errors and other algorithm failure. At level 1,
+ provides the D-Unit setup (SPD/Static configuration). At level 2,
+ provides the windows margin as a results of DQS centeralization.
+ At level 3, rovides the windows margin of each DQ as a results of
+ DQS centeralization.
+
config SYS_BOARD
default "clearfog" if TARGET_CLEARFOG
default "helios4" if TARGET_HELIOS4
diff --git a/drivers/ddr/marvell/axp/ddr3_axp_config.h b/drivers/ddr/marvell/axp/ddr3_axp_config.h
index 10d064d0a308..437a02efbac9 100644
--- a/drivers/ddr/marvell/axp/ddr3_axp_config.h
+++ b/drivers/ddr/marvell/axp/ddr3_axp_config.h
@@ -16,11 +16,7 @@
* Level 3: Provides the windows margin of each DQ as a results of DQS
* centeralization
*/
-#ifdef CONFIG_DDR_LOG_LEVEL
#define DDR3_LOG_LEVEL CONFIG_DDR_LOG_LEVEL
-#else
-#define DDR3_LOG_LEVEL 0
-#endif
#define DDR3_PBS 1
--
2.17.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 6/9] ddr: Migrate DDR_SPD to Kconfig
2021-08-21 17:50 [PATCH 1/9] Kconfig: Use spaces not tabs in Kconfig entires Tom Rini
` (3 preceding siblings ...)
2021-08-21 17:50 ` [PATCH 5/9] mvebe: Migrate CONFIG_DDR_LOG_LEVEL to Kconfig Tom Rini
@ 2021-08-21 17:50 ` Tom Rini
2021-08-21 17:50 ` [PATCH 7/9] nxp: Migrate CONFIG_DDR_CLK_FREQ " Tom Rini
` (3 subsequent siblings)
8 siblings, 0 replies; 20+ messages in thread
From: Tom Rini @ 2021-08-21 17:50 UTC (permalink / raw)
To: u-boot
Move the symbol that controls building some JEDEC SPD support functions
to Kconfig. This is required on the TI keystone 2 platforms and very
frequently (but not always) used on large number of Freescale/NXP
platforms, so use imply there.
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/Kconfig | 1 +
drivers/ddr/Kconfig | 6 ++++++
drivers/ddr/fsl/Kconfig | 4 ++++
3 files changed, 11 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index d692139199c4..9c18c47540c7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -723,6 +723,7 @@ config ARCH_KEYSTONE
bool "TI Keystone"
select CMD_POWEROFF
select CPU_V7A
+ select DDR_SPD
select GPIO_EXTRA_HEADER
select SUPPORT_SPL
select SYS_ARCH_TIMER
diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig
index d4b393d25e07..0b767acee811 100644
--- a/drivers/ddr/Kconfig
+++ b/drivers/ddr/Kconfig
@@ -1,2 +1,8 @@
+config DDR_SPD
+ bool "JEDEC Serial Presence Detect (SPD) support"
+ help
+ For memory controllers that can utilize it, add enable support for
+ using the JEDEC SDP standard.
+
source "drivers/ddr/altera/Kconfig"
source "drivers/ddr/imx/Kconfig"
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index 8246f627982c..6461a54d7a8e 100644
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -116,22 +116,26 @@ choice
config SYS_FSL_DDR4
bool "Freescale DDR4 controller"
depends on SYS_FSL_HAS_DDR4
+ imply DDR_SPD
select SYS_FSL_DDRC_GEN4
config SYS_FSL_DDR3
bool "Freescale DDR3 controller"
depends on SYS_FSL_HAS_DDR3
+ imply DDR_SPD
select SYS_FSL_DDRC_GEN3 if PPC
select SYS_FSL_DDRC_ARM_GEN3 if ARM
config SYS_FSL_DDR2
bool "Freescale DDR2 controller"
depends on SYS_FSL_HAS_DDR2
+ imply DDR_SPD
select SYS_FSL_DDRC_GEN2 if (!MPC86xx && !SYS_FSL_DDRC_GEN3)
config SYS_FSL_DDR1
bool "Freescale DDR1 controller"
depends on SYS_FSL_HAS_DDR1
+ imply DDR_SPD
select SYS_FSL_DDRC_GEN1
endchoice
--
2.17.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 7/9] nxp: Migrate CONFIG_DDR_CLK_FREQ to Kconfig
2021-08-21 17:50 [PATCH 1/9] Kconfig: Use spaces not tabs in Kconfig entires Tom Rini
` (4 preceding siblings ...)
2021-08-21 17:50 ` [PATCH 6/9] ddr: Migrate DDR_SPD " Tom Rini
@ 2021-08-21 17:50 ` Tom Rini
2021-08-21 17:50 ` [PATCH 8/9] nxp: Migrate a number of DDR related symbols " Tom Rini
` (2 subsequent siblings)
8 siblings, 0 replies; 20+ messages in thread
From: Tom Rini @ 2021-08-21 17:50 UTC (permalink / raw)
To: u-boot
As this symbol can either be a fixed value or the function
get_board_ddr_clk, migration is tricky. Introduce a choice of DYNAMIC
or STATIC_DDR_CLK_FREQ. If DYNAMIC, we continue to use the board
defined get_board_ddr_clk function. If STATIC, set CONFIG_DDR_CLK_FREQ
to that value and now include/clock_legacy.h contains the function
prototype or defines get_board_ddr_clk() to that static value. Update
callers to test for DYNAMIC or STATIC.
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/arm/cpu/armv7/ls102xa/clock.c | 4 +--
.../armv8/fsl-layerscape/fsl_lsch2_speed.c | 4 +--
.../armv8/fsl-layerscape/fsl_lsch3_speed.c | 6 ++---
arch/powerpc/cpu/mpc85xx/cpu.c | 8 +++---
arch/powerpc/cpu/mpc85xx/speed.c | 9 ++++---
board/freescale/common/ics307_clk.h | 1 -
board/freescale/ls1021aqds/ls1021aqds.c | 2 ++
board/freescale/t102xrdb/spl.c | 5 ----
board/freescale/t102xrdb/t102xrdb.c | 5 ----
board/freescale/t104xrdb/spl.c | 5 ----
board/freescale/t208xrdb/spl.c | 5 ----
board/freescale/t208xrdb/t208xrdb.c | 5 ----
board/freescale/t4rdb/spl.c | 5 ----
configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 +
configs/P1010RDB-PA_36BIT_NOR_defconfig | 1 +
configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 +
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 +
configs/P1010RDB-PA_NAND_defconfig | 1 +
configs/P1010RDB-PA_NOR_defconfig | 1 +
configs/P1010RDB-PA_SDCARD_defconfig | 1 +
configs/P1010RDB-PA_SPIFLASH_defconfig | 1 +
configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 +
configs/P1010RDB-PB_36BIT_NOR_defconfig | 1 +
configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 +
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 +
configs/P1010RDB-PB_NAND_defconfig | 1 +
configs/P1010RDB-PB_NOR_defconfig | 1 +
configs/P1010RDB-PB_SDCARD_defconfig | 1 +
configs/P1010RDB-PB_SPIFLASH_defconfig | 1 +
configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 +
configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 +
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 +
configs/P1020RDB-PC_36BIT_defconfig | 1 +
configs/P1020RDB-PC_NAND_defconfig | 1 +
configs/P1020RDB-PC_SDCARD_defconfig | 1 +
configs/P1020RDB-PC_SPIFLASH_defconfig | 1 +
configs/P1020RDB-PC_defconfig | 1 +
configs/P1020RDB-PD_NAND_defconfig | 1 +
configs/P1020RDB-PD_SDCARD_defconfig | 1 +
configs/P1020RDB-PD_SPIFLASH_defconfig | 1 +
configs/P1020RDB-PD_defconfig | 1 +
configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 +
configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 +
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 +
configs/P2020RDB-PC_36BIT_defconfig | 1 +
configs/P2020RDB-PC_NAND_defconfig | 1 +
configs/P2020RDB-PC_SDCARD_defconfig | 1 +
configs/P2020RDB-PC_SPIFLASH_defconfig | 1 +
configs/P2020RDB-PC_defconfig | 1 +
configs/T1042D4RDB_NAND_defconfig | 1 +
configs/T1042D4RDB_SDCARD_defconfig | 1 +
configs/T1042D4RDB_SPIFLASH_defconfig | 1 +
configs/T1042D4RDB_defconfig | 1 +
configs/T2080QDS_NAND_defconfig | 1 +
configs/T2080QDS_SDCARD_defconfig | 1 +
configs/T2080QDS_SECURE_BOOT_defconfig | 1 +
configs/T2080QDS_SPIFLASH_defconfig | 1 +
configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 1 +
configs/T2080QDS_defconfig | 1 +
configs/T2080RDB_NAND_defconfig | 1 +
configs/T2080RDB_SDCARD_defconfig | 1 +
configs/T2080RDB_SPIFLASH_defconfig | 1 +
configs/T2080RDB_defconfig | 1 +
configs/T2080RDB_revD_NAND_defconfig | 1 +
configs/T2080RDB_revD_SDCARD_defconfig | 1 +
configs/T2080RDB_revD_SPIFLASH_defconfig | 1 +
configs/T2080RDB_revD_defconfig | 1 +
configs/T4240RDB_SDCARD_defconfig | 1 +
configs/T4240RDB_defconfig | 1 +
configs/UCP1020_defconfig | 1 +
configs/kmcent2_defconfig | 1 +
configs/ls1021aqds_ddr4_nor_defconfig | 1 +
configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 1 +
configs/ls1021aqds_nand_defconfig | 1 +
configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 1 +
configs/ls1021aqds_nor_defconfig | 1 +
configs/ls1021aqds_nor_lpuart_defconfig | 1 +
configs/ls1021aqds_sdcard_ifc_defconfig | 1 +
configs/ls1043aqds_defconfig | 1 +
configs/ls1043aqds_lpuart_defconfig | 1 +
configs/ls1043aqds_nand_defconfig | 1 +
configs/ls1043aqds_nor_ddr3_defconfig | 1 +
configs/ls1043aqds_qspi_defconfig | 1 +
configs/ls1043aqds_sdcard_ifc_defconfig | 1 +
configs/ls1043aqds_sdcard_qspi_defconfig | 1 +
configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/ls1043aqds_tfa_defconfig | 1 +
configs/ls1046aqds_SECURE_BOOT_defconfig | 1 +
configs/ls1046aqds_defconfig | 1 +
configs/ls1046aqds_lpuart_defconfig | 1 +
configs/ls1046aqds_nand_defconfig | 1 +
configs/ls1046aqds_qspi_defconfig | 1 +
configs/ls1046aqds_sdcard_ifc_defconfig | 1 +
configs/ls1046aqds_sdcard_qspi_defconfig | 1 +
configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/ls1046aqds_tfa_defconfig | 1 +
configs/ls1088aqds_defconfig | 1 +
configs/ls1088aqds_sdcard_ifc_defconfig | 1 +
configs/ls1088aqds_tfa_defconfig | 1 +
configs/ls2080aqds_SECURE_BOOT_defconfig | 1 +
configs/ls2080aqds_defconfig | 1 +
configs/ls2080aqds_nand_defconfig | 1 +
configs/ls2080aqds_qspi_defconfig | 1 +
configs/ls2080aqds_sdcard_defconfig | 1 +
configs/ls2080ardb_SECURE_BOOT_defconfig | 1 +
configs/ls2080ardb_defconfig | 1 +
configs/ls2080ardb_nand_defconfig | 1 +
configs/ls2081ardb_defconfig | 1 +
configs/ls2088aqds_tfa_defconfig | 1 +
configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 1 +
configs/ls2088ardb_qspi_defconfig | 1 +
configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 1 +
configs/ls2088ardb_tfa_defconfig | 1 +
configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2160aqds_tfa_defconfig | 1 +
configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2160ardb_tfa_defconfig | 1 +
configs/lx2160ardb_tfa_stmm_defconfig | 1 +
configs/lx2162aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/lx2162aqds_tfa_defconfig | 1 +
.../lx2162aqds_tfa_verified_boot_defconfig | 1 +
configs/pg_wcom_expu1_defconfig | 1 +
configs/pg_wcom_seli8_defconfig | 1 +
drivers/ddr/Kconfig | 26 +++++++++++++++++++
include/clock_legacy.h | 11 ++++++++
include/configs/P1010RDB.h | 1 -
include/configs/T102xRDB.h | 2 --
include/configs/T104xRDB.h | 1 -
include/configs/T208xQDS.h | 2 --
include/configs/T208xRDB.h | 2 --
include/configs/T4240RDB.h | 2 --
include/configs/UCP1020.h | 1 -
include/configs/km/pg-wcom-ls102xa.h | 6 -----
include/configs/kmcent2.h | 1 -
include/configs/kontron_sl28.h | 1 -
include/configs/ls1021aiot.h | 1 -
include/configs/ls1021aqds.h | 3 ---
include/configs/ls1021atsn.h | 1 -
include/configs/ls1021atwr.h | 1 -
include/configs/ls1028aqds.h | 1 -
include/configs/ls1028ardb.h | 1 -
include/configs/ls1043aqds.h | 2 --
include/configs/ls1043ardb.h | 1 -
include/configs/ls1046afrwy.h | 1 -
include/configs/ls1046aqds.h | 2 --
include/configs/ls1046ardb.h | 1 -
include/configs/ls1088aqds.h | 3 ---
include/configs/ls1088ardb.h | 1 -
include/configs/ls2080aqds.h | 2 --
include/configs/ls2080ardb.h | 1 -
include/configs/lx2160a_common.h | 2 --
include/configs/p1_p2_rdb_pc.h | 1 -
152 files changed, 166 insertions(+), 89 deletions(-)
diff --git a/arch/arm/cpu/armv7/ls102xa/clock.c b/arch/arm/cpu/armv7/ls102xa/clock.c
index 940995ef5af1..984ae8b87bd6 100644
--- a/arch/arm/cpu/armv7/ls102xa/clock.c
+++ b/arch/arm/cpu/armv7/ls102xa/clock.c
@@ -42,8 +42,8 @@ void get_sys_info(struct sys_info *sys_info)
unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
sys_info->freq_systembus = sysclk;
-#ifdef CONFIG_DDR_CLK_FREQ
- sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
+ sys_info->freq_ddrbus = get_board_ddr_clk();
#else
sys_info->freq_ddrbus = sysclk;
#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
index 63d34e1ec039..3f97c8aee4ab 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
@@ -61,8 +61,8 @@ void get_sys_info(struct sys_info *sys_info)
#endif
cluster_clk = CONFIG_CLUSTER_CLK_FREQ;
-#ifdef CONFIG_DDR_CLK_FREQ
- sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
+ sys_info->freq_ddrbus = get_board_ddr_clk();
#else
sys_info->freq_ddrbus = sysclk;
#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
index 25a1c36d2ac0..6f50cbad2ba9 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
@@ -78,10 +78,10 @@ void get_sys_info(struct sys_info *sys_info)
void *offset;
sys_info->freq_systembus = sysclk;
-#ifdef CONFIG_DDR_CLK_FREQ
- sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
+ sys_info->freq_ddrbus = get_board_ddr_clk();
#ifdef CONFIG_SYS_FSL_HAS_DP_DDR
- sys_info->freq_ddrbus2 = CONFIG_DDR_CLK_FREQ;
+ sys_info->freq_ddrbus2 = get_board_ddr_clk();
#endif
#else
sys_info->freq_ddrbus = sysclk;
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 610a8ec43f5b..cd32290410f6 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -11,6 +11,7 @@
#include <config.h>
#include <common.h>
#include <cpu_func.h>
+#include <clock_legacy.h>
#include <init.h>
#include <irq_func.h>
#include <log.h>
@@ -52,7 +53,8 @@ int checkcpu (void)
uint major, minor;
struct cpu_type *cpu;
char buf1[32], buf2[32];
-#if defined(CONFIG_DDR_CLK_FREQ) || defined(CONFIG_FSL_CORENET)
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || \
+ defined(CONFIG_STATIC_DDR_CLK_FREQ) || defined(CONFIG_FSL_CORENET)
ccsr_gur_t __iomem *gur =
(void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
#endif
@@ -70,12 +72,12 @@ int checkcpu (void)
>> FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT;
#endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
#else /* CONFIG_FSL_CORENET */
-#ifdef CONFIG_DDR_CLK_FREQ
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
>> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
#else
u32 ddr_ratio = 0;
-#endif /* CONFIG_DDR_CLK_FREQ */
+#endif /* CONFIG_DYNAMIC_DDR_CLK_FREQ || CONFIG_STATIC_DDR_CLK_FREQ */
#endif /* CONFIG_FSL_CORENET */
unsigned int i, core, nr_cores = cpu_numcores();
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index e229a5c5a7e0..1fe914a4e431 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -11,6 +11,7 @@
#include <common.h>
#include <cpu_func.h>
+#include <clock_legacy.h>
#include <ppc_asm.tmpl>
#include <asm/global_data.h>
#include <linux/compiler.h>
@@ -104,8 +105,8 @@ void get_sys_info(sys_info_t *sys_info)
sys_info->freq_ddrbus = CONFIG_SYS_CLK_FREQ;
else
#endif
-#ifdef CONFIG_DDR_CLK_FREQ
- sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
+ sys_info->freq_ddrbus = get_board_ddr_clk();
#else
sys_info->freq_ddrbus = sysclk;
#endif
@@ -538,12 +539,12 @@ void get_sys_info(sys_info_t *sys_info)
/* Note: freq_ddrbus is the MCLK frequency, not the data rate. */
sys_info->freq_ddrbus = sys_info->freq_systembus;
-#ifdef CONFIG_DDR_CLK_FREQ
+#if defined(CONFIG_DYNAMIC_DDR_CLK_FREQ) || defined(CONFIG_STATIC_DDR_CLK_FREQ)
{
u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
>> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
if (ddr_ratio != 0x7)
- sys_info->freq_ddrbus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
+ sys_info->freq_ddrbus = ddr_ratio * get_board_ddr_clk();
}
#endif
diff --git a/board/freescale/common/ics307_clk.h b/board/freescale/common/ics307_clk.h
index 81d1aa715d5c..163496930c87 100644
--- a/board/freescale/common/ics307_clk.h
+++ b/board/freescale/common/ics307_clk.h
@@ -8,7 +8,6 @@
#ifndef __ASSEMBLY__
extern unsigned long get_board_sys_clk(void);
-extern unsigned long get_board_ddr_clk(void);
extern unsigned long ics307_sysclk_calculator(unsigned long out_freq);
#endif
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 711d8c290661..fbbd27d9d71e 100644
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -127,6 +127,7 @@ unsigned long get_board_sys_clk(void)
return 66666666;
}
+#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ
unsigned long get_board_ddr_clk(void)
{
u8 ddrclk_conf = QIXIS_READ(brdcfg[1]);
@@ -141,6 +142,7 @@ unsigned long get_board_ddr_clk(void)
}
return 66666666;
}
+#endif
int dram_init(void)
{
diff --git a/board/freescale/t102xrdb/spl.c b/board/freescale/t102xrdb/spl.c
index 71566851d01d..ac373d772478 100644
--- a/board/freescale/t102xrdb/spl.c
+++ b/board/freescale/t102xrdb/spl.c
@@ -30,11 +30,6 @@ unsigned long get_board_sys_clk(void)
return CONFIG_SYS_CLK_FREQ;
}
-unsigned long get_board_ddr_clk(void)
-{
- return CONFIG_DDR_CLK_FREQ;
-}
-
#if defined(CONFIG_SPL_MMC_BOOT)
#define GPIO1_SD_SEL 0x00020000
int board_mmc_getcd(struct mmc *mmc)
diff --git a/board/freescale/t102xrdb/t102xrdb.c b/board/freescale/t102xrdb/t102xrdb.c
index 51a36abe369a..ab7675e2090c 100644
--- a/board/freescale/t102xrdb/t102xrdb.c
+++ b/board/freescale/t102xrdb/t102xrdb.c
@@ -167,11 +167,6 @@ unsigned long get_board_sys_clk(void)
return CONFIG_SYS_CLK_FREQ;
}
-unsigned long get_board_ddr_clk(void)
-{
- return CONFIG_DDR_CLK_FREQ;
-}
-
#ifdef CONFIG_TARGET_T1024RDB
void board_reset(void)
{
diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c
index f5fe73e62dca..c7df11100e04 100644
--- a/board/freescale/t104xrdb/spl.c
+++ b/board/freescale/t104xrdb/spl.c
@@ -30,11 +30,6 @@ unsigned long get_board_sys_clk(void)
return CONFIG_SYS_CLK_FREQ;
}
-unsigned long get_board_ddr_clk(void)
-{
- return CONFIG_DDR_CLK_FREQ;
-}
-
#define FSL_CORENET_CCSR_PORSR1_RCW_MASK 0xFF800000
void board_init_f(ulong bootflag)
{
diff --git a/board/freescale/t208xrdb/spl.c b/board/freescale/t208xrdb/spl.c
index b0ce9af0007a..2204a98ac8ae 100644
--- a/board/freescale/t208xrdb/spl.c
+++ b/board/freescale/t208xrdb/spl.c
@@ -29,11 +29,6 @@ unsigned long get_board_sys_clk(void)
return CONFIG_SYS_CLK_FREQ;
}
-unsigned long get_board_ddr_clk(void)
-{
- return CONFIG_DDR_CLK_FREQ;
-}
-
void board_init_f(ulong bootflag)
{
u32 plat_ratio, sys_clk, ccb_clk;
diff --git a/board/freescale/t208xrdb/t208xrdb.c b/board/freescale/t208xrdb/t208xrdb.c
index 1f0cdee0b863..1aa92178835c 100644
--- a/board/freescale/t208xrdb/t208xrdb.c
+++ b/board/freescale/t208xrdb/t208xrdb.c
@@ -114,11 +114,6 @@ unsigned long get_board_sys_clk(void)
return CONFIG_SYS_CLK_FREQ;
}
-unsigned long get_board_ddr_clk(void)
-{
- return CONFIG_DDR_CLK_FREQ;
-}
-
int misc_init_r(void)
{
u8 reg;
diff --git a/board/freescale/t4rdb/spl.c b/board/freescale/t4rdb/spl.c
index e2f9c9b3de29..69d1449b070c 100644
--- a/board/freescale/t4rdb/spl.c
+++ b/board/freescale/t4rdb/spl.c
@@ -35,11 +35,6 @@ unsigned long get_board_sys_clk(void)
return CONFIG_SYS_CLK_FREQ;
}
-unsigned long get_board_ddr_clk(void)
-{
- return CONFIG_DDR_CLK_FREQ;
-}
-
void board_init_f(ulong bootflag)
{
u32 plat_ratio, sys_clk, ccb_clk;
diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig
index 9625719c0f80..94887c3b9ac1 100644
--- a/configs/P1010RDB-PA_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig
@@ -49,6 +49,7 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig
index 34d2dbbb8135..5618b3ff1349 100644
--- a/configs/P1010RDB-PA_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
index efb696dd32f3..d1d7d1b3fdd8 100644
--- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig
@@ -44,6 +44,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
index 75ab1f64f903..3e3104007ac1 100644
--- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
@@ -46,6 +46,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig
index 827ec0cb6da8..717cd99b1b92 100644
--- a/configs/P1010RDB-PA_NAND_defconfig
+++ b/configs/P1010RDB-PA_NAND_defconfig
@@ -48,6 +48,7 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig
index baa245a9883e..897b4075abcd 100644
--- a/configs/P1010RDB-PA_NOR_defconfig
+++ b/configs/P1010RDB-PA_NOR_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig
index 1c725b99c1b6..a6f1f4c1c3f7 100644
--- a/configs/P1010RDB-PA_SDCARD_defconfig
+++ b/configs/P1010RDB-PA_SDCARD_defconfig
@@ -43,6 +43,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig
index 0798d3b7b8af..7406470ac766 100644
--- a/configs/P1010RDB-PA_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PA_SPIFLASH_defconfig
@@ -45,6 +45,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig
index ce16c196bdce..6a84cf95b5d7 100644
--- a/configs/P1010RDB-PB_36BIT_NAND_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig
@@ -49,6 +49,7 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig
index 8f149181030d..bbfd80a09f54 100644
--- a/configs/P1010RDB-PB_36BIT_NOR_defconfig
+++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
index 967d7af0ba10..c470e4b3bdfe 100644
--- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig
@@ -44,6 +44,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
index 2d3154e72c6e..58354594dd8d 100644
--- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
@@ -46,6 +46,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig
index 1d4d0fe9ae73..74005c6022d8 100644
--- a/configs/P1010RDB-PB_NAND_defconfig
+++ b/configs/P1010RDB-PB_NAND_defconfig
@@ -48,6 +48,7 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig
index a1c6fbf4d4f0..8f7b49cd9293 100644
--- a/configs/P1010RDB-PB_NOR_defconfig
+++ b/configs/P1010RDB-PB_NOR_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig
index f1b19f0415ed..eb70826c8217 100644
--- a/configs/P1010RDB-PB_SDCARD_defconfig
+++ b/configs/P1010RDB-PB_SDCARD_defconfig
@@ -43,6 +43,7 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig
index 261c120607a8..a436579a276f 100644
--- a/configs/P1010RDB-PB_SPIFLASH_defconfig
+++ b/configs/P1010RDB-PB_SPIFLASH_defconfig
@@ -45,6 +45,7 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
index 5a4cc22cb255..e5457c239899 100644
--- a/configs/P1020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -48,6 +48,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
index c24a57f13280..69e25f1d3efe 100644
--- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -44,6 +44,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
index 6bf0dd664e5b..aaf81b5dcc6d 100644
--- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -46,6 +46,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
index 86b36bcd3ba2..be260ba956f8 100644
--- a/configs/P1020RDB-PC_36BIT_defconfig
+++ b/configs/P1020RDB-PC_36BIT_defconfig
@@ -33,6 +33,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
index 8ef9170ef799..02cf34740abf 100644
--- a/configs/P1020RDB-PC_NAND_defconfig
+++ b/configs/P1020RDB-PC_NAND_defconfig
@@ -47,6 +47,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
index 708db07d61ed..7213151dc571 100644
--- a/configs/P1020RDB-PC_SDCARD_defconfig
+++ b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -43,6 +43,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
index 96bce812b6c2..20e3093f2c30 100644
--- a/configs/P1020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -45,6 +45,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
index 1af1d2cae92d..54495e91916d 100644
--- a/configs/P1020RDB-PC_defconfig
+++ b/configs/P1020RDB-PC_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
index 27402f6e922b..8ad165ca67bc 100644
--- a/configs/P1020RDB-PD_NAND_defconfig
+++ b/configs/P1020RDB-PD_NAND_defconfig
@@ -50,6 +50,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
index 51ceb84f23a9..fa0afeaa849d 100644
--- a/configs/P1020RDB-PD_SDCARD_defconfig
+++ b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -46,6 +46,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
index f95daa1be48c..e11d427b29ce 100644
--- a/configs/P1020RDB-PD_SPIFLASH_defconfig
+++ b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -48,6 +48,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
index bcc00dc84d66..f627839f1b4d 100644
--- a/configs/P1020RDB-PD_defconfig
+++ b/configs/P1020RDB-PD_defconfig
@@ -35,6 +35,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
index 85fe2f33db7f..c657a8c6b03f 100644
--- a/configs/P2020RDB-PC_36BIT_NAND_defconfig
+++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -52,6 +52,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
index 61ac850c7300..be07e341edab 100644
--- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -48,6 +48,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
index b011006a433f..147310bd7818 100644
--- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -50,6 +50,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
index 3f9c9f3357aa..e82178f228ec 100644
--- a/configs/P2020RDB-PC_36BIT_defconfig
+++ b/configs/P2020RDB-PC_36BIT_defconfig
@@ -37,6 +37,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
index 7d81ce63261f..6843f5a225cc 100644
--- a/configs/P2020RDB-PC_NAND_defconfig
+++ b/configs/P2020RDB-PC_NAND_defconfig
@@ -51,6 +51,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
index fd98748b4a0b..9812ab4eaf80 100644
--- a/configs/P2020RDB-PC_SDCARD_defconfig
+++ b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -47,6 +47,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
index 0bc6cb5b6454..5b943e178b6e 100644
--- a/configs/P2020RDB-PC_SPIFLASH_defconfig
+++ b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -49,6 +49,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
index cd9d8dad8719..d8898dca1359 100644
--- a/configs/P2020RDB-PC_defconfig
+++ b/configs/P2020RDB-PC_defconfig
@@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index c15c5a2694ba..3519b3b20825 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -50,6 +50,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 2bd35288813b..f94d1bdda51d 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -48,6 +48,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index d56e5a800b1e..802d0d43295e 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -50,6 +50,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index cf6c264f8f90..3e7b9dadd0e7 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -36,6 +36,7 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 06d4f66385ab..13e15343557d 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -48,6 +48,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index 45a3bbb71849..9454d192ce2d 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -46,6 +46,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index 739fbf8d70d8..14aea879eab5 100644
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -33,6 +33,7 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 921760c3807b..3365c6c19cfd 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -48,6 +48,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index c7bc3ecf7a3d..adf4bd076ca7 100644
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_REMOTE=y
CONFIG_ENV_ADDR=0xFFE20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index f92a4573bf10..ac54d5e996a1 100644
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -34,6 +34,7 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index 95a2c778fc00..d03ffd4e87c1 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -52,6 +52,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 21d22df4eb3e..0776aac5db04 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -50,6 +50,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 393b6db28632..9932bef7597f 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -52,6 +52,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index 24e927c73507..8fd35b5a6b43 100644
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -38,6 +38,7 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
index 250c2d5e962a..414f867fda70 100644
--- a/configs/T2080RDB_revD_NAND_defconfig
+++ b/configs/T2080RDB_revD_NAND_defconfig
@@ -53,6 +53,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
index d5eea40797ab..b501809092b1 100644
--- a/configs/T2080RDB_revD_SDCARD_defconfig
+++ b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -51,6 +51,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
index 4d38f4b978f8..f71190d48a29 100644
--- a/configs/T2080RDB_revD_SPIFLASH_defconfig
+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -53,6 +53,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig
index 2ecbabf99ec4..0e05d45fb1d5 100644
--- a/configs/T2080RDB_revD_defconfig
+++ b/configs/T2080RDB_revD_defconfig
@@ -39,6 +39,7 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133330000
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index 2230e674fcb2..58382acda15a 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -43,6 +43,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index abb2137d91ee..25bfbe4e8920 100644
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -31,6 +31,7 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig
index 1fdb1952c8fd..96b4c31ecbc1 100644
--- a/configs/UCP1020_defconfig
+++ b/configs/UCP1020_defconfig
@@ -35,6 +35,7 @@ CONFIG_CMD_FAT=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEC0C0000
+CONFIG_DDR_CLK_FREQ=66666666
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig
index 102af968397f..dafd5dacbcea 100644
--- a/configs/kmcent2_defconfig
+++ b/configs/kmcent2_defconfig
@@ -44,6 +44,7 @@ CONFIG_ENV_ADDR_REDUND=0xebf00000
CONFIG_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=66666666
CONFIG_SYS_FSL_DDR3=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_FSL=y
diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index cf64f0fc7621..5b89d1f0d1b6 100644
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -43,6 +43,7 @@ CONFIG_ENV_ADDR=0x60300000
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index cb63fb65e82a..3fec9b1befff 100644
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -44,6 +44,7 @@ CONFIG_ENV_ADDR=0x60300000
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 072a1e6c7397..1042cc1ffac9 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -60,6 +60,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index e9d29f431449..579b898da716 100644
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -41,6 +41,7 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index 4c4050a403c2..c1f41612468a 100644
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -43,6 +43,7 @@ CONFIG_ENV_ADDR=0x60300000
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index 3378fc1e787e..8162324835d6 100644
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -44,6 +44,7 @@ CONFIG_ENV_ADDR=0x60300000
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index 50ba009d70fd..ce43422af074 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -58,6 +58,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index d89f6571bd05..75962f32b3b5 100644
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -40,6 +40,7 @@ CONFIG_ENV_ADDR=0x60300000
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index 8e4eaf22bec6..228b417b9d36 100644
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -41,6 +41,7 @@ CONFIG_ENV_ADDR=0x60300000
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index 0bc43273e22b..32b15ad83279 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -57,6 +57,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index 1fbb5ea0b80d..d5125f473d9d 100644
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -40,6 +40,7 @@ CONFIG_ENV_ADDR=0x60300000
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
index 4f7e457a36cc..a80d9cad1ec7 100644
--- a/configs/ls1043aqds_qspi_defconfig
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -42,6 +42,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index 8e780b31cb09..34eaa516416c 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -57,6 +57,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index 2cb088cddec0..46d82ddc5b4d 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -55,6 +55,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
index 6b908edc8688..d58abe185647 100644
--- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
@@ -39,6 +39,7 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig
index a229001d8af8..59966bd8e0c9 100644
--- a/configs/ls1043aqds_tfa_defconfig
+++ b/configs/ls1043aqds_tfa_defconfig
@@ -49,6 +49,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig
index 1e70e37fe592..96f58508bdce 100644
--- a/configs/ls1046aqds_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@@ -38,6 +38,7 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig
index 7351e490566c..a5d7ece1ca44 100644
--- a/configs/ls1046aqds_defconfig
+++ b/configs/ls1046aqds_defconfig
@@ -41,6 +41,7 @@ CONFIG_ENV_ADDR=0x60300000
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig
index c6f8a363475b..0c8c37afe7b9 100644
--- a/configs/ls1046aqds_lpuart_defconfig
+++ b/configs/ls1046aqds_lpuart_defconfig
@@ -42,6 +42,7 @@ CONFIG_ENV_ADDR=0x60300000
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index c406d866bd0c..cab575e726de 100644
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -50,6 +50,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig
index a088c82904d9..b6784de4fe2a 100644
--- a/configs/ls1046aqds_qspi_defconfig
+++ b/configs/ls1046aqds_qspi_defconfig
@@ -42,6 +42,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index 15f8d45a2515..d7a87124bc82 100644
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -59,6 +59,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig
index 3278cd2d2a80..76bf82b3ff85 100644
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@@ -57,6 +57,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
index 42d67dc70720..f577526ca662 100644
--- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
@@ -40,6 +40,7 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig
index 8ae5159f423b..103c5d8d1552 100644
--- a/configs/ls1046aqds_tfa_defconfig
+++ b/configs/ls1046aqds_tfa_defconfig
@@ -49,6 +49,7 @@ CONFIG_ENV_ADDR=0x40500000
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig
index ef35ae4a0778..dd8c8c1cee4b 100644
--- a/configs/ls1088aqds_defconfig
+++ b/configs/ls1088aqds_defconfig
@@ -44,6 +44,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig
index 10e1fecee236..b0cc24600bae 100644
--- a/configs/ls1088aqds_sdcard_ifc_defconfig
+++ b/configs/ls1088aqds_sdcard_ifc_defconfig
@@ -55,6 +55,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig
index a2d0d6da57b9..fadc1c4d546b 100644
--- a/configs/ls1088aqds_tfa_defconfig
+++ b/configs/ls1088aqds_tfa_defconfig
@@ -54,6 +54,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index fcbd732dd67e..1cdbd9f76704 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index 3a457a72d7a8..5a62113f4a17 100644
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -39,6 +39,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index e4c7a301633e..ae371baa7896 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -50,6 +50,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index 0b0e673816af..620380f97f43 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -41,6 +41,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
index 29df680d0604..5366e7556168 100644
--- a/configs/ls2080aqds_sdcard_defconfig
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -48,6 +48,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index b1477eac1416..4ae2e7fa73f1 100644
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_CLK_FREQ=133333333
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index c107bcddad76..b9c3a327200c 100644
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -39,6 +39,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index 6615958ae4ea..3c340e483ad9 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -49,6 +49,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig
index da02de270fb5..87ea7c85ed33 100644
--- a/configs/ls2081ardb_defconfig
+++ b/configs/ls2081ardb_defconfig
@@ -39,6 +39,7 @@ CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig
index 113f6a4139fb..a45227e147e8 100644
--- a/configs/ls2088aqds_tfa_defconfig
+++ b/configs/ls2088aqds_tfa_defconfig
@@ -49,6 +49,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
index 0201fce1a720..1699ca9bec0b 100644
--- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
@@ -35,6 +35,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_CLK_FREQ=133333333
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig
index 336a0a7b32be..890dd48d5f17 100644
--- a/configs/ls2088ardb_qspi_defconfig
+++ b/configs/ls2088ardb_qspi_defconfig
@@ -42,6 +42,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
index 1799c09fbfb8..5e4071b47f4e 100644
--- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
@@ -40,6 +40,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_CLK_FREQ=133333333
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig
index cfd3df430f82..2e0aada697de 100644
--- a/configs/ls2088ardb_tfa_defconfig
+++ b/configs/ls2088ardb_tfa_defconfig
@@ -47,6 +47,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_CLK_FREQ=133333333
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index ed4304c70486..62d414af987a 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -41,6 +41,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index faa8da770b55..fba8747687e7 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -48,6 +48,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index f8511cb193d9..3ddce7285178 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -39,6 +39,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index 004eb7de74fa..d8cffb598e75 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -47,6 +47,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig
index 140f851ba27a..824e5a97fbdd 100644
--- a/configs/lx2160ardb_tfa_stmm_defconfig
+++ b/configs/lx2160ardb_tfa_stmm_defconfig
@@ -47,6 +47,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
index 7ade20205c6d..ea0e784c9f85 100644
--- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
@@ -42,6 +42,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_MPC8XXX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig
index 2724f045ed63..207c8092a8d3 100644
--- a/configs/lx2162aqds_tfa_defconfig
+++ b/configs/lx2162aqds_tfa_defconfig
@@ -49,6 +49,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_MPC8XXX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig
index fa2a02753f47..68b83dd43f85 100644
--- a/configs/lx2162aqds_tfa_verified_boot_defconfig
+++ b/configs/lx2162aqds_tfa_verified_boot_defconfig
@@ -50,6 +50,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_MPC8XXX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig
index 27e8192ded7c..e5d405ed5e9c 100644
--- a/configs/pg_wcom_expu1_defconfig
+++ b/configs/pg_wcom_expu1_defconfig
@@ -48,6 +48,7 @@ CONFIG_ENV_ADDR=0x60060000
CONFIG_ENV_ADDR_REDUND=0x60040000
CONFIG_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_DDR_CLK_FREQ=50000000
CONFIG_SYS_FSL_DDR3=y
CONFIG_SYS_I2C_MXC=y
# CONFIG_MMC is not set
diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig
index 99389d64059a..f535b3d4aa14 100644
--- a/configs/pg_wcom_seli8_defconfig
+++ b/configs/pg_wcom_seli8_defconfig
@@ -48,6 +48,7 @@ CONFIG_ENV_ADDR=0x60060000
CONFIG_ENV_ADDR_REDUND=0x60040000
CONFIG_DM=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_DDR_CLK_FREQ=50000000
CONFIG_SYS_FSL_DDR3=y
CONFIG_SYS_I2C_MXC=y
# CONFIG_MMC is not set
diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig
index 0b767acee811..eec9d480b096 100644
--- a/drivers/ddr/Kconfig
+++ b/drivers/ddr/Kconfig
@@ -1,3 +1,29 @@
+choice
+ prompt "Method to determine DDR clock frequency"
+ default STATIC_DDR_CLK_FREQ
+ depends on ARCH_P1010 || ARCH_P1020 || ARCH_P2020 || ARCH_T1024 \
+ || ARCH_T1042 || ARCH_T2080 || ARCH_T4240 || ARCH_LS1021A \
+ || FSL_LSCH2 || FSL_LSCH3 || TARGET_KMCENT2
+ help
+ The DDR clock frequency can either be defined statically now at
+ build time, or can be determined at run-time via the
+ get_board_ddr_clk function.
+
+config DYNAMIC_DDR_CLK_FREQ
+ bool "Run-time DDR clock frequency"
+
+config STATIC_DDR_CLK_FREQ
+ bool "Build-time static DDR clock frequency"
+
+endchoice
+
+config DDR_CLK_FREQ
+ int "DDR clock frequency in Hz"
+ depends on STATIC_DDR_CLK_FREQ
+ default 100000000
+ help
+ The DDR clock frequency, specified in Hz.
+
config DDR_SPD
bool "JEDEC Serial Presence Detect (SPD) support"
help
diff --git a/include/clock_legacy.h b/include/clock_legacy.h
index b0a8333ea6eb..29261b680d00 100644
--- a/include/clock_legacy.h
+++ b/include/clock_legacy.h
@@ -11,4 +11,15 @@ int get_clocks(void);
unsigned long get_bus_freq(unsigned long dummy);
int get_serial_clock(void);
+/*
+ * If we have CONFIG_DYNAMIC_DDR_CLK_FREQ then there will be an
+ * implentation of get_board_ddr_clk() somewhere. Otherwise we have
+ * a static value to use now.
+ */
+#ifdef CONFIG_DYNAMIC_DDR_CLK_FREQ
+unsigned long get_board_ddr_clk(void);
+#else
+#define get_board_ddr_clk() CONFIG_DDR_CLK_FREQ
+#endif
+
#endif
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index b7e44d173739..6c7482b7eade 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -153,7 +153,6 @@
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#endif
-#define CONFIG_DDR_CLK_FREQ 66666666 /* DDRCLK on P1010 RDB */
#define CONFIG_SYS_CLK_FREQ 66666666 /* SYSCLK for P1010 RDB */
#define CONFIG_HWCONFIG
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 187304419e6f..0f8ae607f141 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -134,11 +134,9 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
/*
* These can be toggled for performance analysis, otherwise use default.
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index fb215bb05fba..b6fbce33e89a 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -164,7 +164,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 66666666
/*
* These can be toggled for performance analysis, otherwise use default.
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index f61b40fb3bd7..d1dd8598218a 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -109,11 +109,9 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
/*
* Config the L3 Cache as L3 SRAM
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 63cc5af2c6da..f8d4304645df 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -98,11 +98,9 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ 66660000
-#define CONFIG_DDR_CLK_FREQ 133330000
/*
* Config the L3 Cache as L3 SRAM
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 57a39fa970f5..44a4f3a29823 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -254,11 +254,9 @@
"bootm 0x01000000 - 0x00f00000"
#define CONFIG_SYS_CLK_FREQ 66666666
-#define CONFIG_DDR_CLK_FREQ 133333333
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
/*
diff --git a/include/configs/UCP1020.h b/include/configs/UCP1020.h
index 70dbb4cb0d20..3faff98ef7bd 100644
--- a/include/configs/UCP1020.h
+++ b/include/configs/UCP1020.h
@@ -149,7 +149,6 @@
#define CONFIG_LBA48
#define CONFIG_SYS_CLK_FREQ 66666666
-#define CONFIG_DDR_CLK_FREQ 66666666
#define CONFIG_HWCONFIG
diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h
index a4cc4777290d..eaeb4f13d488 100644
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -26,12 +26,6 @@
CONFIG_KM_RESERVED_PRAM) >> 10)
#define CONFIG_SYS_CLK_FREQ 66666666
-/*
- * Take into account default implementation where DDR_FDBK_MULTI is consider as
- * configured for DDR_PLL = 2*MEM_PLL_RAT.
- * In our case DDR_FDBK_MULTI is 2, means DDR_PLL = MEM_PLL_RAT.
- */
-#define CONFIG_DDR_CLK_FREQ (100000000 >> 1)
#define PHYS_SDRAM 0x80000000
#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index 51a01d860f0e..21732fef6e57 100644
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -177,7 +177,6 @@
#define CONFIG_VERY_BIG_RAM
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_DDR_CLK_FREQ 66666666
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h
index bfb4e67c8f45..30633fa796aa 100644
--- a/include/configs/kontron_sl28.h
+++ b/include/configs/kontron_sl28.h
@@ -53,7 +53,6 @@
#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
/* ethernet */
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 4c448c6b64ba..6c1d1beb7278 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -20,7 +20,6 @@
#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
/*
* DDR: 800 MHz ( 1600 MT/s data rate )
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 598f6c67a1b2..db5ec76470cf 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -25,16 +25,13 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define CONFIG_QIXIS_I2C_ACCESS
#else
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#endif
#ifdef CONFIG_RAMBOOT_PBL
diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h
index 58c2d97a327f..6428704bdc9e 100644
--- a/include/configs/ls1021atsn.h
+++ b/include/configs/ls1021atsn.h
@@ -22,7 +22,6 @@
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define DDR_SDRAM_CFG 0x470c0008
#define DDR_CS0_BNDS 0x008000bf
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index ba308c514b9d..1fea9cfcc465 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -23,7 +23,6 @@
#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define DDR_SDRAM_CFG 0x470c0008
#define DDR_CS0_BNDS 0x008000bf
diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h
index 9ae37b96cebe..fe20363e690f 100644
--- a/include/configs/ls1028aqds.h
+++ b/include/configs/ls1028aqds.h
@@ -9,7 +9,6 @@
#include "ls1028a_common.h"
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
/* DDR */
diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h
index 1a80cb945dfb..348db1e2f8c1 100644
--- a/include/configs/ls1028ardb.h
+++ b/include/configs/ls1028ardb.h
@@ -9,7 +9,6 @@
#include "ls1028a_common.h"
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
#define CONFIG_SYS_RTC_BUS_NUM 0
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 1636f0bb8ff0..869db0d59afe 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -10,11 +10,9 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#define CONFIG_SKIP_LOWLEVEL_INIT
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 84b83e625956..4a2ad9754bf1 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -9,7 +9,6 @@
#include "ls1043a_common.h"
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define CONFIG_LAYERSCAPE_NS_ACCESS
diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h
index fade815f2608..52cae55355bb 100644
--- a/include/configs/ls1046afrwy.h
+++ b/include/configs/ls1046afrwy.h
@@ -9,7 +9,6 @@
#include "ls1046a_common.h"
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define CONFIG_LAYERSCAPE_NS_ACCESS
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 9102c812b5bc..443ac2f5dd8a 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -10,11 +10,9 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#define CONFIG_SKIP_LOWLEVEL_INIT
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index dddaa2541718..88b2d2726a0c 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -10,7 +10,6 @@
#include "ls1046a_common.h"
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define CONFIG_LAYERSCAPE_NS_ACCESS
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 78ccc2dc5bfc..c59874f43356 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -11,7 +11,6 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#ifdef CONFIG_TFABOOT
@@ -23,14 +22,12 @@ unsigned long get_board_ddr_clk(void);
#define SYS_NO_FLASH
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#else
#define CONFIG_QIXIS_I2C_ACCESS
#if !CONFIG_IS_ENABLED(DM_I2C)
#define CONFIG_SYS_I2C_EARLY_INIT
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#endif
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index ad3043bbdb34..329aabc5eeb9 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -17,7 +17,6 @@
#endif
#define CONFIG_SYS_CLK_FREQ 100000000
-#define CONFIG_DDR_CLK_FREQ 100000000
#define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 8bfe4b9811c9..097c47ec9545 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -11,7 +11,6 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#ifdef CONFIG_FSL_QSPI
@@ -24,7 +23,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_I2C_FPGA_ADDR 0x66
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)
#define CONFIG_DDR_SPD
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 49c2cc573bcd..c875f16d6457 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -39,7 +39,6 @@ unsigned long get_board_sys_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ 133333333
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)
#define CONFIG_DDR_SPD
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 1338ee3cda3b..7bb563ead37b 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -158,11 +158,9 @@
#ifndef __ASSEMBLY__
unsigned long get_board_sys_clk(void);
-unsigned long get_board_ddr_clk(void);
#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
-#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk()
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ / 4)
#define CONFIG_HWCONFIG
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 54c82b4f3352..cfa6ba876992 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -157,7 +157,6 @@
#else
#define CONFIG_SYS_CLK_FREQ 66666666
#endif
-#define CONFIG_DDR_CLK_FREQ 66666666
#define CONFIG_HWCONFIG
/*
--
2.17.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 8/9] nxp: Migrate a number of DDR related symbols to Kconfig
2021-08-21 17:50 [PATCH 1/9] Kconfig: Use spaces not tabs in Kconfig entires Tom Rini
` (5 preceding siblings ...)
2021-08-21 17:50 ` [PATCH 7/9] nxp: Migrate CONFIG_DDR_CLK_FREQ " Tom Rini
@ 2021-08-21 17:50 ` Tom Rini
2021-08-21 17:50 ` [PATCH 9/9] Convert CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT " Tom Rini
2021-08-31 22:09 ` [PATCH 1/9] Kconfig: Use spaces not tabs in Kconfig entires Tom Rini
8 siblings, 0 replies; 20+ messages in thread
From: Tom Rini @ 2021-08-21 17:50 UTC (permalink / raw)
To: u-boot
- Guard most of the options in drivers/ddr/fsl/Kconfig with
SYS_FSL_DDR || SYS_FSL_MMDC.
- Migrate FSL_DMA, DDR_ECC, DDR_ECC_CMD, and ECC_INIT_VIA_DDRCONTROLLER
to Kconfig.
- Clean up the logic for including the DDR_ECC_CMD code.
Signed-off-by: Tom Rini <trini@konsulko.com>
---
arch/powerpc/cpu/mpc83xx/Makefile | 2 +-
arch/powerpc/cpu/mpc83xx/ecc.c | 2 --
arch/powerpc/include/asm/config.h | 8 -------
configs/MPC8349EMDS_PCI64_defconfig | 2 ++
configs/MPC8349EMDS_SDRAM_defconfig | 2 ++
configs/MPC8349EMDS_SLAVE_defconfig | 2 ++
configs/MPC8349EMDS_defconfig | 2 ++
configs/MPC8548CDS_36BIT_defconfig | 2 ++
configs/MPC8548CDS_defconfig | 2 ++
configs/MPC8548CDS_legacy_defconfig | 2 ++
configs/P3041DS_NAND_defconfig | 2 ++
configs/P3041DS_SDCARD_defconfig | 2 ++
configs/P3041DS_SPIFLASH_defconfig | 2 ++
configs/P3041DS_defconfig | 2 ++
configs/P4080DS_SDCARD_defconfig | 2 ++
configs/P4080DS_SPIFLASH_defconfig | 2 ++
configs/P4080DS_defconfig | 2 ++
configs/P5040DS_NAND_defconfig | 2 ++
configs/P5040DS_SDCARD_defconfig | 2 ++
configs/P5040DS_SPIFLASH_defconfig | 2 ++
configs/P5040DS_defconfig | 2 ++
configs/T1024RDB_NAND_defconfig | 2 ++
configs/T1024RDB_SDCARD_defconfig | 2 ++
configs/T1024RDB_SPIFLASH_defconfig | 2 ++
configs/T1024RDB_defconfig | 2 ++
configs/T1042D4RDB_NAND_defconfig | 2 ++
configs/T1042D4RDB_SDCARD_defconfig | 2 ++
configs/T1042D4RDB_SPIFLASH_defconfig | 2 ++
configs/T1042D4RDB_defconfig | 2 ++
configs/T2080QDS_NAND_defconfig | 2 ++
configs/T2080QDS_SDCARD_defconfig | 2 ++
configs/T2080QDS_SECURE_BOOT_defconfig | 2 ++
configs/T2080QDS_SPIFLASH_defconfig | 2 ++
configs/T2080QDS_SRIO_PCIE_BOOT_defconfig | 2 ++
configs/T2080QDS_defconfig | 2 ++
configs/T2080RDB_NAND_defconfig | 2 ++
configs/T2080RDB_SDCARD_defconfig | 2 ++
configs/T2080RDB_SPIFLASH_defconfig | 2 ++
configs/T2080RDB_defconfig | 2 ++
configs/T2080RDB_revD_NAND_defconfig | 2 ++
configs/T2080RDB_revD_SDCARD_defconfig | 2 ++
configs/T2080RDB_revD_SPIFLASH_defconfig | 2 ++
configs/T2080RDB_revD_defconfig | 2 ++
configs/T4240RDB_SDCARD_defconfig | 2 ++
configs/T4240RDB_defconfig | 2 ++
configs/UCP1020_defconfig | 1 +
configs/kontron_sl28_defconfig | 2 ++
configs/ls1021aqds_ddr4_nor_defconfig | 2 ++
configs/ls1021aqds_ddr4_nor_lpuart_defconfig | 2 ++
configs/ls1021aqds_nand_defconfig | 2 ++
configs/ls1021aqds_nor_SECURE_BOOT_defconfig | 2 ++
configs/ls1021aqds_nor_defconfig | 2 ++
configs/ls1021aqds_nor_lpuart_defconfig | 2 ++
configs/ls1021aqds_qspi_defconfig | 2 ++
configs/ls1021aqds_sdcard_ifc_defconfig | 2 ++
configs/ls1021aqds_sdcard_qspi_defconfig | 2 ++
configs/ls1028aqds_tfa_SECURE_BOOT_defconfig | 1 +
configs/ls1028aqds_tfa_defconfig | 1 +
configs/ls1028aqds_tfa_lpuart_defconfig | 1 +
configs/ls1028ardb_tfa_SECURE_BOOT_defconfig | 1 +
configs/ls1028ardb_tfa_defconfig | 1 +
configs/ls1043aqds_defconfig | 2 ++
configs/ls1043aqds_lpuart_defconfig | 2 ++
configs/ls1043aqds_nand_defconfig | 2 ++
configs/ls1043aqds_nor_ddr3_defconfig | 2 ++
configs/ls1043aqds_qspi_defconfig | 2 ++
configs/ls1043aqds_sdcard_ifc_defconfig | 2 ++
configs/ls1043aqds_sdcard_qspi_defconfig | 2 ++
configs/ls1043aqds_tfa_SECURE_BOOT_defconfig | 2 ++
configs/ls1043aqds_tfa_defconfig | 2 ++
configs/ls1043ardb_SECURE_BOOT_defconfig | 2 ++
configs/ls1043ardb_defconfig | 2 ++
configs/ls1043ardb_tfa_SECURE_BOOT_defconfig | 2 ++
configs/ls1043ardb_tfa_defconfig | 2 ++
configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig | 1 +
configs/ls1046afrwy_tfa_defconfig | 1 +
configs/ls1046aqds_SECURE_BOOT_defconfig | 2 ++
configs/ls1046aqds_defconfig | 2 ++
configs/ls1046aqds_lpuart_defconfig | 2 ++
configs/ls1046aqds_nand_defconfig | 2 ++
configs/ls1046aqds_qspi_defconfig | 2 ++
configs/ls1046aqds_sdcard_ifc_defconfig | 2 ++
configs/ls1046aqds_sdcard_qspi_defconfig | 2 ++
configs/ls1046aqds_tfa_SECURE_BOOT_defconfig | 2 ++
configs/ls1046aqds_tfa_defconfig | 2 ++
configs/ls1046ardb_emmc_defconfig | 2 ++
configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 2 ++
configs/ls1046ardb_qspi_defconfig | 2 ++
configs/ls1046ardb_qspi_spl_defconfig | 2 ++
.../ls1046ardb_sdcard_SECURE_BOOT_defconfig | 2 ++
configs/ls1046ardb_sdcard_defconfig | 2 ++
configs/ls1046ardb_tfa_SECURE_BOOT_defconfig | 2 ++
configs/ls1046ardb_tfa_defconfig | 2 ++
configs/ls1088aqds_defconfig | 2 ++
configs/ls1088aqds_qspi_SECURE_BOOT_defconfig | 2 ++
configs/ls1088aqds_qspi_defconfig | 2 ++
configs/ls1088aqds_sdcard_ifc_defconfig | 2 ++
configs/ls1088aqds_sdcard_qspi_defconfig | 2 ++
configs/ls1088aqds_tfa_defconfig | 2 ++
configs/ls1088ardb_qspi_SECURE_BOOT_defconfig | 2 ++
configs/ls1088ardb_qspi_defconfig | 2 ++
...1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 2 ++
configs/ls1088ardb_sdcard_qspi_defconfig | 2 ++
configs/ls1088ardb_tfa_SECURE_BOOT_defconfig | 2 ++
configs/ls1088ardb_tfa_defconfig | 2 ++
configs/ls2080aqds_SECURE_BOOT_defconfig | 2 ++
configs/ls2080aqds_defconfig | 2 ++
configs/ls2080aqds_nand_defconfig | 2 ++
configs/ls2080aqds_qspi_defconfig | 2 ++
configs/ls2080aqds_sdcard_defconfig | 2 ++
configs/ls2080ardb_SECURE_BOOT_defconfig | 2 ++
configs/ls2080ardb_defconfig | 2 ++
configs/ls2080ardb_nand_defconfig | 2 ++
configs/ls2081ardb_defconfig | 2 ++
configs/ls2088aqds_tfa_defconfig | 2 ++
configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 2 ++
configs/ls2088ardb_qspi_defconfig | 2 ++
configs/ls2088ardb_tfa_SECURE_BOOT_defconfig | 2 ++
configs/ls2088ardb_tfa_defconfig | 2 ++
configs/lx2160aqds_tfa_SECURE_BOOT_defconfig | 2 ++
configs/lx2160aqds_tfa_defconfig | 2 ++
configs/lx2160ardb_tfa_SECURE_BOOT_defconfig | 2 ++
configs/lx2160ardb_tfa_defconfig | 2 ++
configs/lx2160ardb_tfa_stmm_defconfig | 2 ++
configs/lx2162aqds_tfa_SECURE_BOOT_defconfig | 2 ++
configs/lx2162aqds_tfa_defconfig | 2 ++
.../lx2162aqds_tfa_verified_boot_defconfig | 2 ++
drivers/ddr/fsl/Kconfig | 21 +++++++++++++++++++
include/configs/MPC8349EMDS.h | 3 ---
include/configs/MPC8349EMDS_SDRAM.h | 3 ---
include/configs/MPC837XERDB.h | 3 ---
include/configs/MPC8540ADS.h | 1 -
include/configs/MPC8548CDS.h | 3 ---
include/configs/MPC8560ADS.h | 1 -
include/configs/P1010RDB.h | 1 -
include/configs/P2041RDB.h | 2 --
include/configs/T102xRDB.h | 3 ---
include/configs/T104xRDB.h | 4 ----
include/configs/T208xQDS.h | 3 ---
include/configs/T208xRDB.h | 3 ---
include/configs/T4240RDB.h | 5 -----
include/configs/corenet_ds.h | 4 ----
include/configs/k2e_evm.h | 2 --
include/configs/k2hk_evm.h | 2 --
include/configs/km/pg-wcom-ls102xa.h | 2 --
include/configs/kmcent2.h | 2 --
include/configs/kontron_sl28.h | 2 --
include/configs/ls1021aqds.h | 3 ---
include/configs/ls1043aqds.h | 3 ---
include/configs/ls1043ardb.h | 1 -
include/configs/ls1046aqds.h | 3 ---
include/configs/ls1046ardb.h | 3 ---
include/configs/ls1088aqds.h | 3 ---
include/configs/ls1088ardb.h | 3 ---
include/configs/ls2080aqds.h | 3 ---
include/configs/ls2080ardb.h | 3 ---
include/configs/lx2160a_common.h | 3 ---
include/configs/p1_p2_rdb_pc.h | 1 -
include/configs/socrates.h | 2 --
159 files changed, 262 insertions(+), 91 deletions(-)
diff --git a/arch/powerpc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile
index aeb42b109d04..7c4ef7657e5b 100644
--- a/arch/powerpc/cpu/mpc83xx/Makefile
+++ b/arch/powerpc/cpu/mpc83xx/Makefile
@@ -26,7 +26,7 @@ obj-y += cpu.o
obj-y += cpu_init.o
obj-y += speed.o
obj-y += interrupts.o
-obj-y += ecc.o
+obj-$(CONFIG_DDR_ECC_CMD) += ecc.o
ifndef CONFIG_PINCTRL
obj-$(CONFIG_QE) += qe_io.o
endif
diff --git a/arch/powerpc/cpu/mpc83xx/ecc.c b/arch/powerpc/cpu/mpc83xx/ecc.c
index 7a8ec7f42f1c..3e24752e2f6c 100644
--- a/arch/powerpc/cpu/mpc83xx/ecc.c
+++ b/arch/powerpc/cpu/mpc83xx/ecc.c
@@ -11,7 +11,6 @@
#include <mpc83xx.h>
#include <command.h>
-#if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD)
void ecc_print_status(void)
{
immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
@@ -386,4 +385,3 @@ U_BOOT_CMD(ecc, 4, 0, do_ecc,
" - writes pattern injecting errors with word access\n"
" - writes pattern with word access, generates error\n"
" - disables injects\n" " - re-inits memory");
-#endif
diff --git a/arch/powerpc/include/asm/config.h b/arch/powerpc/include/asm/config.h
index 2a78551ce39c..a97b72de1b88 100644
--- a/arch/powerpc/include/asm/config.h
+++ b/arch/powerpc/include/asm/config.h
@@ -26,14 +26,6 @@
#endif
#endif
-/* Check if boards need to enable FSL DMA engine for SDRAM init */
-#if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC)
-#if ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \
- !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER))
-#define CONFIG_FSL_DMA
-#endif
-#endif
-
/*
* Provide a default boot page translation virtual address that lines up with
* Freescale's default e500 reset page.
diff --git a/configs/MPC8349EMDS_PCI64_defconfig b/configs/MPC8349EMDS_PCI64_defconfig
index 8652ff2adcc6..88ccd73239a9 100644
--- a/configs/MPC8349EMDS_PCI64_defconfig
+++ b/configs/MPC8349EMDS_PCI64_defconfig
@@ -99,6 +99,8 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_ADDR=0xFE080000
CONFIG_ENV_ADDR_REDUND=0xFE0A0000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MPC8349EMDS_SDRAM_defconfig b/configs/MPC8349EMDS_SDRAM_defconfig
index a79fb0e2b476..0033f35a50a3 100644
--- a/configs/MPC8349EMDS_SDRAM_defconfig
+++ b/configs/MPC8349EMDS_SDRAM_defconfig
@@ -108,6 +108,8 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_ADDR=0xFE080000
CONFIG_ENV_ADDR_REDUND=0xFE0A0000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MPC8349EMDS_SLAVE_defconfig b/configs/MPC8349EMDS_SLAVE_defconfig
index 2b7d2fd43fc3..102b260f7830 100644
--- a/configs/MPC8349EMDS_SLAVE_defconfig
+++ b/configs/MPC8349EMDS_SLAVE_defconfig
@@ -99,6 +99,8 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_ADDR=0xFE080000
CONFIG_ENV_ADDR_REDUND=0xFE0A0000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MPC8349EMDS_defconfig b/configs/MPC8349EMDS_defconfig
index d8c7951385fc..ded4ba7114cf 100644
--- a/configs/MPC8349EMDS_defconfig
+++ b/configs/MPC8349EMDS_defconfig
@@ -100,6 +100,8 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
CONFIG_ENV_ADDR=0xFE080000
CONFIG_ENV_ADDR_REDUND=0xFE0A0000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index 72ec1e0f77a1..6b59091fe45f 100644
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -24,6 +24,8 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_ADDR=0xFFF60000
CONFIG_DM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index 9db54768fb5d..23a93ccd179b 100644
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -23,6 +23,8 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_ADDR=0xFFF60000
CONFIG_DM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index 83f7382e9167..5c74e3335236 100644
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -23,6 +23,8 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_ADDR=0xFFF60000
CONFIG_DM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index 20ab931d3e6d..7f11fdea2327 100644
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -32,6 +32,8 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index 87ed18dc5186..3531a0b3cefb 100644
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -32,6 +32,8 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index 48ca8b731d53..fd5f373165d1 100644
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -33,6 +33,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index 4369f404a551..27fb80862e86 100644
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -31,6 +31,8 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index 97ef317b07f9..fe098194b278 100644
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -32,6 +32,8 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index 6447124c6e03..7e66a9958efc 100644
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -33,6 +33,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index f6c43bcd2908..5febfba5f053 100644
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -31,6 +31,8 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index 1a55f498b940..cf291e2d66dd 100644
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -33,6 +33,8 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index 85c8da153760..c4258d9f3e73 100644
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -32,6 +32,8 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index 48020df78cfb..de37e39dabbe 100644
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -33,6 +33,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index 2be7c7769e46..b2633878c4e9 100644
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -31,6 +31,8 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index 0a3cc7b4cc3a..daf48b4be556 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -55,6 +55,8 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index 814cde6e4e33..4f0e26e33e7c 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -53,6 +53,8 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index 825d9102c39b..982aca9eef3e 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -55,6 +55,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index 3533b78ba231..8506bc397cb4 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -41,6 +41,8 @@ CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 3519b3b20825..3a7ec8b923d0 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -51,6 +51,8 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index f94d1bdda51d..e83d202315e1 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -49,6 +49,8 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 802d0d43295e..47532ee62104 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -51,6 +51,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 3e7b9dadd0e7..a34470b0107f 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -37,6 +37,8 @@ CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=66666666
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 13e15343557d..c745bebf2871 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -49,6 +49,8 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index 9454d192ce2d..135305be9d45 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -47,6 +47,8 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index 14aea879eab5..5ebb99bb5942 100644
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -34,6 +34,8 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index 3365c6c19cfd..bedc9c7bf120 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -49,6 +49,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index adf4bd076ca7..2d5da1dcab79 100644
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -32,6 +32,8 @@ CONFIG_ENV_ADDR=0xFFE20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index ac54d5e996a1..f303c8e7e7c3 100644
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -35,6 +35,8 @@ CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index d03ffd4e87c1..b030d91d9020 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -53,6 +53,8 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index 0776aac5db04..e9b25689ab60 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -51,6 +51,8 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index 9932bef7597f..1dccdaeb358b 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -53,6 +53,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig
index 8fd35b5a6b43..bde63d1baae0 100644
--- a/configs/T2080RDB_defconfig
+++ b/configs/T2080RDB_defconfig
@@ -39,6 +39,8 @@ CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
index 414f867fda70..2eb150ce4b3f 100644
--- a/configs/T2080RDB_revD_NAND_defconfig
+++ b/configs/T2080RDB_revD_NAND_defconfig
@@ -54,6 +54,8 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
index b501809092b1..951b2a70b4ca 100644
--- a/configs/T2080RDB_revD_SDCARD_defconfig
+++ b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -52,6 +52,8 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
index f71190d48a29..f4f1c8145110 100644
--- a/configs/T2080RDB_revD_SPIFLASH_defconfig
+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -54,6 +54,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig
index 0e05d45fb1d5..9d602a6b4088 100644
--- a/configs/T2080RDB_revD_defconfig
+++ b/configs/T2080RDB_revD_defconfig
@@ -40,6 +40,8 @@ CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133330000
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index 58382acda15a..1586e5024983 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -44,6 +44,8 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index 25bfbe4e8920..55503565abf8 100644
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -32,6 +32,8 @@ CONFIG_ENV_ADDR=0xEFF20000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/UCP1020_defconfig b/configs/UCP1020_defconfig
index 96b4c31ecbc1..1e3de938211b 100644
--- a/configs/UCP1020_defconfig
+++ b/configs/UCP1020_defconfig
@@ -36,6 +36,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0xEC0C0000
CONFIG_DDR_CLK_FREQ=66666666
+# CONFIG_DDR_SPD is not set
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig
index e15928bead29..baeb6e7d6ca8 100644
--- a/configs/kontron_sl28_defconfig
+++ b/configs/kontron_sl28_defconfig
@@ -60,6 +60,8 @@ CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
CONFIG_I2C_MUX=y
diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index 5b89d1f0d1b6..0a68f8fcd77f 100644
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -44,6 +44,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index 3fec9b1befff..b2822e16d6b0 100644
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -45,6 +45,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig
index 1042cc1ffac9..7fc3804b3368 100644
--- a/configs/ls1021aqds_nand_defconfig
+++ b/configs/ls1021aqds_nand_defconfig
@@ -62,6 +62,8 @@ CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index 579b898da716..8bff39d33530 100644
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -43,6 +43,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index c1f41612468a..12f457b56cff 100644
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -45,6 +45,8 @@ CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index 8162324835d6..0212b44fe9eb 100644
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -46,6 +46,8 @@ CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1021aqds_qspi_defconfig b/configs/ls1021aqds_qspi_defconfig
index 69a02a4af906..11e0934046de 100644
--- a/configs/ls1021aqds_qspi_defconfig
+++ b/configs/ls1021aqds_qspi_defconfig
@@ -45,6 +45,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig
index ce43422af074..03be1c282baa 100644
--- a/configs/ls1021aqds_sdcard_ifc_defconfig
+++ b/configs/ls1021aqds_sdcard_ifc_defconfig
@@ -60,6 +60,8 @@ CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig
index 0c74e9b51343..8e9bddb47a31 100644
--- a/configs/ls1021aqds_sdcard_qspi_defconfig
+++ b/configs/ls1021aqds_sdcard_qspi_defconfig
@@ -57,6 +57,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
index 5b60c4af8d9b..4cfa30c1744f 100644
--- a/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028aqds_tfa_SECURE_BOOT_defconfig
@@ -40,6 +40,7 @@ CONFIG_NETCONSOLE=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig
index 311cfe3c7a2b..2ec17c2d26d8 100644
--- a/configs/ls1028aqds_tfa_defconfig
+++ b/configs/ls1028aqds_tfa_defconfig
@@ -46,6 +46,7 @@ CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig
index 6805f5eaaa18..2ce208cff079 100644
--- a/configs/ls1028aqds_tfa_lpuart_defconfig
+++ b/configs/ls1028aqds_tfa_lpuart_defconfig
@@ -46,6 +46,7 @@ CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
index 7eecbae13e75..0f5c20a340e9 100644
--- a/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1028ardb_tfa_SECURE_BOOT_defconfig
@@ -39,6 +39,7 @@ CONFIG_NETCONSOLE=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls1028ardb_tfa_defconfig b/configs/ls1028ardb_tfa_defconfig
index 6934a597a52c..3153e4c6bca8 100644
--- a/configs/ls1028ardb_tfa_defconfig
+++ b/configs/ls1028ardb_tfa_defconfig
@@ -45,6 +45,7 @@ CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index 75962f32b3b5..ed0b0d5687d4 100644
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -41,6 +41,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index 228b417b9d36..16319efff005 100644
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -42,6 +42,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index 32b15ad83279..9432df4fce42 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -58,6 +58,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index d5125f473d9d..95b4001eb328 100644
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -42,6 +42,8 @@ CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
CONFIG_SYS_FSL_DDR3=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
index a80d9cad1ec7..f7ee48843d77 100644
--- a/configs/ls1043aqds_qspi_defconfig
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -43,6 +43,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index 34eaa516416c..9fd9d3d41c4f 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -58,6 +58,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index 46d82ddc5b4d..8f78a9b0b167 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -56,6 +56,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
index d58abe185647..96b77130c6c6 100644
--- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
@@ -40,6 +40,8 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig
index 59966bd8e0c9..3e7789317e86 100644
--- a/configs/ls1043aqds_tfa_defconfig
+++ b/configs/ls1043aqds_tfa_defconfig
@@ -50,6 +50,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index 8885896f7b12..3703a550c25e 100644
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -28,6 +28,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
+# CONFIG_DDR_SPD is not set
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index 413e0c7941c7..10c6d832ae5a 100644
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -31,6 +31,8 @@ CONFIG_ENV_IS_IN_FLASH=y
CONFIG_ENV_ADDR=0x60300000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+# CONFIG_DDR_SPD is not set
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
index a3c17f0b9a02..79f9323c9f72 100644
--- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
@@ -30,6 +30,8 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=60000000.nor:2m@0x100000(nor_bank0_uboot),40m@
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
+# CONFIG_DDR_SPD is not set
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig
index 58313e4ae510..5efccfbb9bb6 100644
--- a/configs/ls1043ardb_tfa_defconfig
+++ b/configs/ls1043ardb_tfa_defconfig
@@ -36,6 +36,8 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_ENV_ADDR=0x60500000
CONFIG_DM=y
CONFIG_FSL_CAAM=y
+# CONFIG_DDR_SPD is not set
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig
index b5100282dc1c..d215d1302159 100644
--- a/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046afrwy_tfa_SECURE_BOOT_defconfig
@@ -32,6 +32,7 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046afrwy_tfa_defconfig b/configs/ls1046afrwy_tfa_defconfig
index 96ab70bfaf51..8cc5e31e6b4e 100644
--- a/configs/ls1046afrwy_tfa_defconfig
+++ b/configs/ls1046afrwy_tfa_defconfig
@@ -38,6 +38,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+# CONFIG_DDR_SPD is not set
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig
index 96f58508bdce..9eb78ab87c73 100644
--- a/configs/ls1046aqds_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@@ -39,6 +39,8 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig
index a5d7ece1ca44..0b89cc0aa614 100644
--- a/configs/ls1046aqds_defconfig
+++ b/configs/ls1046aqds_defconfig
@@ -42,6 +42,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig
index 0c8c37afe7b9..fe00916fcd14 100644
--- a/configs/ls1046aqds_lpuart_defconfig
+++ b/configs/ls1046aqds_lpuart_defconfig
@@ -43,6 +43,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index cab575e726de..b099b8452a4d 100644
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -51,6 +51,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig
index b6784de4fe2a..3bf3c0d56dab 100644
--- a/configs/ls1046aqds_qspi_defconfig
+++ b/configs/ls1046aqds_qspi_defconfig
@@ -43,6 +43,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index d7a87124bc82..56b836f42b70 100644
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -60,6 +60,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig
index 76bf82b3ff85..509c1417074a 100644
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@@ -58,6 +58,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
index f577526ca662..a1d8882de302 100644
--- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
@@ -41,6 +41,8 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig
index 103c5d8d1552..a9808a9cf596 100644
--- a/configs/ls1046aqds_tfa_defconfig
+++ b/configs/ls1046aqds_tfa_defconfig
@@ -50,6 +50,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig
index eeb6e939ba13..ab0db0201f5c 100644
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@@ -52,6 +52,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
index edb20e7e9f8b..f880ba867bee 100644
--- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
@@ -33,6 +33,8 @@ CONFIG_ENV_OVERWRITE=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig
index 087c17bb6136..6dc53ae8e5a3 100644
--- a/configs/ls1046ardb_qspi_defconfig
+++ b/configs/ls1046ardb_qspi_defconfig
@@ -37,6 +37,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig
index 45ee90447da8..369b1cb779da 100644
--- a/configs/ls1046ardb_qspi_spl_defconfig
+++ b/configs/ls1046ardb_qspi_spl_defconfig
@@ -56,6 +56,8 @@ CONFIG_SPL_ENV_IS_NOWHERE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
index c46d0dbedd3f..682167168962 100644
--- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig
@@ -50,6 +50,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SPL_DM=y
# CONFIG_SPL_BLK is not set
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
# CONFIG_SPL_DM_I2C is not set
# CONFIG_SPL_DM_MMC is not set
diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig
index cd53d48b538a..62a1abe58377 100644
--- a/configs/ls1046ardb_sdcard_defconfig
+++ b/configs/ls1046ardb_sdcard_defconfig
@@ -51,6 +51,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
index bc37699c0a60..d3b78732bbd7 100644
--- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
@@ -33,6 +33,8 @@ CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig
index 997fa1936e7a..05f461685ce0 100644
--- a/configs/ls1046ardb_tfa_defconfig
+++ b/configs/ls1046ardb_tfa_defconfig
@@ -39,6 +39,8 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig
index dd8c8c1cee4b..c63c9277449e 100644
--- a/configs/ls1088aqds_defconfig
+++ b/configs/ls1088aqds_defconfig
@@ -45,6 +45,8 @@ CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
index eddfd40733c4..a72236668344 100644
--- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
@@ -42,6 +42,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig
index 255b97739cbe..9c0812fa5486 100644
--- a/configs/ls1088aqds_qspi_defconfig
+++ b/configs/ls1088aqds_qspi_defconfig
@@ -45,6 +45,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig
index b0cc24600bae..5b0dff584be6 100644
--- a/configs/ls1088aqds_sdcard_ifc_defconfig
+++ b/configs/ls1088aqds_sdcard_ifc_defconfig
@@ -56,6 +56,8 @@ CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig
index a8023113a093..92cecbba75f6 100644
--- a/configs/ls1088aqds_sdcard_qspi_defconfig
+++ b/configs/ls1088aqds_sdcard_qspi_defconfig
@@ -55,6 +55,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig
index fadc1c4d546b..09872bfd31c6 100644
--- a/configs/ls1088aqds_tfa_defconfig
+++ b/configs/ls1088aqds_tfa_defconfig
@@ -55,6 +55,8 @@ CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
index dae51c4e70cb..0132c6563323 100644
--- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
@@ -44,6 +44,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig
index 6032f6ca8b11..9d613171cc97 100644
--- a/configs/ls1088ardb_qspi_defconfig
+++ b/configs/ls1088ardb_qspi_defconfig
@@ -47,6 +47,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
index 96d44799fa84..0b3fe93d4e35 100644
--- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
@@ -58,6 +58,8 @@ CONFIG_DM=y
CONFIG_SPL_DM=y
CONFIG_SCSI_AHCI=y
# CONFIG_SPL_BLK is not set
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
# CONFIG_SPL_DM_MMC is not set
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig
index 28affca58ba0..664c8c4b4c27 100644
--- a/configs/ls1088ardb_sdcard_qspi_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_defconfig
@@ -57,6 +57,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
index 69a3cef7a406..46ccfa3ba2af 100644
--- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
@@ -45,6 +45,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig
index 794908962526..e483378ce136 100644
--- a/configs/ls1088ardb_tfa_defconfig
+++ b/configs/ls1088ardb_tfa_defconfig
@@ -51,6 +51,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig
index 1cdbd9f76704..68d7b86f911a 100644
--- a/configs/ls2080aqds_SECURE_BOOT_defconfig
+++ b/configs/ls2080aqds_SECURE_BOOT_defconfig
@@ -37,6 +37,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig
index 5a62113f4a17..cd84c4461a52 100644
--- a/configs/ls2080aqds_defconfig
+++ b/configs/ls2080aqds_defconfig
@@ -40,6 +40,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig
index ae371baa7896..108cf10d4d4e 100644
--- a/configs/ls2080aqds_nand_defconfig
+++ b/configs/ls2080aqds_nand_defconfig
@@ -51,6 +51,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig
index 620380f97f43..8c74e9a5b19a 100644
--- a/configs/ls2080aqds_qspi_defconfig
+++ b/configs/ls2080aqds_qspi_defconfig
@@ -42,6 +42,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig
index 5366e7556168..4b0726deb427 100644
--- a/configs/ls2080aqds_sdcard_defconfig
+++ b/configs/ls2080aqds_sdcard_defconfig
@@ -49,6 +49,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig
index 4ae2e7fa73f1..044286148608 100644
--- a/configs/ls2080ardb_SECURE_BOOT_defconfig
+++ b/configs/ls2080ardb_SECURE_BOOT_defconfig
@@ -37,6 +37,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig
index b9c3a327200c..fab2004911a6 100644
--- a/configs/ls2080ardb_defconfig
+++ b/configs/ls2080ardb_defconfig
@@ -40,6 +40,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig
index 3c340e483ad9..53b7ccbc4aa0 100644
--- a/configs/ls2080ardb_nand_defconfig
+++ b/configs/ls2080ardb_nand_defconfig
@@ -50,6 +50,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_MTD_NOR_FLASH=y
diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig
index 87ea7c85ed33..887a915493c8 100644
--- a/configs/ls2081ardb_defconfig
+++ b/configs/ls2081ardb_defconfig
@@ -40,6 +40,8 @@ CONFIG_SCSI_AHCI=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls2088aqds_tfa_defconfig b/configs/ls2088aqds_tfa_defconfig
index a45227e147e8..7dca32f6ee28 100644
--- a/configs/ls2088aqds_tfa_defconfig
+++ b/configs/ls2088aqds_tfa_defconfig
@@ -50,6 +50,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
index 1699ca9bec0b..844e9f8db255 100644
--- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig
@@ -36,6 +36,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig
index 890dd48d5f17..3b6efd02df45 100644
--- a/configs/ls2088ardb_qspi_defconfig
+++ b/configs/ls2088ardb_qspi_defconfig
@@ -43,6 +43,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
index 5e4071b47f4e..3bdb04f55c73 100644
--- a/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls2088ardb_tfa_SECURE_BOOT_defconfig
@@ -41,6 +41,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/ls2088ardb_tfa_defconfig b/configs/ls2088ardb_tfa_defconfig
index 2e0aada697de..ddbb00cafcd0 100644
--- a/configs/ls2088ardb_tfa_defconfig
+++ b/configs/ls2088ardb_tfa_defconfig
@@ -48,6 +48,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DDR_CLK_FREQ=133333333
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index 62d414af987a..173e727fa64d 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -42,6 +42,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index fba8747687e7..1bff7f02c3c1 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -49,6 +49,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 3ddce7285178..d0083ae8a28d 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -40,6 +40,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index d8cffb598e75..a110c7973812 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -48,6 +48,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig
index 824e5a97fbdd..88fc3c5c6f5a 100644
--- a/configs/lx2160ardb_tfa_stmm_defconfig
+++ b/configs/lx2160ardb_tfa_stmm_defconfig
@@ -48,6 +48,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_DEFAULT_BUS_NUMBER=0
diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
index ea0e784c9f85..22c28963facc 100644
--- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
@@ -43,6 +43,8 @@ CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_MPC8XXX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig
index 207c8092a8d3..756c00d0beeb 100644
--- a/configs/lx2162aqds_tfa_defconfig
+++ b/configs/lx2162aqds_tfa_defconfig
@@ -50,6 +50,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_MPC8XXX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig
index 68b83dd43f85..04a32cec1654 100644
--- a/configs/lx2162aqds_tfa_verified_boot_defconfig
+++ b/configs/lx2162aqds_tfa_verified_boot_defconfig
@@ -51,6 +51,8 @@ CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
CONFIG_DYNAMIC_DDR_CLK_FREQ=y
+CONFIG_DDR_ECC=y
+CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
CONFIG_MPC8XXX_GPIO=y
CONFIG_DM_I2C=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index 6461a54d7a8e..fe3d6fc9700e 100644
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -10,6 +10,8 @@ config SYS_FSL_MMDC
help
Select Freescale Multi Mode DDR controller (MMDC).
+if SYS_FSL_DDR || SYS_FSL_MMDC
+
config SYS_FSL_DDR_BE
bool
help
@@ -142,6 +144,25 @@ endchoice
endmenu
+config FSL_DMA
+ def_bool y if DDR_ECC && MPC85xx && !ECC_INIT_VIA_DDRCONTROLLER
+
+config DDR_ECC
+ bool "ECC DDR memory support"
+
+config DDR_ECC_CMD
+ bool "Access the ECC features of the memory controller"
+ depends on DDR_ECC && MPC83xx
+ default y
+
+config ECC_INIT_VIA_DDRCONTROLLER
+ bool "DDR Memory controller initializes memory."
+ help
+ Use the DDR controller to auto initialize memory. If not enabled,
+ the DMA controller is responsible for doing this.
+
+endif
+
config SYS_FSL_ERRATUM_A008378
bool
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 97f6d2678dab..490ce7b5552a 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -22,8 +22,6 @@
/*
* DDR Setup
*/
-#define CONFIG_DDR_ECC /* support DDR ECC function */
-#define CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
/*
@@ -35,7 +33,6 @@
#define SPD_EEPROM_ADDRESS2 0x51
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory*/
diff --git a/include/configs/MPC8349EMDS_SDRAM.h b/include/configs/MPC8349EMDS_SDRAM.h
index 4c1073d52720..e8cd73f83611 100644
--- a/include/configs/MPC8349EMDS_SDRAM.h
+++ b/include/configs/MPC8349EMDS_SDRAM.h
@@ -22,8 +22,6 @@
/*
* DDR Setup
*/
-#define CONFIG_DDR_ECC /* support DDR ECC function */
-#define CONFIG_DDR_ECC_CMD /* use DDR ECC user commands */
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
/*
@@ -35,7 +33,6 @@
#define SPD_EEPROM_ADDRESS2 0x51
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_SDRAM_BASE 0x00000000 /* DDR is system memory*/
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index f60bc5c1ee0e..1ad20892d4a4 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -66,9 +66,6 @@
#define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_DHC_EN | DDRCDR_ODT | DDRCDR_Q_DRN)
-#undef CONFIG_DDR_ECC /* support DDR ECC function */
-#undef CONFIG_DDR_ECC_CMD /* Use DDR ECC user commands */
-
#undef CONFIG_NEVER_ASSERT_ODT_TO_CPU /* Never assert ODT to internal IOs */
/*
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index ac9afa179a5f..daeb36a7f7d4 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -62,7 +62,6 @@
/* DDR Setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
-#define CONFIG_DDR_SPD
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index d3e5da0c43ac..35e0cdac3bd0 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -45,10 +45,7 @@ extern unsigned long get_clock_freq(void);
/* DDR Setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
-#define CONFIG_DDR_SPD
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 02aeb6f3d536..83e343026ec2 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -63,7 +63,6 @@
/* DDR Setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
-#define CONFIG_DDR_SPD
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 6c7482b7eade..e133b61a7627 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -167,7 +167,6 @@
/* DDR Setup */
#define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 1
#define SPD_EEPROM_ADDRESS 0x52
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 4ef061343c1f..bb852961b59f 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -104,8 +104,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
-
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x52
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 0f8ae607f141..c392695a930a 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -145,9 +145,7 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -185,7 +183,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
#if defined(CONFIG_TARGET_T1024RDB)
-#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index b6fbce33e89a..68551535b353 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -172,9 +172,7 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -210,8 +208,6 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_sd_rcw.cfg
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
-
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x51
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index d1dd8598218a..3d3e3b50e626 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -101,9 +101,7 @@
*/
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -142,7 +140,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_DIMM_SLOTS_PER_CTLR 2
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */
#define SPD_EEPROM_ADDRESS1 0x51
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index f8d4304645df..c2ed44761cee 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -90,9 +90,7 @@
*/
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -131,7 +129,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 0
#define CONFIG_SYS_SDRAM_SIZE 2048 /* for fixed parameter use */
#define SPD_EEPROM_ADDRESS1 0x51
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 44a4f3a29823..143e3e837089 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -50,8 +50,6 @@
#endif
#endif /* CONFIG_RAMBOOT_PBL */
-#define CONFIG_DDR_ECC
-
/* High Level Configuration Options */
#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */
@@ -72,7 +70,6 @@
#define CONFIG_SYS_CACHE_STASHING
#define CONFIG_BTB /* toggle branch predition */
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -102,8 +99,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_DDR_SPD
-
/*
* IFC Definitions
*/
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index c877f3c725ec..857d184ff921 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -73,9 +73,7 @@
#define CONFIG_BACKSIDE_L2_CACHE
#define CONFIG_SYS_INIT_L2CSR0 L2CSR0_L2E
#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
@@ -117,8 +115,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (4 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
-
#define CONFIG_SYS_SPD_BUS_NUM 1
#define SPD_EEPROM_ADDRESS1 0x51
#define SPD_EEPROM_ADDRESS2 0x52
diff --git a/include/configs/k2e_evm.h b/include/configs/k2e_evm.h
index 716ae3b0d4aa..b970975a8e05 100644
--- a/include/configs/k2e_evm.h
+++ b/include/configs/k2e_evm.h
@@ -47,6 +47,4 @@
#define CONFIG_KSNET_CPSW_NUM_PORTS 9
#define CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE
-#define CONFIG_DDR_SPD
-
#endif /* __CONFIG_K2E_EVM_H */
diff --git a/include/configs/k2hk_evm.h b/include/configs/k2hk_evm.h
index d90b2648185a..9006770d8666 100644
--- a/include/configs/k2hk_evm.h
+++ b/include/configs/k2hk_evm.h
@@ -46,6 +46,4 @@
#define CONFIG_KSNET_NETCP_V1_0
#define CONFIG_KSNET_CPSW_NUM_PORTS 5
-#define CONFIG_DDR_SPD
-
#endif /* __CONFIG_K2HK_EVM_H */
diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h
index eaeb4f13d488..fb278be51135 100644
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -36,8 +36,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_DDR_SPD
-
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x54
diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index 21732fef6e57..58c6701fdcaa 100644
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -181,8 +181,6 @@
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
#define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
-#define CONFIG_DDR_SPD
-
#define CONFIG_SYS_SPD_BUS_NUM 0
#define SPD_EEPROM_ADDRESS 0x54
#define CONFIG_SYS_SDRAM_SIZE 4096 /* for fixed parameter use */
diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h
index 30633fa796aa..48e791b0ffef 100644
--- a/include/configs/kontron_sl28.h
+++ b/include/configs/kontron_sl28.h
@@ -16,8 +16,6 @@
#endif
/* DDR */
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define CONFIG_VERY_BIG_RAM
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index db5ec76470cf..46f9c5530e85 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -79,7 +79,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_MONITOR_LEN 0x80000
#endif
-#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
@@ -92,9 +91,7 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 869db0d59afe..b9f6cd3ea199 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -22,13 +22,10 @@ unsigned long get_board_sys_clk(void);
/* Physical Memory Map */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 4a2ad9754bf1..582005be46e3 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -20,7 +20,6 @@
#ifndef CONFIG_SPL
#define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 443ac2f5dd8a..f2ead362633a 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -22,13 +22,10 @@ unsigned long get_board_sys_clk(void);
/* Physical Memory Map */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
-#define CONFIG_DDR_ECC
#ifdef CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index 88b2d2726a0c..ee8c03cdce75 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -17,12 +17,9 @@
/* Physical Memory Map */
#define CONFIG_CHIP_SELECTS_PER_CTRL 4
-#define CONFIG_DDR_SPD
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#ifdef CONFIG_SD_BOOT
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index c59874f43356..4e99fabfd45e 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -35,9 +35,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_DIMM_SLOTS_PER_CTLR 1
-#define CONFIG_DDR_SPD
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS 0x51
#define CONFIG_SYS_SPD_BUS_NUM 0
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index 329aabc5eeb9..df4cf3100654 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -20,14 +20,11 @@
#define COUNTER_FREQUENCY_REAL 25000000 /* 25MHz */
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
-#define CONFIG_DDR_SPD
#ifdef CONFIG_EMU
#define CONFIG_SYS_FSL_DDR_EMU
#define CONFIG_SYS_MXC_I2C1_SPEED 40000000
#define CONFIG_SYS_MXC_I2C2_SPEED 40000000
#else
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
#define SPD_EEPROM_ADDRESS 0x51
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index 097c47ec9545..81b5fe4905f7 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -25,9 +25,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)
-#define CONFIG_DDR_SPD
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS1 0x51
#define SPD_EEPROM_ADDRESS2 0x52
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index c875f16d6457..bf6bc5bf350a 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -41,9 +41,6 @@ unsigned long get_board_sys_clk(void);
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk()
#define COUNTER_FREQUENCY_REAL (CONFIG_SYS_CLK_FREQ/4)
-#define CONFIG_DDR_SPD
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS1 0x51
#define SPD_EEPROM_ADDRESS2 0x52
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 7bb563ead37b..ef36d9025fde 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -30,9 +30,6 @@
#define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL
#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2
#define CONFIG_SYS_SDRAM_SIZE 0x200000000UL
-#define CONFIG_DDR_SPD
-#define CONFIG_DDR_ECC
-#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#define SPD_EEPROM_ADDRESS1 0x51
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index cfa6ba876992..f2d094bb6195 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -178,7 +178,6 @@
/* DDR Setup */
#define CONFIG_SYS_DDR_RAW_TIMING
-#define CONFIG_DDR_SPD
#define CONFIG_SYS_SPD_BUS_NUM 1
#define SPD_EEPROM_ADDRESS 0x52
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index 0efb44ad43c3..b3a8686d0afe 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -57,9 +57,7 @@
/* DDR Setup */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
-#define CONFIG_DDR_SPD
-#undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
--
2.17.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 9/9] Convert CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT to Kconfig
2021-08-21 17:50 [PATCH 1/9] Kconfig: Use spaces not tabs in Kconfig entires Tom Rini
` (6 preceding siblings ...)
2021-08-21 17:50 ` [PATCH 8/9] nxp: Migrate a number of DDR related symbols " Tom Rini
@ 2021-08-21 17:50 ` Tom Rini
2021-08-31 22:09 ` [PATCH 1/9] Kconfig: Use spaces not tabs in Kconfig entires Tom Rini
8 siblings, 0 replies; 20+ messages in thread
From: Tom Rini @ 2021-08-21 17:50 UTC (permalink / raw)
To: u-boot
This converts the following to Kconfig:
CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
Signed-off-by: Tom Rini <trini@konsulko.com>
---
configs/ls1021aiot_sdcard_defconfig | 1 +
configs/ls1046aqds_nand_defconfig | 1 +
include/configs/ls1021aiot.h | 1 -
include/configs/ls1046a_common.h | 1 -
4 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig
index 7c198988b889..e8fdd2a37992 100644
--- a/configs/ls1021aiot_sdcard_defconfig
+++ b/configs/ls1021aiot_sdcard_defconfig
@@ -16,6 +16,7 @@ CONFIG_MISC_INIT_R=y
CONFIG_SPL_FSL_PBL=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xe8
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_MEMINFO=y
diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index b099b8452a4d..7483308ba756 100644
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -28,6 +28,7 @@ CONFIG_SPL_FSL_PBL=y
CONFIG_SPL_BOARD_INIT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
+CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_IMLS=y
CONFIG_CMD_GREPENV=y
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 6c1d1beb7278..7c29bedb8360 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -63,7 +63,6 @@
#define CONFIG_SPL_LIBCOMMON_SUPPORT
#define CONFIG_SPL_LIBGENERIC_SUPPORT
#define CONFIG_SPL_ENV_SUPPORT
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_I2C
#define CONFIG_SPL_WATCHDOG
#define CONFIG_SPL_MMC_SUPPORT
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 289acc02d380..aa222e026931 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -108,7 +108,6 @@
#define CONFIG_SPL_ENV_SUPPORT
#define CONFIG_SPL_WATCHDOG
#define CONFIG_SPL_I2C
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
#define CONFIG_SPL_NAND_SUPPORT
#define CONFIG_SPL_DRIVERS_MISC
--
2.17.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* Re: [PATCH 1/9] Kconfig: Use spaces not tabs in Kconfig entires
2021-08-21 17:50 [PATCH 1/9] Kconfig: Use spaces not tabs in Kconfig entires Tom Rini
` (7 preceding siblings ...)
2021-08-21 17:50 ` [PATCH 9/9] Convert CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT " Tom Rini
@ 2021-08-31 22:09 ` Tom Rini
8 siblings, 0 replies; 20+ messages in thread
From: Tom Rini @ 2021-08-31 22:09 UTC (permalink / raw)
To: u-boot
[-- Attachment #1: Type: text/plain, Size: 314 bytes --]
On Sat, Aug 21, 2021 at 01:50:11PM -0400, Tom Rini wrote:
> While the Kconfig language seems to accept either form of whitespace, we
> use a space throughout the project, except in these spots.
>
> Signed-off-by: Tom Rini <trini@konsulko.com>
For the series, applied to u-boot/next, thanks!
--
Tom
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 659 bytes --]
^ permalink raw reply [flat|nested] 20+ messages in thread