From: David Woodhouse <dwmw2@infradead.org>
To: Stanislav Spassov <stanspas@amazon.com>, linux-pci@vger.kernel.org
Cc: "Stanislav Spassov" <stanspas@amazon.de>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Jan H . Schönherr" <jschoenh@amazon.de>,
"Jonathan Corbet" <corbet@lwn.net>,
"Ashok Raj" <ashok.raj@intel.com>,
"Alex Williamson" <alex.williamson@redhat.com>,
"Sinan Kaya" <okaya@kernel.org>,
"Rajat Jain" <rajatja@google.com>
Subject: Re: [PATCH v4 0/3] Improve PCI device post-reset readiness polling
Date: Fri, 10 Sep 2021 10:32:12 +0100 [thread overview]
Message-ID: <0d113858778a53b0a89400a81f2a06bb4474351d.camel@infradead.org> (raw)
In-Reply-To: <8c9c45025b6130719d23c2fe151e2b6d3eef3baf.camel@infradead.org>
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On Fri, 2021-01-22 at 08:54 +0000, David Woodhouse wrote:
> On Sat, 2020-03-07 at 18:20 +0100, Stanislav Spassov wrote:
> > From: Stanislav Spassov <
> > stanspas@amazon.de
> > >
> >
> > The first version of this patch series can be found here:
> > https://lore.kernel.org/linux-pci/20200223122057.6504-1-stanspas@amazon.com
> >
> >
> > The goal of this patch series is to solve an issue where pci_dev_wait
> > can cause system crashes. After a reset, a hung device may keep
> > responding with CRS completions indefinitely. If CRS Software Visibility
> > is enabled on the Root Port, attempting to read any register other than
> > PCI_VENDOR_ID will cause the Root Port to autonomously retry the request
> > without reporting back to the CPU core. Unless the number of retries or
> > the amount of time spent retrying is limited by platform-specific means,
> > this scenario leads to low-level platform timeouts (such as a TOR
> > Timeout), which can easily escalate to a crash.
> >
> > Feedback on the v1 inspired a lot of additional improvements all around the
> > device reset codepaths and reducing post-reset delays. These improvements
> > were published as part of v2 (v3 is just small build fixes).
> >
> > It looks like there is immediate demand specifically for the CRS work,
> > so I am once again reducing the series to just that. The reset will be
> > posted as a separate patch series that will likely require more time and
> > iterations to stabilize.
>
> Hm, what happened to this?
>
> Bjorn?
Ping?
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prev parent reply other threads:[~2021-09-10 9:32 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-07 17:20 [PATCH v4 0/3] Improve PCI device post-reset readiness polling Stanislav Spassov
2020-03-07 17:20 ` [PATCH v4 1/3] PCI: Refactor polling loop out of pci_dev_wait Stanislav Spassov
2020-03-07 17:20 ` [PATCH v4 2/3] PCI: Cache CRS Software Visibiliy in struct pci_dev Stanislav Spassov
2021-09-12 13:32 ` Bjorn Helgaas
2021-09-13 16:06 ` Spassov, Stanislav
2020-03-07 17:20 ` [PATCH v4 3/3] PCI: Add CRS handling to pci_dev_wait() Stanislav Spassov
2020-03-09 15:55 ` Sinan Kaya
2020-03-09 16:19 ` Raj, Ashok
2020-03-09 16:38 ` Spassov, Stanislav
2020-03-09 17:33 ` Sinan Kaya
2021-09-11 14:03 ` Bjorn Helgaas
2021-09-13 16:29 ` Spassov, Stanislav
2021-09-13 16:38 ` Bjorn Helgaas
2021-09-13 18:04 ` Spassov, Stanislav
2021-09-14 17:53 ` Rajat Jain
2021-09-13 16:07 ` Bjorn Helgaas
2021-09-13 16:39 ` Spassov, Stanislav
2021-01-22 8:54 ` [PATCH v4 0/3] Improve PCI device post-reset readiness polling David Woodhouse
2021-09-10 9:32 ` David Woodhouse [this message]
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