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Message-ID: <0e3ea5733bd786a4dea43a53ebd59b93d97ad036.camel@gmail.com>
Subject: Re: [PATCH 01/17] powerpc/qspinlock: powerpc qspinlock
 implementation
From: Jordan NIethe <jniethe5@gmail.com>
To: Nicholas Piggin <npiggin@gmail.com>, linuxppc-dev@lists.ozlabs.org
Date: Wed, 10 Aug 2022 11:52:39 +1000
In-Reply-To: <20220728063120.2867508-2-npiggin@gmail.com>
References: <20220728063120.2867508-1-npiggin@gmail.com>
	 <20220728063120.2867508-2-npiggin@gmail.com>
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On Thu, 2022-07-28 at 16:31 +-1000, Nicholas Piggin wrote:
+ADw-snip+AD4
+AD4 -+ACM-define queued+AF8-spin+AF8-lock queued+AF8-spin+AF8-lock
+AD4  
+AD4 -static inline void queued+AF8-spin+AF8-unlock(struct qspinlock +ACo-lock)
+AD4 +-static +AF8AXw-always+AF8-inline int queued+AF8-spin+AF8-trylock(struct qspinlock +ACo-lock)
+AD4  +AHs
+AD4 -	if (+ACE-IS+AF8-ENABLED(CONFIG+AF8-PARAVIRT+AF8-SPINLOCKS) +AHwAfA +ACE-is+AF8-shared+AF8-processor())
+AD4 -		smp+AF8-store+AF8-release(+ACY-lock-+AD4-locked, 0)+ADs
+AD4 -	else
+AD4 -		+AF8AXw-pv+AF8-queued+AF8-spin+AF8-unlock(lock)+ADs
+AD4 +-	if (atomic+AF8-cmpxchg+AF8-acquire(+ACY-lock-+AD4-val, 0, 1) +AD0APQ 0)
+AD4 +-		return 1+ADs
+AD4 +-	return 0+ADs

optional style nit: return (atomic+AF8-cmpxchg+AF8-acquire(+ACY-lock-+AD4-val, 0, 1) +AD0APQ 0)+ADs