From mboxrd@z Thu Jan  1 00:00:00 1970
From: Vignesh R <vigneshr@ti.com>
Date: Tue, 29 Aug 2017 16:00:00 +0530
Subject: [U-Boot] [RFC] ARM: davinci: da850: Enable Caches for DA850-EVM
In-Reply-To: <1503873560-1496-1-git-send-email-aford173@gmail.com>
References: <1503873560-1496-1-git-send-email-aford173@gmail.com>
Message-ID: <0ea0159f-1afb-ef55-0d89-6969fcf9ffe1@ti.com>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

+ Sekhar

On Monday 28 August 2017 04:09 AM, Adam Ford wrote:
> What starting up the DA850-EVM, U-Boot generates a warning:
>    WARNING: Caches not enabled
> 
> Looking at other arm926 processors, this is an attempt
> to enable the caches and remove the warning.
> 
> I am notsure who the proper TI or ARM people are to review this.
> 
> Signed-off-by: Adam Ford <aford173@gmail.com>
> ---
>  board/davinci/da8xxevm/da850evm.c | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/board/davinci/da8xxevm/da850evm.c b/board/davinci/da8xxevm/da850evm.c
> index c2d2e8e..33a923c 100644
> --- a/board/davinci/da8xxevm/da850evm.c
> +++ b/board/davinci/da8xxevm/da850evm.c
> @@ -491,3 +491,29 @@ int board_eth_init(bd_t *bis)
>  	return 0;
>  }
>  #endif /* CONFIG_DRIVER_TI_EMAC */
> +
> +#ifndef CONFIG_SYS_ICACHE_OFF
> +/* Invalidate entire I-cache and branch predictor array */
> +void invalidate_icache_all(void)
> +{
> +	unsigned long i = 0;
> +
> +	asm ("mcr p15, 0, %0, c7, c5, 0" : : "r" (i));
> +}
> +#else
> +void invalidate_icache_all(void)
> +{
> +}
> +#endif
> +
> +#ifndef CONFIG_SYS_DCACHE_OFF
> +void enable_caches(void)
> +{
> +	/* Enable D-cache. I-cache is already enabled in start.S */
> +	dcache_enable();
> +}
> +#else
> +void enable_caches(void)
> +{
> +}
> +#endif /* CONFIG_SYS_DCACHE_OFF */
> 

-- 
Regards
Vignesh