From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kever Yang Subject: Re: [PATCH v3 11/18] ram: rockchip: debug: Add sdram_print_ddr_info Date: Tue, 16 Jul 2019 15:42:48 +0800 Message-ID: <0f8b9b7b-da21-6e28-389c-d0e20010c477@rock-chips.com> References: <20190715182856.21688-1-jagan@amarulasolutions.com> <20190715182856.21688-12-jagan@amarulasolutions.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20190715182856.21688-12-jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Jagan Teki , Simon Glass , Philipp Tomsich , YouMin Chen , u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org Cc: linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, gajjar04akash-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, linux-amarula-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org, Manivannan Sadhasivam List-Id: linux-rockchip.vger.kernel.org Ck9uIDIwMTkvNy8xNiDkuIrljYgyOjI4LCBKYWdhbiBUZWtpIHdyb3RlOgo+IEFkZCBzZHJhbSBk ZHIgaW5mbyBwcmludCBzdXBwb3J0LCB0aGlzIHdvdWxkIGhlbHAgdG8KPiBvYnNlcnZlIHRoZSBz ZHJhbSBiYXNlIHBhcmFtZXRlcnMuCj4KPiBIZXJlIGlzIHNhbXBsZSBwcmludCBvbiBMUEREUjQs IDUwTUh6IGNoYW5uZWwgMAo+IEJXPTMyIENvbD0xMCBCaz04IENTMCBSb3c9MTUgQ1MxIFJvdz0x NSBDUz0yIERpZSBCVz0xNgo+Cj4gU2lnbmVkLW9mZi1ieTogSmFnYW4gVGVraSA8amFnYW5AYW1h cnVsYXNvbHV0aW9ucy5jb20+Cj4gU2lnbmVkLW9mZi1ieTogWW91TWluIENoZW4gPGN5bUByb2Nr LWNoaXBzLmNvbT4KClJldmlld2VkLWJ5OiBLZXZlciBZYW5nIDxLZXZlci55YW5nQHJvY2stY2hp cHMuY29tPgoKVGhhbmtzLAogwqAtIEtldmVyCj4gLS0tCj4gICAuLi4vaW5jbHVkZS9hc20vYXJj aC1yb2NrY2hpcC9zZHJhbV9jb21tb24uaCAgfCAgNyArKysrCj4gICBkcml2ZXJzL3JhbS9yb2Nr Y2hpcC9zZHJhbV9kZWJ1Zy5jICAgICAgICAgICAgfCA0MCArKysrKysrKysrKysrKysrKysrCj4g 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rockchip: debug: Add sdram_print_ddr_info In-Reply-To: <20190715182856.21688-12-jagan@amarulasolutions.com> References: <20190715182856.21688-1-jagan@amarulasolutions.com> <20190715182856.21688-12-jagan@amarulasolutions.com> Message-ID: <0f8b9b7b-da21-6e28-389c-d0e20010c477@rock-chips.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de On 2019/7/16 上午2:28, Jagan Teki wrote: > Add sdram ddr info print support, this would help to > observe the sdram base parameters. > > Here is sample print on LPDDR4, 50MHz channel 0 > BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 > > Signed-off-by: Jagan Teki > Signed-off-by: YouMin Chen Reviewed-by: Kever Yang Thanks,  - Kever > --- > .../include/asm/arch-rockchip/sdram_common.h | 7 ++++ > drivers/ram/rockchip/sdram_debug.c | 40 +++++++++++++++++++ > 2 files changed, 47 insertions(+) > > diff --git a/arch/arm/include/asm/arch-rockchip/sdram_common.h b/arch/arm/include/asm/arch-rockchip/sdram_common.h > index 171b233f95..cfbb511843 100644 > --- a/arch/arm/include/asm/arch-rockchip/sdram_common.h > +++ b/arch/arm/include/asm/arch-rockchip/sdram_common.h > @@ -97,8 +97,15 @@ int dram_init(void); > inline void sdram_print_dram_type(unsigned char dramtype) > { > } > + > +inline void sdram_print_ddr_info(struct sdram_cap_info *cap_info, > + struct sdram_base_params *base) > +{ > +} > #else > void sdram_print_dram_type(unsigned char dramtype); > +void sdram_print_ddr_info(struct sdram_cap_info *cap_info, > + struct sdram_base_params *base); > #endif /* CONFIG_RAM_ROCKCHIP_DEBUG */ > > #endif > diff --git a/drivers/ram/rockchip/sdram_debug.c b/drivers/ram/rockchip/sdram_debug.c > index c13e140fa5..69a6f94a73 100644 > --- a/drivers/ram/rockchip/sdram_debug.c > +++ b/drivers/ram/rockchip/sdram_debug.c > @@ -32,3 +32,43 @@ void sdram_print_dram_type(unsigned char dramtype) > break; > } > } > + > +void sdram_print_ddr_info(struct sdram_cap_info *cap_info, > + struct sdram_base_params *base) > +{ > + u32 bg; > + > + bg = (cap_info->dbw == 0) ? 2 : 1; > + > + sdram_print_dram_type(base->dramtype); > + > + printascii(", "); > + printdec(base->ddr_freq); > + printascii("MHz\n"); > + > + printascii("BW="); > + printdec(8 << cap_info->bw); > + > + printascii(" Col="); > + printdec(cap_info->col); > + > + printascii(" Bk="); > + printdec(0x1 << cap_info->bk); > + if (base->dramtype == DDR4) { > + printascii(" BG="); > + printdec(1 << bg); > + } > + > + printascii(" CS0 Row="); > + printdec(cap_info->cs0_row); > + if (cap_info->rank > 1) { > + printascii(" CS1 Row="); > + printdec(cap_info->cs1_row); > + } > + > + printascii(" CS="); > + printdec(cap_info->rank); > + > + printascii(" Die BW="); > + printdec(8 << cap_info->dbw); > +}