From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755255Ab3EUFli (ORCPT ); Tue, 21 May 2013 01:41:38 -0400 Received: from ozlabs.org ([203.10.76.45]:38109 "EHLO ozlabs.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752726Ab3EUFlh (ORCPT ); Tue, 21 May 2013 01:41:37 -0400 From: Michael Neuling To: Peter Zijlstra cc: anshuman Stephane Eranian , Ingo Molnar , LKML , "ak@linux.intel.com" , Michael Ellerman , "benh@kernel.crashing.org" , Linux PPC dev Subject: Re: [PATCH 3/3] perf, x86, lbr: Demand proper privileges for PERF_SAMPLE_BRANCH_KERNEL In-reply-to: <20130517111232.GE5162@dyad.programming.kicks-ass.net> References: <20130503121122.931661809@chello.nl> <20130503121256.230745028@chello.nl> <20130516090916.GF19669@dyad.programming.kicks-ass.net> <8578.1368699317@ale.ozlabs.ibm.com> <20130516111634.GA15314@twins.programming.kicks-ass.net> <20130517111232.GE5162@dyad.programming.kicks-ass.net> Comments: In-reply-to Peter Zijlstra message dated "Fri, 17 May 2013 13:12:32 +0200." X-Mailer: MH-E 8.2; nmh 1.5; GNU Emacs 23.4.1 Date: Tue, 21 May 2013 15:41:35 +1000 Message-ID: <10224.1369114895@ale.ozlabs.ibm.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Peter Zijlstra wrote: > On Thu, May 16, 2013 at 05:36:11PM +0200, Stephane Eranian wrote: > > On Thu, May 16, 2013 at 1:16 PM, Peter Zijlstra wrote: > > > On Thu, May 16, 2013 at 08:15:17PM +1000, Michael Neuling wrote: > > >> Peter, > > >> > > >> BTW PowerPC also has the ability to filter on conditional branches. Any > > >> chance we could add something like the follow to perf also? > > >> > > > > > > I don't see an immediate problem with that except that we on x86 need to > > > implement that in the software filter. Stephane do you see any > > > fundamental issue with that? > > > > > On X86, the LBR cannot filter on conditional in HW. Thus as Peter said, it would > > have to be done in SW. I did not add that because I think those branches are > > not necessarily useful for tools. > > Wouldn't it be mostly conditional branches that are the primary control flow > and can get predicted wrong? I mean, I'm sure someone will miss-predict an > unconditional branch but its not like we care about people with such > afflictions do we? > > Anyway, since PPC people thought it worth baking into hardware, presumably they > have a compelling use case. Mikey could you see if you can retrieve that from > someone in the know? It might be interesting. > > Also, it looks like its trivial to add to x86, you seem to have already done > all the hard work by having X86_BR_JCC. > > The only missing piece would be: Peter, Can we add your signed-off-by on this? We are cleaning up our series for conditional branches and would like to add this as part of the post. Mikey > > --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c > +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c > @@ -337,6 +337,10 @@ static int intel_pmu_setup_sw_lbr_filter > > if (br_type & PERF_SAMPLE_BRANCH_IND_CALL) > mask |= X86_BR_IND_CALL; > + > + if (br_type & PERF_SAMPLE_BRANCH_CONDITIONAL) > + mask |= X86_BR_JCC; > + > /* > * stash actual user request into reg, it may > * be used by fixup code for some CPU > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: From: Michael Neuling To: Peter Zijlstra Subject: Re: [PATCH 3/3] perf, x86, lbr: Demand proper privileges for PERF_SAMPLE_BRANCH_KERNEL In-reply-to: <20130517111232.GE5162@dyad.programming.kicks-ass.net> References: <20130503121122.931661809@chello.nl> <20130503121256.230745028@chello.nl> <20130516090916.GF19669@dyad.programming.kicks-ass.net> <8578.1368699317@ale.ozlabs.ibm.com> <20130516111634.GA15314@twins.programming.kicks-ass.net> <20130517111232.GE5162@dyad.programming.kicks-ass.net> Date: Tue, 21 May 2013 15:41:35 +1000 Message-ID: <10224.1369114895@ale.ozlabs.ibm.com> Cc: "ak@linux.intel.com" , LKML , anshuman Stephane Eranian , Linux PPC dev , Ingo Molnar List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Peter Zijlstra wrote: > On Thu, May 16, 2013 at 05:36:11PM +0200, Stephane Eranian wrote: > > On Thu, May 16, 2013 at 1:16 PM, Peter Zijlstra wrote: > > > On Thu, May 16, 2013 at 08:15:17PM +1000, Michael Neuling wrote: > > >> Peter, > > >> > > >> BTW PowerPC also has the ability to filter on conditional branches. Any > > >> chance we could add something like the follow to perf also? > > >> > > > > > > I don't see an immediate problem with that except that we on x86 need to > > > implement that in the software filter. Stephane do you see any > > > fundamental issue with that? > > > > > On X86, the LBR cannot filter on conditional in HW. Thus as Peter said, it would > > have to be done in SW. I did not add that because I think those branches are > > not necessarily useful for tools. > > Wouldn't it be mostly conditional branches that are the primary control flow > and can get predicted wrong? I mean, I'm sure someone will miss-predict an > unconditional branch but its not like we care about people with such > afflictions do we? > > Anyway, since PPC people thought it worth baking into hardware, presumably they > have a compelling use case. Mikey could you see if you can retrieve that from > someone in the know? It might be interesting. > > Also, it looks like its trivial to add to x86, you seem to have already done > all the hard work by having X86_BR_JCC. > > The only missing piece would be: Peter, Can we add your signed-off-by on this? We are cleaning up our series for conditional branches and would like to add this as part of the post. Mikey > > --- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c > +++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c > @@ -337,6 +337,10 @@ static int intel_pmu_setup_sw_lbr_filter > > if (br_type & PERF_SAMPLE_BRANCH_IND_CALL) > mask |= X86_BR_IND_CALL; > + > + if (br_type & PERF_SAMPLE_BRANCH_CONDITIONAL) > + mask |= X86_BR_JCC; > + > /* > * stash actual user request into reg, it may > * be used by fixup code for some CPU >