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diff for duplicates of <1045d0655704a16a736e001d3ae052829d5532b0.1419812185.git.horms+renesas@verge.net.au>

diff --git a/a/1.txt b/N1/1.txt
index d09d691..5a5f119 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -26,7 +26,7 @@ index 19c9de3..1801bb4 100644
 +			clock-indices = <R8A7794_CLK_MSIOF0>;
  			clock-output-names = "msiof0";
  		};
- 		mstp1_clks: mstp1_clks@e6150134 {
+ 		mstp1_clks: mstp1_clks at e6150134 {
 @@ -465,7 +465,7 @@
  				 <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>,
  				 <&zs_clk>, <&zs_clk>;
@@ -53,7 +53,8 @@ index 19c9de3..1801bb4 100644
 +			clock-indices = <
  				R8A7794_CLK_CMT1
  			>;
- 			clock-output-names @@ -507,7 +507,7 @@
+ 			clock-output-names =
+@@ -507,7 +507,7 @@
  			clocks = <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,
  				 <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;
  			#clock-cells = <1>;
@@ -70,7 +71,8 @@ index 19c9de3..1801bb4 100644
 +			clock-indices = <
  				R8A7794_CLK_VIN1 R8A7794_CLK_VIN0 R8A7794_CLK_ETHER
  			>;
- 			clock-output-names @@ -533,7 +533,7 @@
+ 			clock-output-names =
+@@ -533,7 +533,7 @@
  			reg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;
  			clocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;
  			#clock-cells = <1>;
diff --git a/a/content_digest b/N1/content_digest
index 8807e3d..2f40160 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,13 +2,13 @@
   "ref\0cover.1419812185.git.horms+renesas\@verge.net.au\0"
 ]
 [
-  "From\0Simon Horman <horms+renesas\@verge.net.au>\0"
+  "From\0horms+renesas\@verge.net.au (Simon Horman)\0"
 ]
 [
   "Subject\0[PATCH 06/30] ARM: shmobile: r8a7794 dtsi: Change to using clock-indices\0"
 ]
 [
-  "Date\0Mon, 29 Dec 2014 01:43:37 +0000\0"
+  "Date\0Mon, 29 Dec 2014 10:43:37 +0900\0"
 ]
 [
   "To\0linux-arm-kernel\@lists.infradead.org\0"
@@ -48,7 +48,7 @@
   "+\t\t\tclock-indices = <R8A7794_CLK_MSIOF0>;\n",
   " \t\t\tclock-output-names = \"msiof0\";\n",
   " \t\t};\n",
-  " \t\tmstp1_clks: mstp1_clks\@e6150134 {\n",
+  " \t\tmstp1_clks: mstp1_clks at e6150134 {\n",
   "\@\@ -465,7 +465,7 \@\@\n",
   " \t\t\t\t <&zs_clk>, <&p_clk>, <&p_clk>, <&rclk_clk>, <&cp_clk>,\n",
   " \t\t\t\t <&zs_clk>, <&zs_clk>;\n",
@@ -75,7 +75,8 @@
   "+\t\t\tclock-indices = <\n",
   " \t\t\t\tR8A7794_CLK_CMT1\n",
   " \t\t\t>;\n",
-  " \t\t\tclock-output-names \@\@ -507,7 +507,7 \@\@\n",
+  " \t\t\tclock-output-names =\n",
+  "\@\@ -507,7 +507,7 \@\@\n",
   " \t\t\tclocks = <&zs_clk>, <&p_clk>, <&p_clk>, <&zs_clk>,\n",
   " \t\t\t\t <&zs_clk>, <&p_clk>, <&p_clk>, <&p_clk>, <&p_clk>;\n",
   " \t\t\t#clock-cells = <1>;\n",
@@ -92,7 +93,8 @@
   "+\t\t\tclock-indices = <\n",
   " \t\t\t\tR8A7794_CLK_VIN1 R8A7794_CLK_VIN0 R8A7794_CLK_ETHER\n",
   " \t\t\t>;\n",
-  " \t\t\tclock-output-names \@\@ -533,7 +533,7 \@\@\n",
+  " \t\t\tclock-output-names =\n",
+  "\@\@ -533,7 +533,7 \@\@\n",
   " \t\t\treg = <0 0xe615099c 0 4>, <0 0xe61509ac 0 4>;\n",
   " \t\t\tclocks = <&mp_clk>, <&mp_clk>, <&mp_clk>;\n",
   " \t\t\t#clock-cells = <1>;\n",
@@ -105,4 +107,4 @@
   "2.1.3"
 ]
 
-210fa22a4e0472ed25ed7acd9e3188763fb0e67ea16b986fd559c3c3834eb9b9
+eea829a299c982c720849faa2dc409fbac934de6d6dfc62b49b98d06de1f0278
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