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[89.77.68.124]) by smtp.gmail.com with ESMTPSA id a28sm71719ljd.65.2021.10.27.01.38.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 Oct 2021 01:38:09 -0700 (PDT) Subject: Re: [PATCH v1 1/2] clocksource/drivers/exynos_mct_v2: introduce Exynos MCT version 2 driver for next Exynos SoC To: Youngmin Nam Cc: daniel.lezcano@linaro.org, tglx@linutronix.de, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, pullip.cho@samsung.com, hoony.yu@samsung.com, hajun.sung@samsung.com, myung-su.cha@samsung.com References: <20211021061804.39118-1-youngmin.nam@samsung.com> <20211021061804.39118-2-youngmin.nam@samsung.com> From: Krzysztof Kozlowski Message-ID: <117dfec8-e417-642b-7647-9d17592826ad@canonical.com> Date: Wed, 27 Oct 2021 10:38:09 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20211021061804.39118-2-youngmin.nam@samsung.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/10/2021 08:18, Youngmin Nam wrote: > Exynos MCT version 2 is composed of 1 FRC and 12 comparators. > The 12 comparators can produces interrupts independently, > so they can be used as local timer of each CPU. > ... > + > +static void exynos_mct_comp_start(struct mct_clock_event_device *mevt, > + bool periodic, unsigned long cycles) > +{ > + unsigned int index = mevt->comp_index; > + unsigned int comp_enable; > + unsigned int loop_cnt = 0; > + > + comp_enable = readl_relaxed(reg_base + EXYNOS_MCT_COMP_ENABLE(index)); > + if (comp_enable == MCT_COMP_ENABLE) > + exynos_mct_comp_stop(mevt); > + > + if (periodic) > + writel_relaxed(MCT_COMP_CIRCULAR_MODE, reg_base + EXYNOS_MCT_COMP_MODE(index)); > + > + writel_relaxed(cycles, reg_base + EXYNOS_MCT_COMP_PERIOD(index)); This is unsigned long, so 64-bit on your platform. Use writeq_relaxed or handle it somehow. Best regards, Krzysztof From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 686E8C433F5 for ; Wed, 27 Oct 2021 08:39:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 24B2E60F9D for ; Wed, 27 Oct 2021 08:39:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 24B2E60F9D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=canonical.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:Cc:To:Subject:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=EdY1REzk2kKcH7x130jpFHXjhzOBPdVgJ0NAxT8VQ8g=; b=MVEAfzVg7RMkoKI5P/eXaKDB2m RQm3TsxTH2XcAuEm3JZ6IkKtGWcsR3jLNPalLivh4Pe9BGEysEJw0CHCeyLoOnwm14bkaHKMkSTwg YXqxyIzKbhcH/Cilv2eBMd+AVO0GfaHnfLZaLWIzcjvjjDwSbgKHb+XZDLmBXNz1vxq/ir0QidUKX 4uWBux5ECEtzKu9EKLke7CH8VNUQS/Fn+ewlTHj8slbGic/LaYqeJ11BOf+bKQRwgRk7vTW0NMGKR 4Oks9v2U9n8gAJT2gNYTlgzDtGykkHhDJtyf+ceWmpR4mzeLa0Iio03g+ExE+sHAPMkKKAclhiWpQ Ctz3bwcg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1mfeRt-004Kwd-CT; Wed, 27 Oct 2021 08:38:17 +0000 Received: from smtp-relay-internal-0.canonical.com ([185.125.188.122]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1mfeRq-004Kvd-02 for linux-arm-kernel@lists.infradead.org; Wed, 27 Oct 2021 08:38:15 +0000 Received: from mail-lj1-f198.google.com (mail-lj1-f198.google.com [209.85.208.198]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by smtp-relay-internal-0.canonical.com (Postfix) with ESMTPS id 0E5BA3F17F for ; Wed, 27 Oct 2021 08:38:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=canonical.com; s=20210705; t=1635323891; bh=lSRmd+bAt3G+a8pB1uQ3D1t4YJVVUpvOwAJD3U8R8rQ=; h=Subject:To:Cc:References:From:Message-ID:Date:MIME-Version: In-Reply-To:Content-Type; b=vV8+IJX/iXU6XN8AzslCINldXcn+hLgIMkPUwuJOSRGocC1iap7nmWNdaMgaF61/9 8FOFvBC1ygrtvw0ff/gwnp50p76qnZPDa1jWFjE0gohmTiqJB/wqipl46tOrGPpLQh bMA3ZnHnOIVc9VX9eCmdpU053nY1Fc/P330i5c2RqDqFA+8GdLY1IKKCvj2zpjzeuW XqbL1UMu+msCbSoZyMR7rZm2oQfp2lvU8bG7wWTV4t5XND8Csx9ffth6GlD97NWtjg rFlvAcVcf9RJScB4oXz2oevt1TNxmzm8bFCtPoa+rtPDPArrGqt0WAbXOMUwlHVXuL DvoyCwsLgM7Hw== Received: by mail-lj1-f198.google.com with SMTP id h19-20020a2eb0f3000000b00211a00d15acso343894ljl.12 for ; Wed, 27 Oct 2021 01:38:11 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=lSRmd+bAt3G+a8pB1uQ3D1t4YJVVUpvOwAJD3U8R8rQ=; b=kSw7BIpSxWYN/wiV7L6c6CZtvz4TFmSRBkK5B/zoGDkd65mesYgX5+LPHydF+3ylAd GTVqbjkOe68PWbtVGvQDFSbgsiJq7jF70SqsNS8odzYjhWoP+2i0lb61Q8lnA2GDajsK aEVM6Ys2gix3WNv4xeV71QSR07ehDVLKZQ0fjOdCA7IdlkcpCesEWQMi2+X3nCezwhzC O6tq3pX3QkKnYH1xpafzl9jVlFOBrSAqvrBzOgsD2jpR/RuUEqndLauT2xsH0Q55H3Ub K+VxR9nwEo6Psdkqs19v92esW3g3luyvF/ckG5C2CkR0grrybJ0v+caliPtUJezvA0oM TiGA== X-Gm-Message-State: AOAM533gvZf5uu0Mwlmvj6tsen+53ZilWhkEbDulCLed7PXMbkRIr28d SlR6FcDBwjAKUuUUEFsWuyNSWo0G94iQxzttboQyo+q4LjopnPY8HpO0nIOsoXbN/Hb3/R1wSlR iiEXufrw/RUJspyaJFyfio06afWyt0eTsBUTI4PaJfMGUAQdRONZk X-Received: by 2002:a2e:3504:: with SMTP id z4mr1120861ljz.437.1635323890493; Wed, 27 Oct 2021 01:38:10 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzulrV6FlW9g2gi/5knG/ThdYkMqFE5BqsPFzsMZn9K+3XQGV4JppxbW4/p2BeNyTZi2gMgxQ== X-Received: by 2002:a2e:3504:: with SMTP id z4mr1120838ljz.437.1635323890316; Wed, 27 Oct 2021 01:38:10 -0700 (PDT) Received: from [192.168.3.161] (89-77-68-124.dynamic.chello.pl. [89.77.68.124]) by smtp.gmail.com with ESMTPSA id a28sm71719ljd.65.2021.10.27.01.38.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 27 Oct 2021 01:38:09 -0700 (PDT) Subject: Re: [PATCH v1 1/2] clocksource/drivers/exynos_mct_v2: introduce Exynos MCT version 2 driver for next Exynos SoC To: Youngmin Nam Cc: daniel.lezcano@linaro.org, tglx@linutronix.de, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, pullip.cho@samsung.com, hoony.yu@samsung.com, hajun.sung@samsung.com, myung-su.cha@samsung.com References: <20211021061804.39118-1-youngmin.nam@samsung.com> <20211021061804.39118-2-youngmin.nam@samsung.com> From: Krzysztof Kozlowski Message-ID: <117dfec8-e417-642b-7647-9d17592826ad@canonical.com> Date: Wed, 27 Oct 2021 10:38:09 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <20211021061804.39118-2-youngmin.nam@samsung.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211027_013814_281761_C9385B80 X-CRM114-Status: GOOD ( 14.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 21/10/2021 08:18, Youngmin Nam wrote: > Exynos MCT version 2 is composed of 1 FRC and 12 comparators. > The 12 comparators can produces interrupts independently, > so they can be used as local timer of each CPU. > ... > + > +static void exynos_mct_comp_start(struct mct_clock_event_device *mevt, > + bool periodic, unsigned long cycles) > +{ > + unsigned int index = mevt->comp_index; > + unsigned int comp_enable; > + unsigned int loop_cnt = 0; > + > + comp_enable = readl_relaxed(reg_base + EXYNOS_MCT_COMP_ENABLE(index)); > + if (comp_enable == MCT_COMP_ENABLE) > + exynos_mct_comp_stop(mevt); > + > + if (periodic) > + writel_relaxed(MCT_COMP_CIRCULAR_MODE, reg_base + EXYNOS_MCT_COMP_MODE(index)); > + > + writel_relaxed(cycles, reg_base + EXYNOS_MCT_COMP_PERIOD(index)); This is unsigned long, so 64-bit on your platform. Use writeq_relaxed or handle it somehow. Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel