From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1IhOY9-0005ka-5u for qemu-devel@nongnu.org; Mon, 15 Oct 2007 07:55:57 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1IhOY4-0005kC-LA for qemu-devel@nongnu.org; Mon, 15 Oct 2007 07:55:55 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1IhOY4-0005k8-Fm for qemu-devel@nongnu.org; Mon, 15 Oct 2007 07:55:52 -0400 Received: from bangui.magic.fr ([195.154.194.245]) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1IhOY4-0001bf-0m for qemu-devel@nongnu.org; Mon, 15 Oct 2007 07:55:52 -0400 Subject: Re: [Qemu-devel] RFC: reverse-endian softmmu memory accessors From: "J. Mayer" In-Reply-To: <20071014132206.GR3379@networkno.de> References: <1192269372.9976.305.camel@rapid> <1192279414.9976.332.camel@rapid> <1192285067.9976.338.camel@rapid> <1192313247.9976.356.camel@rapid> <1192356863.9976.374.camel@rapid> <20071014132206.GR3379@networkno.de> Content-Type: text/plain Date: Mon, 15 Oct 2007 13:55:45 +0200 Message-Id: <1192449345.9976.397.camel@rapid> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Thiemo Seufer Cc: qemu-devel@nongnu.org On Sun, 2007-10-14 at 14:22 +0100, Thiemo Seufer wrote: > J. Mayer wrote: > [snip] > > > > Here's a new version. The only change is that, for consistency, I did > > > > add the big-endian and little-endian accessors that were documented in > > > > cpu-all.h as unimplemented. The implementation is quite trivial, having > > > > native and reverse-endian accessors available, and changes functionnally > > > > nothing to the previous version. > > > > > > The patch does not apply anymore. The Sparc part looks OK. > > > > > > The benefits from the patch can be gained by mapping Sparc64 lduw and > > > ldsw in op_mem.h directly to ldul and ldsl using SPARC_LD_OP and > > > replacing the ldl+bswap etc. for the LE cases with ldlr in > > > op_helper.c. If you prefer, I can do this after you have applied the > > > patch. > > > > Yes, there are conflicts between this patch and the mmu_idx one I just > > commited. I will regenerate an updated diff in the hours to come, after > > I finished commiting the PowerPC fixes and improvments I got waiting in > > stock. > > For the Sparc improvments, as I merged the PowerPC improvments in the > > patch, I think it can be a good idea to include it directly in the > > patch. > > I'm also wondering if it would not be a good idea to define lduq/ldsq > > even if they in fact do exactly what ldq does now, just to have a fully > > consistent API. > > Some architecture specs mention the possibility of 128 bit integers, so > this sounds like a good idea. OK, then I'll add this. And I guess we can avoid the #if (TARGET_LONG_BITS == 64) for ldsl / ldul changing the return type to target_ulong for those accessors. -- J. Mayer Never organized