From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LAtls-0006HE-IT for qemu-devel@nongnu.org; Thu, 11 Dec 2008 17:12:36 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LAtlq-0006GM-K3 for qemu-devel@nongnu.org; Thu, 11 Dec 2008 17:12:35 -0500 Received: from [199.232.76.173] (port=41458 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LAtlq-0006GH-5e for qemu-devel@nongnu.org; Thu, 11 Dec 2008 17:12:34 -0500 Received: from e6.ny.us.ibm.com ([32.97.182.146]:58431) by monty-python.gnu.org with esmtps (TLS-1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LAtlp-0000px-OX for qemu-devel@nongnu.org; Thu, 11 Dec 2008 17:12:33 -0500 Received: from d01relay04.pok.ibm.com (d01relay04.pok.ibm.com [9.56.227.236]) by e6.ny.us.ibm.com (8.13.1/8.13.1) with ESMTP id mBBMC9pp018339 for ; Thu, 11 Dec 2008 17:12:09 -0500 Received: from d01av03.pok.ibm.com (d01av03.pok.ibm.com [9.56.224.217]) by d01relay04.pok.ibm.com (8.13.8/8.13.8/NCO v9.1) with ESMTP id mBBMCW8u162178 for ; Thu, 11 Dec 2008 17:12:32 -0500 Received: from d01av03.pok.ibm.com (loopback [127.0.0.1]) by d01av03.pok.ibm.com (8.12.11.20060308/8.13.3) with ESMTP id mBBMCVJ4016822 for ; Thu, 11 Dec 2008 17:12:32 -0500 From: Hollis Blanchard Date: Thu, 11 Dec 2008 16:12:33 -0600 Message-Id: <1229033553-26097-1-git-send-email-hollisb@us.ibm.com> Subject: [Qemu-devel] (no subject) Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Hollis Blanchard I'm not familiar with this device, but I'm fairly certain the writel handler is not supposed to recurse. Signed-off-by: Hollis Blanchard diff --git a/hw/ppc405_boards.c b/hw/ppc405_boards.c index 4144dae..1d8b6ab 100644 --- a/hw/ppc405_boards.c +++ b/hw/ppc405_boards.c @@ -129,9 +129,9 @@ static uint32_t ref405ep_fpga_readl (void *opaque, target_phys_addr_t addr) static void ref405ep_fpga_writel (void *opaque, target_phys_addr_t addr, uint32_t value) { - ref405ep_fpga_writel(opaque, addr, (value >> 24) & 0xFF); - ref405ep_fpga_writel(opaque, addr + 1, (value >> 16) & 0xFF); - ref405ep_fpga_writel(opaque, addr + 2, (value >> 8) & 0xFF); + ref405ep_fpga_writeb(opaque, addr, (value >> 24) & 0xFF); + ref405ep_fpga_writeb(opaque, addr + 1, (value >> 16) & 0xFF); + ref405ep_fpga_writeb(opaque, addr + 2, (value >> 8) & 0xFF); ref405ep_fpga_writeb(opaque, addr + 3, value & 0xFF); }