From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LrZ6Y-00012C-Lj for qemu-devel@nongnu.org; Wed, 08 Apr 2009 10:50:18 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LrZ6T-00010B-Sm for qemu-devel@nongnu.org; Wed, 08 Apr 2009 10:50:18 -0400 Received: from [199.232.76.173] (port=43370 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LrZ6T-000106-Hb for qemu-devel@nongnu.org; Wed, 08 Apr 2009 10:50:13 -0400 Received: from tx2ehsobe003.messaging.microsoft.com ([65.55.88.13]:35047 helo=TX2EHSOBE005.bigfish.com) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_ARCFOUR_MD5:16) (Exim 4.60) (envelope-from ) id 1LrZ6T-0000uF-3S for qemu-devel@nongnu.org; Wed, 08 Apr 2009 10:50:13 -0400 From: Andre Przywara Date: Wed, 8 Apr 2009 16:50:14 +0200 Message-ID: <1239202215-9206-4-git-send-email-andre.przywara@amd.com> In-Reply-To: <1239202215-9206-1-git-send-email-andre.przywara@amd.com> References: <1239202215-9206-1-git-send-email-andre.przywara@amd.com> MIME-Version: 1.0 Content-Type: text/plain Subject: [Qemu-devel] [PATCH 3/4] sending NUMA topology to BIOS Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: anthony@codemonkey.ws Cc: qemu-devel@nongnu.org From: Andre Przywara Signed-off-by: Andre Przywara --- hw/fw_cfg.h | 1 + hw/pc.c | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+), 0 deletions(-) diff --git a/hw/fw_cfg.h b/hw/fw_cfg.h index 41a3dd0..f616ed2 100644 --- a/hw/fw_cfg.h +++ b/hw/fw_cfg.h @@ -14,6 +14,7 @@ #define FW_CFG_INITRD_ADDR 0x0a #define FW_CFG_INITRD_SIZE 0x0b #define FW_CFG_BOOT_DEVICE 0x0c +#define FW_CFG_NUMA 0x0d #define FW_CFG_MAX_ENTRY 0x10 #define FW_CFG_WRITE_CHANNEL 0x4000 diff --git a/hw/pc.c b/hw/pc.c index f9cfd1f..f4585df 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -422,9 +422,13 @@ static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) } } +extern uint64_t node_cpumask[MAX_NODES]; + static void bochs_bios_init(void) { void *fw_cfg; + uint64_t *numa_fw_cfg; + int i, j; register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); @@ -442,6 +446,26 @@ static void bochs_bios_init(void) fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables, acpi_tables_len); + + /* allocate memory for the NUMA channel: one (64bit) word for the number + * of nodes, one word for each VCPU->node and one word for each node to + * hold the amount of memory. + */ + numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8); + numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes); + for (i = 0; i < smp_cpus; i++) { + for (j = 0; j < nb_numa_nodes; j++) { + if (node_cpumask[j] & (1 << i)) { + numa_fw_cfg[i + 1] = cpu_to_le64(j); + break; + } + } + } + for (i = 0; i < nb_numa_nodes; i++) { + numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]); + } + fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg, + (1 + smp_cpus + nb_numa_nodes) * 8); } /* Generate an initial boot sector which sets state and jump to -- 1.6.1.3