From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1764050AbZFQBLE (ORCPT ); Tue, 16 Jun 2009 21:11:04 -0400 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1759833AbZFQBKx (ORCPT ); Tue, 16 Jun 2009 21:10:53 -0400 Received: from gate.crashing.org ([63.228.1.57]:34523 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1760680AbZFQBKx (ORCPT ); Tue, 16 Jun 2009 21:10:53 -0400 Subject: Re: PowerPC PCI DMA issues (prefetch/coherency?) From: Benjamin Herrenschmidt To: Leon Woestenberg Cc: FUJITA Tomonori , arnd@arndb.de, scottwood@freescale.com, chris.pringle@oxtel.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org In-Reply-To: References: <4A37DB0F.7060801@freescale.com> <200906162002.12376.arnd@arndb.de> <1245197925.21602.0.camel@pasglop> <20090617093654B.fujita.tomonori@lab.ntt.co.jp> Content-Type: text/plain Date: Wed, 17 Jun 2009 11:08:32 +1000 Message-Id: <1245200912.21602.2.camel@pasglop> Mime-Version: 1.0 X-Mailer: Evolution 2.26.1 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2009-06-17 at 02:56 +0200, Leon Woestenberg wrote: > I use pci_map_sg(), have the device perform either DMA master reads or > writes to the bus address using PCIe. > After that, I use pci_unmap_sg(). > > My assumption is that pci_unmap_sg() either makes the cache coherent > or invalidated and thus I do not need to take further actions. > This is on a MPC83xx or 85xx system. > > Is this assumption correct? It is, as far as I understand things :-) Those APIs are fun. You should only need the explicit sync calls if you are going to peek or poke at the DMA mapped memory before you unmap it. Cheers, Ben. From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by bilbo.ozlabs.org (Postfix) with ESMTPS id C882EB718B for ; Wed, 17 Jun 2009 11:10:53 +1000 (EST) Subject: Re: PowerPC PCI DMA issues (prefetch/coherency?) From: Benjamin Herrenschmidt To: Leon Woestenberg In-Reply-To: References: <4A37DB0F.7060801@freescale.com> <200906162002.12376.arnd@arndb.de> <1245197925.21602.0.camel@pasglop> <20090617093654B.fujita.tomonori@lab.ntt.co.jp> Content-Type: text/plain Date: Wed, 17 Jun 2009 11:08:32 +1000 Message-Id: <1245200912.21602.2.camel@pasglop> Mime-Version: 1.0 Cc: arnd@arndb.de, linux-kernel@vger.kernel.org, FUJITA Tomonori , scottwood@freescale.com, chris.pringle@oxtel.com, linuxppc-dev@lists.ozlabs.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Wed, 2009-06-17 at 02:56 +0200, Leon Woestenberg wrote: > I use pci_map_sg(), have the device perform either DMA master reads or > writes to the bus address using PCIe. > After that, I use pci_unmap_sg(). > > My assumption is that pci_unmap_sg() either makes the cache coherent > or invalidated and thus I do not need to take further actions. > This is on a MPC83xx or 85xx system. > > Is this assumption correct? It is, as far as I understand things :-) Those APIs are fun. You should only need the explicit sync calls if you are going to peek or poke at the DMA mapped memory before you unmap it. Cheers, Ben.