[Qemu-devel] [PATCH 4/5] PCI: do_pci_info(): PCI bridge support

[Luiz Capitulino <lcapitulino@redhat.com>]

This commit adds the "pci_bridge" key to the PCI device QDict,
it also adds support for printing it in the user protocol.

IMPORTANT: This code is being added separately because I could
NOT test it properly. According to Michael Tsirkin, it depends
on ultrasparc and it would take time to do the proper setup.

Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
---
 hw/pci.c |   72 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 70 insertions(+), 2 deletions(-)

diff --git a/hw/pci.c b/hw/pci.c
index 3d0af69..ffe4cfe 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1130,7 +1130,36 @@ static void pci_device_print(Monitor *mon, QDict *device)
                             qdict_get_int(device, "irq"));
     }
 
-    /* TODO: PCI bridge info */
+    if (qdict_haskey(device, "pci_bridge")) {
+        QDict *info;
+
+        qdict = qdict_get_qdict(device, "pci_bridge");
+
+        info = qdict_get_qdict(qdict, "bus");
+        monitor_printf(mon, "      BUS %" PRId64 ".\n",
+                            qdict_get_int(info, "number"));
+        monitor_printf(mon, "      secondary bus %" PRId64 ".\n",
+                            qdict_get_int(info, "secondary"));
+        monitor_printf(mon, "      subordinate bus %" PRId64 ".\n",
+                            qdict_get_int(info, "subordinate"));
+
+        info = qdict_get_qdict(qdict, "io_range");
+        monitor_printf(mon, "      IO range [0x%04"PRIx64", 0x%04"PRIx64"]\n",
+                       qdict_get_int(info, "base"),
+                       qdict_get_int(info, "limit"));
+
+        info = qdict_get_qdict(qdict, "memory_range");
+        monitor_printf(mon,
+                       "      memory range [0x%08"PRIx64", 0x%08"PRIx64"]\n",
+                       qdict_get_int(info, "base"),
+                       qdict_get_int(info, "limit"));
+
+        info = qdict_get_qdict(qdict, "prefetchable_range");
+        monitor_printf(mon, "      prefetchable memory range "
+                       "[0x%08"PRIx64", 0x%08"PRIx64"]\n",
+                       qdict_get_int(info, "base"),
+        qdict_get_int(info, "limit"));
+    }
 
     QLIST_FOREACH_ENTRY(qdict_get_qlist(device, "regions"), entry) {
         qdict = qobject_to_qdict(qlist_entry_obj(entry));
@@ -1232,8 +1261,9 @@ static QObject *pci_get_regions_list(const PCIDevice *dev)
     return QOBJECT(regions_list);
 }
 
-static QObject *pci_get_dev_dict(const PCIDevice *dev, int bus_num)
+static QObject *pci_get_dev_dict(PCIDevice *dev, int bus_num)
 {
+    int class;
     QObject *obj;
 
     obj = qobject_from_jsonf("{ 'bus': %d, 'slot': %d, 'function': %d,"                                       "'class_info': %p, 'id': %p, 'regions': %p,"
@@ -1249,6 +1279,31 @@ static QObject *pci_get_dev_dict(const PCIDevice *dev, int bus_num)
         qdict_put(qdict, "irq", qint_from_int(dev->config[PCI_INTERRUPT_LINE]));
     }
 
+    class = pci_get_word(dev->config + PCI_CLASS_DEVICE);
+    if (class == 0x0604) {
+        QDict *qdict;
+        QObject *pci_bridge;
+
+        pci_bridge = qobject_from_jsonf("{ 'bus': "
+        "{ 'number': %d, 'secondary': %d, 'subordinate': %d }, "
+        "'io_range': { 'base': %" PRId64 ", 'limit': %" PRId64 "}, "
+        "'memory_range': { 'base': %" PRId64 ", 'limit': %" PRId64 "}, "
+        "'prefetchable_range': { 'base': %" PRId64 ", 'limit': %" PRId64 "} }",
+        dev->config[0x19], dev->config[PCI_SECONDARY_BUS],
+        dev->config[PCI_SUBORDINATE_BUS],
+        pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_IO),
+        pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_IO),
+        pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY),
+        pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY),
+        pci_bridge_get_base(dev, PCI_BASE_ADDRESS_SPACE_MEMORY |
+                               PCI_BASE_ADDRESS_MEM_PREFETCH),
+        pci_bridge_get_limit(dev, PCI_BASE_ADDRESS_SPACE_MEMORY |
+                                PCI_BASE_ADDRESS_MEM_PREFETCH));
+
+        qdict = qobject_to_qdict(obj);
+        qdict_put_obj(qdict, "pci_bridge", pci_bridge);
+    }
+
     return obj;
 }
 
@@ -1308,9 +1363,22 @@ static QObject *pci_get_bus_dict(PCIBus *bus, int bus_num)
  *      - "vendor": vendor ID
  * - "irq": device's IRQ if assigned (optional)
  * - "qdev_id": qdev id string
+ * - "pci_bridge": It's a QDict, only present if this device is a
+ *   PCI bridge, contains:
+ *      - "bus": bus number
+ *      - "secondary": secondary bus number
+ *      - "subordinate": subordinate bus number
+ *      - "io_range": a QDict with memory range information
+ *      - "memory_range": a QDict with memory range information
+ *      - "prefetchable_range": a QDict with memory range information
  * - "regions": a QList of QDicts, each QDict represents a
  *   memory region of this device
  *
+ * The memory range QDict contains the following:
+ *
+ * - "base": base memory address
+ * - "limit": limit value
+ *
  * The region QDict can be an I/O region or a memory region,
  * an I/O region QDict contains the following:
  *
-- 
1.6.6