From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757119Ab0BQMSJ (ORCPT ); Wed, 17 Feb 2010 07:18:09 -0500 Received: from gate.crashing.org ([63.228.1.57]:50087 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753043Ab0BQMSG (ORCPT ); Wed, 17 Feb 2010 07:18:06 -0500 Subject: Re: USB mass storage and ARM cache coherency From: Benjamin Herrenschmidt To: Oliver Neukum Cc: "Shilimkar, Santosh" , Matthew Dharm , Russell King - ARM Linux , Ming Lei , "Mankad, Maulik Ojas" , Sergei Shtylyov , Catalin Marinas , Sebastian Siewior , "linux-usb@vger.kernel.org" , linux-kernel , Pavel Machek , Greg KH , linux-arm-kernel In-Reply-To: <201002171123.30389.oliver@neukum.org> References: <20100208065519.GE1290@ucw.cz> <201002171109.32107.oliver@neukum.org> <1266401881.16346.278.camel@pasglop> <201002171123.30389.oliver@neukum.org> Content-Type: text/plain; charset="UTF-8" Date: Wed, 17 Feb 2010 23:15:41 +1100 Message-ID: <1266408941.16346.283.camel@pasglop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.1 Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 2010-02-17 at 11:23 +0100, Oliver Neukum wrote: > > The request a low-level driver does is all or nothing. Either DMA > issues have to be handled by that driver alone, or a finer-grained > description of the DMA requirements is needed. A fix using the latter > approach is being worked on. Well, that's what I'm trying to understand. IE. It's a pretty strong rule ... don't do CPU accesses between dma_map and unmap. So it's all in driver land at that stage. I'm not sure how the DMA requirements get into the picture here. IE. That rule is globally true. It's not going to hurt just non-coherent archs, it's going to hurt anybody using swiotlb too... So I don't see you need more info about the DMA requirements, but maybe I did miss something :-) Cheers, Ben. From mboxrd@z Thu Jan 1 00:00:00 1970 From: benh@kernel.crashing.org (Benjamin Herrenschmidt) Date: Wed, 17 Feb 2010 23:15:41 +1100 Subject: USB mass storage and ARM cache coherency In-Reply-To: <201002171123.30389.oliver@neukum.org> References: <20100208065519.GE1290@ucw.cz> <201002171109.32107.oliver@neukum.org> <1266401881.16346.278.camel@pasglop> <201002171123.30389.oliver@neukum.org> Message-ID: <1266408941.16346.283.camel@pasglop> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, 2010-02-17 at 11:23 +0100, Oliver Neukum wrote: > > The request a low-level driver does is all or nothing. Either DMA > issues have to be handled by that driver alone, or a finer-grained > description of the DMA requirements is needed. A fix using the latter > approach is being worked on. Well, that's what I'm trying to understand. IE. It's a pretty strong rule ... don't do CPU accesses between dma_map and unmap. So it's all in driver land at that stage. I'm not sure how the DMA requirements get into the picture here. IE. That rule is globally true. It's not going to hurt just non-coherent archs, it's going to hurt anybody using swiotlb too... So I don't see you need more info about the DMA requirements, but maybe I did miss something :-) Cheers, Ben.