From mboxrd@z Thu Jan 1 00:00:00 1970 From: Heiko Stuebner Subject: Re: [PATCH v4 6/6] drm/rockchip: dw_hdmi: add dw-hdmi support for the rk3328 Date: Wed, 12 Sep 2018 15:50:03 +0200 Message-ID: <12703438.MgSoJEdsAQ@phil> References: <20180910092223.1106-1-heiko@sntech.de> <20180910092223.1106-7-heiko@sntech.de> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Jonas Karlman Cc: "Jose.Abreu@synopsys.com" , "algea.cao@rock-chips.com" , "linux-rockchip@lists.infradead.org" , "dri-devel@lists.freedesktop.org" , "Laurent.pinchart@ideasonboard.com" , "linux-arm-kernel@lists.infradead.org" , "zhengyang@rock-chips.com" List-Id: linux-rockchip.vger.kernel.org QW0gTW9udGFnLCAxMC4gU2VwdGVtYmVyIDIwMTgsIDE3OjE1OjQ2IENFU1Qgc2NocmllYiBKb25h cyBLYXJsbWFuOgo+IEhpIEhlaWtvLAo+IAo+IENFQyBpcyBub3Qgd29ya2luZyB3aGVuIENFQyA1 ViBpcyBlbmFibGVkCj4gCj4gT24gMjAxOC0wOS0xMCAxMToyMiwgSGVpa28gU3R1ZWJuZXIgd3Jv dGU6Cj4gCj4gPiBUaGUgcmszMzI4IHVzZXMgYSBkdy1oZG1pIGNvbnRyb2xsZXIgd2l0aCBhbiBl eHRlcm5hbCBoZG1pIHBoeSBmcm9tCj4gPiBJbm5vc2lsaWNvbiB3aGljaCB1c2VzIHRoZSBnZW5l cmljIHBoeSBmcmFtZXdvcmsgZm9yIGFjY2Vzcy4KPiA+IEFkZCB0aGUgbmVjZXNzYXJ5IGRhdGEg YW5kIHRoZSBjb21wYXRpYmxlIGZvciB0aGUgcmszMzI4IHRvIHRoZQo+ID4gcm9ja2NoaXAgZHct aGRtaSBkcml2ZXIuCj4gPgo+ID4gU2lnbmVkLW9mZi1ieTogSGVpa28gU3R1ZWJuZXIgPGhlaWtv QHNudGVjaC5kZT4KPiA+IFRlc3RlZC1ieTogUm9iaW4gTXVycGh5IDxyb2Jpbi5tdXJwaHlAYXJt LmNvbT4KPiA+IEFja2VkLWJ5OiBSb2IgSGVycmluZyA8cm9iaEBrZXJuZWwub3JnPgo+ID4KPiA+ IGNoYW5nZXMgaW4gdjM6Cj4gPiAtIHJld29yZCBhcyBzdWdnZXN0ZWQgYnkgUm9iIHRvIHNob3cg dGhhdCBpdCdzIGEgZHctaGRtaSArIElubm8gcGh5Cj4gPiAtLS0KPiA+ICAuLi4vZGlzcGxheS9y b2NrY2hpcC9kd19oZG1pLXJvY2tjaGlwLnR4dCAgICAgfCAgIDEgKwo+ID4gIGRyaXZlcnMvZ3B1 L2RybS9yb2NrY2hpcC9kd19oZG1pLXJvY2tjaGlwLmMgICB8IDEwNiArKysrKysrKysrKysrKysr KysKPiA+ICAyIGZpbGVzIGNoYW5nZWQsIDEwNyBpbnNlcnRpb25zKCspCj4gPgo+ID4gZGlmZiAt LWdpdCBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9kaXNwbGF5L3JvY2tjaGlw L2R3X2hkbWktcm9ja2NoaXAudHh0IGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdz L2Rpc3BsYXkvcm9ja2NoaXAvZHdfaGRtaS1yb2NrY2hpcC50eHQKPiA+IGluZGV4IDkzN2JmYjQ3 MmUxZC4uMzkxNDM0MjRhNDc0IDEwMDY0NAo+ID4gLS0tIGEvRG9jdW1lbnRhdGlvbi9kZXZpY2V0 cmVlL2JpbmRpbmdzL2Rpc3BsYXkvcm9ja2NoaXAvZHdfaGRtaS1yb2NrY2hpcC50eHQKPiA+ICsr KyBiL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9kaXNwbGF5L3JvY2tjaGlwL2R3 X2hkbWktcm9ja2NoaXAudHh0Cj4gPiBAQCAtMTMsNiArMTMsNyBAQCBSZXF1aXJlZCBwcm9wZXJ0 aWVzOgo+ID4gIAo+ID4gIC0gY29tcGF0aWJsZTogc2hvdWxkIGJlIG9uZSBvZiB0aGUgZm9sbG93 aW5nOgo+ID4gIAkJInJvY2tjaGlwLHJrMzI4OC1kdy1oZG1pIgo+ID4gKwkJInJvY2tjaGlwLHJr MzMyOC1kdy1oZG1pIgo+ID4gIAkJInJvY2tjaGlwLHJrMzM5OS1kdy1oZG1pIgo+ID4gIC0gcmVn OiBTZWUgZHdfaGRtaS50eHQuCj4gPiAgLSByZWctaW8td2lkdGg6IFNlZSBkd19oZG1pLnR4dC4g U2hhbGwgYmUgNC4KPiA+IGRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvZHdf aGRtaS1yb2NrY2hpcC5jIGIvZHJpdmVycy9ncHUvZHJtL3JvY2tjaGlwL2R3X2hkbWktcm9ja2No aXAuYwo+ID4gaW5kZXggMTlmMDAyZmEwYTA5Li4yMzdmMzFmZDg0MDMgMTAwNjQ0Cj4gPiAtLS0g YS9kcml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvZHdfaGRtaS1yb2NrY2hpcC5jCj4gPiArKysgYi9k cml2ZXJzL2dwdS9kcm0vcm9ja2NoaXAvZHdfaGRtaS1yb2NrY2hpcC5jCj4gPiBAQCAtMjUsNiAr MjUsMjQgQEAKPiA+ICAKPiA+ICAjZGVmaW5lIFJLMzI4OF9HUkZfU09DX0NPTjYJCTB4MDI1Qwo+ ID4gICNkZWZpbmUgUkszMjg4X0hETUlfTENEQ19TRUwJCUJJVCg0KQo+ID4gKyNkZWZpbmUgUksz MzI4X0dSRl9TT0NfQ09OMgkJMHgwNDA4Cj4gPiArCj4gPiArI2RlZmluZSBSSzMzMjhfSERNSV9T REFJTl9NU0sJCUJJVCgxMSkKPiA+ICsjZGVmaW5lIFJLMzMyOF9IRE1JX1NDTElOX01TSwkJQklU KDEwKQo+ID4gKyNkZWZpbmUgUkszMzI4X0hETUlfSFBEX0lPRQkJQklUKDIpCj4gPiArI2RlZmlu ZSBSSzMzMjhfR1JGX1NPQ19DT04zCQkweDA0MGMKPiA+ICsvKiBuZWVkIHRvIGJlIHVuc2V0IGlm IGhkbWkgb3IgaTJjIHNob3VsZCBjb250cm9sIHZvbHRhZ2UgKi8KPiA+ICsjZGVmaW5lIFJLMzMy OF9IRE1JX1NEQTVWX0dSRgkJQklUKDE1KQo+ID4gKyNkZWZpbmUgUkszMzI4X0hETUlfU0NMNVZf R1JGCQlCSVQoMTQpCj4gPiArI2RlZmluZSBSSzMzMjhfSERNSV9IUEQ1Vl9HUkYJCUJJVCgxMykK PiA+ICsjZGVmaW5lIFJLMzMyOF9IRE1JX0NFQzVWX0dSRgkJQklUKDEyKQo+ID4gKyNkZWZpbmUg UkszMzI4X0dSRl9TT0NfQ09ONAkJMHgwNDEwCj4gPiArI2RlZmluZSBSSzMzMjhfSERNSV9IUERf U0FSQURDCQlCSVQoMTMpCj4gPiArI2RlZmluZSBSSzMzMjhfSERNSV9DRUNfNVYJCUJJVCgxMSkK PiA+ICsjZGVmaW5lIFJLMzMyOF9IRE1JX1NEQV81VgkJQklUKDEwKQo+ID4gKyNkZWZpbmUgUksz MzI4X0hETUlfU0NMXzVWCQlCSVQoOSkKPiA+ICsjZGVmaW5lIFJLMzMyOF9IRE1JX0hQRF81VgkJ QklUKDgpCj4gPiArCj4gPiAgI2RlZmluZSBSSzMzOTlfR1JGX1NPQ19DT04yMAkJMHg2MjUwCj4g PiAgI2RlZmluZSBSSzMzOTlfSERNSV9MQ0RDX1NFTAkJQklUKDYpCj4gPiAgCj4gPiBAQCAtMjky LDYgKzMxMCw2OCBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGRybV9lbmNvZGVyX2hlbHBlcl9mdW5j cyBkd19oZG1pX3JvY2tjaGlwX2VuY29kZXJfaGVscGVyX2Z1bgo+ID4gIAkuYXRvbWljX2NoZWNr ID0gZHdfaGRtaV9yb2NrY2hpcF9lbmNvZGVyX2F0b21pY19jaGVjaywKPiA+ICB9Owo+ID4gIAo+ ID4gK3N0YXRpYyBpbnQgZHdfaGRtaV9yb2NrY2hpcF9nZW5waHlfaW5pdChzdHJ1Y3QgZHdfaGRt aSAqZHdfaGRtaSwgdm9pZCAqZGF0YSwKPiA+ICsJCQkgICAgIHN0cnVjdCBkcm1fZGlzcGxheV9t b2RlICptb2RlKQo+ID4gK3sKPiA+ICsJc3RydWN0IHJvY2tjaGlwX2hkbWkgKmhkbWkgPSAoc3Ry dWN0IHJvY2tjaGlwX2hkbWkgKilkYXRhOwo+ID4gKwo+ID4gKwlyZXR1cm4gcGh5X3Bvd2VyX29u KGhkbWktPnBoeSk7Cj4gPiArfQo+ID4gKwo+ID4gK3N0YXRpYyB2b2lkIGR3X2hkbWlfcm9ja2No aXBfZ2VucGh5X2Rpc2FibGUoc3RydWN0IGR3X2hkbWkgKmR3X2hkbWksIHZvaWQgKmRhdGEpCj4g PiArewo+ID4gKwlzdHJ1Y3Qgcm9ja2NoaXBfaGRtaSAqaGRtaSA9IChzdHJ1Y3Qgcm9ja2NoaXBf aGRtaSAqKWRhdGE7Cj4gPiArCj4gPiArCXBoeV9wb3dlcl9vZmYoaGRtaS0+cGh5KTsKPiA+ICt9 Cj4gPiArCj4gPiArc3RhdGljIGVudW0gZHJtX2Nvbm5lY3Rvcl9zdGF0dXMKPiA+ICtkd19oZG1p X3JrMzMyOF9yZWFkX2hwZChzdHJ1Y3QgZHdfaGRtaSAqZHdfaGRtaSwgdm9pZCAqZGF0YSkKPiA+ ICt7Cj4gPiArCXN0cnVjdCByb2NrY2hpcF9oZG1pICpoZG1pID0gKHN0cnVjdCByb2NrY2hpcF9o ZG1pICopZGF0YTsKPiA+ICsJZW51bSBkcm1fY29ubmVjdG9yX3N0YXR1cyBzdGF0dXM7Cj4gPiAr Cj4gPiArCXN0YXR1cyA9IGR3X2hkbWlfcGh5X3JlYWRfaHBkKGR3X2hkbWksIGRhdGEpOwo+ID4g Kwo+ID4gKwlpZiAoc3RhdHVzID09IGNvbm5lY3Rvcl9zdGF0dXNfY29ubmVjdGVkKQo+ID4gKwkJ cmVnbWFwX3dyaXRlKGhkbWktPnJlZ21hcCwKPiA+ICsJCQlSSzMzMjhfR1JGX1NPQ19DT040LAo+ ID4gKwkJCUhJV09SRF9VUERBVEUoUkszMzI4X0hETUlfQ0VDXzVWIHwgUkszMzI4X0hETUlfU0RB XzVWIHwKPiA+ICsJCQkJICAgICAgUkszMzI4X0hETUlfU0NMXzVWLAo+ID4gKwkJCQkgICAgICBS SzMzMjhfSERNSV9DRUNfNVYgfCBSSzMzMjhfSERNSV9TREFfNVYgfAo+ID4gKwkJCQkgICAgICBS SzMzMjhfSERNSV9TQ0xfNVYpKTsKPiAKPiBUaGlzIGRpZmZlcnMgZnJvbSBCU1Aga2VybmVsIGFu ZCBlbmFibGUgb2YgQ0VDIDVWIHN0b3BzIENFQyBmcm9tIHdvcmtpbmcuCj4gQlNQIGtlcm5lbCBk byBub3Qgc2V0IHdyaXRlIGVuYWJsZSBiaXQgZm9yIENFQyA1VjoKPiAKPiBSSzMzMjhfSU9fNVZf RE9NQUlOICgoNyA8PCA5KSB8ICgzIDw8ICg5ICsgMTYpKSkKPiAKPiBodHRwczovL2dpdGh1Yi5j b20vS3dpYm9vL2xpbnV4LXJvY2tjaGlwL2NvbW1pdC9lNzRhYzZhM2E1ODFiY2I3YjJhYzlmNGQ3 MGNmNzI5OGRmMDFlNDE3IG1ha2VzIENFQyB3b3JrIG9uIHYzIG9mIHRoaXMgcGF0Y2guCgp0aGFu a3MgZm9yIGNoZWNraW5nIHRoZSBjZWMgZnVuY3Rpb25hbGl0eS4gSSd2ZSBpbmNvcnBvcmF0ZWQg eW91ciBjaGFuZ2UKYW5kIHNlbnQgb2ZmIHY2LiBNYXliZSB5b3UgY2FuIHRha2UgYW5vdGhlciBs b29rIGFuZCBwb3NzaWJsZSBwcm92aWRlCnNvbWUgVGVzdGVkLWJ5IChvciBldmVuIFJldmlld2Vk LWJ5L0Fja2VkLWJ5KSB0YWdzPyA6LSkKCgpUaGFua3MKSGVpa28KCgpfX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpkcmktZGV2ZWwgbWFpbGluZyBsaXN0CmRy aS1kZXZlbEBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVlZGVza3RvcC5v cmcvbWFpbG1hbi9saXN0aW5mby9kcmktZGV2ZWwK From mboxrd@z Thu Jan 1 00:00:00 1970 From: heiko@sntech.de (Heiko Stuebner) Date: Wed, 12 Sep 2018 15:50:03 +0200 Subject: [PATCH v4 6/6] drm/rockchip: dw_hdmi: add dw-hdmi support for the rk3328 In-Reply-To: References: <20180910092223.1106-1-heiko@sntech.de> <20180910092223.1106-7-heiko@sntech.de> Message-ID: <12703438.MgSoJEdsAQ@phil> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Am Montag, 10. September 2018, 17:15:46 CEST schrieb Jonas Karlman: > Hi Heiko, > > CEC is not working when CEC 5V is enabled > > On 2018-09-10 11:22, Heiko Stuebner wrote: > > > The rk3328 uses a dw-hdmi controller with an external hdmi phy from > > Innosilicon which uses the generic phy framework for access. > > Add the necessary data and the compatible for the rk3328 to the > > rockchip dw-hdmi driver. > > > > Signed-off-by: Heiko Stuebner > > Tested-by: Robin Murphy > > Acked-by: Rob Herring > > > > changes in v3: > > - reword as suggested by Rob to show that it's a dw-hdmi + Inno phy > > --- > > .../display/rockchip/dw_hdmi-rockchip.txt | 1 + > > drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 106 ++++++++++++++++++ > > 2 files changed, 107 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt > > index 937bfb472e1d..39143424a474 100644 > > --- a/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt > > +++ b/Documentation/devicetree/bindings/display/rockchip/dw_hdmi-rockchip.txt > > @@ -13,6 +13,7 @@ Required properties: > > > > - compatible: should be one of the following: > > "rockchip,rk3288-dw-hdmi" > > + "rockchip,rk3328-dw-hdmi" > > "rockchip,rk3399-dw-hdmi" > > - reg: See dw_hdmi.txt. > > - reg-io-width: See dw_hdmi.txt. Shall be 4. > > diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c > > index 19f002fa0a09..237f31fd8403 100644 > > --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c > > +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c > > @@ -25,6 +25,24 @@ > > > > #define RK3288_GRF_SOC_CON6 0x025C > > #define RK3288_HDMI_LCDC_SEL BIT(4) > > +#define RK3328_GRF_SOC_CON2 0x0408 > > + > > +#define RK3328_HDMI_SDAIN_MSK BIT(11) > > +#define RK3328_HDMI_SCLIN_MSK BIT(10) > > +#define RK3328_HDMI_HPD_IOE BIT(2) > > +#define RK3328_GRF_SOC_CON3 0x040c > > +/* need to be unset if hdmi or i2c should control voltage */ > > +#define RK3328_HDMI_SDA5V_GRF BIT(15) > > +#define RK3328_HDMI_SCL5V_GRF BIT(14) > > +#define RK3328_HDMI_HPD5V_GRF BIT(13) > > +#define RK3328_HDMI_CEC5V_GRF BIT(12) > > +#define RK3328_GRF_SOC_CON4 0x0410 > > +#define RK3328_HDMI_HPD_SARADC BIT(13) > > +#define RK3328_HDMI_CEC_5V BIT(11) > > +#define RK3328_HDMI_SDA_5V BIT(10) > > +#define RK3328_HDMI_SCL_5V BIT(9) > > +#define RK3328_HDMI_HPD_5V BIT(8) > > + > > #define RK3399_GRF_SOC_CON20 0x6250 > > #define RK3399_HDMI_LCDC_SEL BIT(6) > > > > @@ -292,6 +310,68 @@ static const struct drm_encoder_helper_funcs dw_hdmi_rockchip_encoder_helper_fun > > .atomic_check = dw_hdmi_rockchip_encoder_atomic_check, > > }; > > > > +static int dw_hdmi_rockchip_genphy_init(struct dw_hdmi *dw_hdmi, void *data, > > + struct drm_display_mode *mode) > > +{ > > + struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; > > + > > + return phy_power_on(hdmi->phy); > > +} > > + > > +static void dw_hdmi_rockchip_genphy_disable(struct dw_hdmi *dw_hdmi, void *data) > > +{ > > + struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; > > + > > + phy_power_off(hdmi->phy); > > +} > > + > > +static enum drm_connector_status > > +dw_hdmi_rk3328_read_hpd(struct dw_hdmi *dw_hdmi, void *data) > > +{ > > + struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; > > + enum drm_connector_status status; > > + > > + status = dw_hdmi_phy_read_hpd(dw_hdmi, data); > > + > > + if (status == connector_status_connected) > > + regmap_write(hdmi->regmap, > > + RK3328_GRF_SOC_CON4, > > + HIWORD_UPDATE(RK3328_HDMI_CEC_5V | RK3328_HDMI_SDA_5V | > > + RK3328_HDMI_SCL_5V, > > + RK3328_HDMI_CEC_5V | RK3328_HDMI_SDA_5V | > > + RK3328_HDMI_SCL_5V)); > > This differs from BSP kernel and enable of CEC 5V stops CEC from working. > BSP kernel do not set write enable bit for CEC 5V: > > RK3328_IO_5V_DOMAIN ((7 << 9) | (3 << (9 + 16))) > > https://github.com/Kwiboo/linux-rockchip/commit/e74ac6a3a581bcb7b2ac9f4d70cf7298df01e417 makes CEC work on v3 of this patch. thanks for checking the cec functionality. I've incorporated your change and sent off v6. Maybe you can take another look and possible provide some Tested-by (or even Reviewed-by/Acked-by) tags? :-) Thanks Heiko