From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rabin Vincent Date: Thu, 8 Apr 2010 19:13:17 +0530 Subject: [U-Boot] [PATCHv2 10/13] ARM Cortex A9: ifdef code calling lowlevel init In-Reply-To: <1270734200-17762-10-git-send-email-rabin.vincent@stericsson.com> References: <1270734200-17762-1-git-send-email-rabin.vincent@stericsson.com> <1270734200-17762-2-git-send-email-rabin.vincent@stericsson.com> <1270734200-17762-3-git-send-email-rabin.vincent@stericsson.com> <1270734200-17762-4-git-send-email-rabin.vincent@stericsson.com> <1270734200-17762-5-git-send-email-rabin.vincent@stericsson.com> <1270734200-17762-6-git-send-email-rabin.vincent@stericsson.com> <1270734200-17762-7-git-send-email-rabin.vincent@stericsson.com> <1270734200-17762-8-git-send-email-rabin.vincent@stericsson.com> <1270734200-17762-9-git-send-email-rabin.vincent@stericsson.com> <1270734200-17762-10-git-send-email-rabin.vincent@stericsson.com> Message-ID: <1270734200-17762-11-git-send-email-rabin.vincent@stericsson.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Conditionally compile the code calling lowlevel_init, to avoid the following build error when CONFIG_SKIP_LOWLEVEL_INIT is defined: start.S:218: undefined reference to `lowlevel_init' Acked-by: Michael Brandt Signed-off-by: Rabin Vincent --- cpu/arm_cortexa9/start.S | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/cpu/arm_cortexa9/start.S b/cpu/arm_cortexa9/start.S index d667f6e..90f30b0 100644 --- a/cpu/arm_cortexa9/start.S +++ b/cpu/arm_cortexa9/start.S @@ -157,7 +157,7 @@ clbss_l: _start_armboot: .word start_armboot - +#ifndef CONFIG_SKIP_LOWLEVEL_INIT /************************************************************************* * * CPU_init_critical registers @@ -194,6 +194,8 @@ cpu_init_crit: bl lowlevel_init @ go setup pll,mux,memory mov lr, ip @ restore link mov pc, lr @ back to my caller +#endif + /* ************************************************************************* * -- 1.7.0