From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Lalancette Subject: [PATCH v3 2/3] Allow any LAPIC to accept PIC interrupts. Date: Wed, 16 Jun 2010 17:11:12 -0400 Message-ID: <1276722673-19011-3-git-send-email-clalance@redhat.com> References: <1276722673-19011-1-git-send-email-clalance@redhat.com> Cc: Chris Lalancette To: kvm@vger.kernel.org Return-path: Received: from mx1.redhat.com ([209.132.183.28]:21615 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752027Ab0FPVNf (ORCPT ); Wed, 16 Jun 2010 17:13:35 -0400 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.13.8/8.13.8) with ESMTP id o5GLDYav012087 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Wed, 16 Jun 2010 17:13:34 -0400 In-Reply-To: <1276722673-19011-1-git-send-email-clalance@redhat.com> Sender: kvm-owner@vger.kernel.org List-ID: If the guest wants to accept timer interrupts on a CPU other than the BSP, we need to remove this gate. Signed-off-by: Chris Lalancette --- arch/x86/kvm/lapic.c | 12 +++++------- 1 files changed, 5 insertions(+), 7 deletions(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index d8258a0..ee0f76c 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1107,13 +1107,11 @@ int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu) u32 lvt0 = apic_get_reg(vcpu->arch.apic, APIC_LVT0); int r = 0; - if (kvm_vcpu_is_bsp(vcpu)) { - if (!apic_hw_enabled(vcpu->arch.apic)) - r = 1; - if ((lvt0 & APIC_LVT_MASKED) == 0 && - GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT) - r = 1; - } + if (!apic_hw_enabled(vcpu->arch.apic)) + r = 1; + if ((lvt0 & APIC_LVT_MASKED) == 0 && + GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT) + r = 1; return r; } -- 1.6.6.1