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From: Chris Wilson <chris@chris-wilson.co.uk>
To: jbarnes@virtuousgeek.org
Cc: intel-gfx@lists.freedesktop.org
Subject: [PATCH 04/11] drm/i915: Clear scanline waits after disabling the pipe.
Date: Wed, 11 Aug 2010 10:31:29 +0100	[thread overview]
Message-ID: <1281519096-5152-5-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1281519096-5152-1-git-send-email-chris@chris-wilson.co.uk>

If we disable the pipe and the GPU is currently waiting on a scanline
WAIT_FOR_EVENT, the GPU will hang. Fortunately, there is a magic bit
which we can write on i915+ to break this wait after disabling the
pipe.

References:

  Bug 29252 - [Arrandale] Hung WAIT_FOR_EVENT when running rss-glx-skyrocket
  https://bugs.freedesktop.org/show_bug.cgi?id=29252

  Bug 28964 - [i965gm] GPU infinite MI_WAIT_FOR_EVENT while watching video in Totem
  https://bugs.freedesktop.org/show_bug.cgi?id=28964

and many others.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_reg.h      |    2 ++
 drivers/gpu/drm/i915/intel_display.c |   31 +++++++++++++++++++++++++++++--
 2 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a63e9a1..94e6275 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -295,6 +295,8 @@
 #define   RING_VALID_MASK	0x00000001
 #define   RING_VALID		0x00000001
 #define   RING_INVALID		0x00000000
+#define   RING_WAIT_I8XX	(1<<0) /* gen2, PRBx_HEAD */
+#define   RING_WAIT		(1<<11) /* gen3+, PRBx_CTL */
 #define PRB1_TAIL	0x02040 /* 915+ only */
 #define PRB1_HEAD	0x02044 /* 915+ only */
 #define PRB1_START	0x02048 /* 915+ only */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d5dd86f..4b98fa8 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2439,6 +2439,26 @@ static int i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
 	return 0;
 }
 
+/*
+ * When we disable a pipe, we need to clear any pending scanline wait events
+ * to avoid hanging the ring, which we assume we are waiting on.
+ */
+static void intel_clear_scanline_wait(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	u32 tmp;
+
+	if (IS_GEN2(dev))
+		/* Can't break the hang on i8xx */
+		return;
+
+	tmp = I915_READ(PRB0_CTL);
+	if (tmp & RING_WAIT) {
+		I915_WRITE(PRB0_CTL, tmp);
+		POSTING_READ(PRB0_CTL);
+	}
+}
+
 /**
  * Sets the power management mode of the pipe and plane.
  */
@@ -2458,7 +2478,8 @@ static int intel_crtc_dpms(struct drm_crtc *crtc, int mode)
 	 * with multiple pipes prior to enabling to new pipe.
 	 *
 	 * When switching off the display, make sure the cursor is
-	 * properly hidden prior to disabling the pipe.
+	 * properly hidden and there are no pending waits prior to
+	 * disabling the pipe.
 	 */
 	if (mode == DRM_MODE_DPMS_ON)
 		intel_update_watermarks(dev);
@@ -2469,8 +2490,14 @@ static int intel_crtc_dpms(struct drm_crtc *crtc, int mode)
 
 	if (mode == DRM_MODE_DPMS_ON)
 		intel_crtc_update_cursor(crtc);
-	else
+	else {
+		/* XXX Note that this is not a complete solution, but a hack
+		 * to avoid the most frequently hit hang.
+		 */
+		intel_clear_scanline_wait(dev);
+
 		intel_update_watermarks(dev);
+	}
 
 	if (!dev->primary->master)
 		return 0;
-- 
1.7.1

  parent reply	other threads:[~2010-08-11  9:32 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-08-11  9:31 Remaining set of small patches for -rc1 Chris Wilson
2010-08-11  9:31 ` [PATCH 01/11] drm/i915: Avoid using msleep under kdb and wait_for() Chris Wilson
2010-08-11 15:20   ` Jesse Barnes
2010-08-11  9:31 ` [PATCH 02/11] drm/i915: Include a generation number in the device info Chris Wilson
2010-08-11 15:22   ` Jesse Barnes
2010-08-11  9:31 ` [PATCH 03/11] drm/i915: Fix offset page-flips on i965+ Chris Wilson
2010-08-11  9:31 ` Chris Wilson [this message]
2010-08-11 15:23   ` [PATCH 04/11] drm/i915: Clear scanline waits after disabling the pipe Jesse Barnes
2010-08-11 16:12     ` Chris Wilson
2010-08-11  9:31 ` [PATCH 05/11] drm/i915: Sanity check user framebuffer parameters on creation Chris Wilson
2010-08-11  9:31 ` [PATCH 06/11] drm/i915: Re-use set_base_atomic to share setting of the display registers Chris Wilson
2010-08-11 15:25   ` Jesse Barnes
2010-08-11  9:31 ` [PATCH 07/11] drm/i915/sdvo: Propagate error from switching control buses Chris Wilson
2010-08-11  9:31 ` [PATCH 08/11] drm/i915: Add RING_WAIT reset to hangcheck Chris Wilson
2010-08-22  6:19   ` Eric Anholt
2010-08-22  8:50     ` [PATCH] drm/i915: Add ringbuffer wait " Chris Wilson
2010-08-11  9:31 ` [PATCH 09/11] drm/i915/crt: Flush register prior to waiting for vblank Chris Wilson
2010-08-11  9:31 ` [PATCH 10/11] drm/i915/dp: Boost timeout for enabling transcoder to 100ms Chris Wilson
2010-08-11  9:31 ` [PATCH 11/11] drm/i915: Perform initial configuration asynchronously Chris Wilson
2010-08-11  9:46 ` Remaining set of small patches for -rc1 shadi
2010-08-11 15:21   ` Alan W. Irwin

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