From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: [PATCH] drm/i915/tv: Flush register writes before sleeping. Date: Sun, 15 Aug 2010 15:56:13 +0100 Message-ID: <1281884173-13332-1-git-send-email-chris@chris-wilson.co.uk> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from fireflyinternet.com (server109-228-4-14.live-servers.net [109.228.4.14]) by gabe.freedesktop.org (Postfix) with ESMTP id 9B0609E734 for ; Sun, 15 Aug 2010 07:56:53 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org If we need to wait until the next vblank for the register to be updated and to take effect, make sure the write is actually flushed to the register prior to sleeping. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/intel_tv.c | 9 ++++++++- 1 files changed, 8 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index d2105f0..46fc3aa 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c @@ -1155,10 +1155,13 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, I915_WRITE(dspbase_reg, I915_READ(dspbase_reg)); /* Wait for vblank for the disable to take effect */ - if (!IS_I9XX(dev)) + if (!IS_I9XX(dev)) { + POSTING_READ(dspbase_reg); intel_wait_for_vblank(dev); + } I915_WRITE(pipeconf_reg, pipeconf & ~PIPEACONF_ENABLE); + POSTING_READ(pipeconf_reg); /* Wait for vblank for the disable to take effect. */ intel_wait_for_vblank(dev); @@ -1267,11 +1270,15 @@ intel_tv_detect_type (struct intel_tv *intel_tv) DAC_C_0_7_V); I915_WRITE(TV_CTL, tv_ctl); I915_WRITE(TV_DAC, tv_dac); + POSTING_READ(TV_DAC); intel_wait_for_vblank(dev); + tv_dac = I915_READ(TV_DAC); I915_WRITE(TV_DAC, save_tv_dac); I915_WRITE(TV_CTL, save_tv_ctl); + POSTING_READ(TV_CTL); intel_wait_for_vblank(dev); + /* * A B C * 0 1 1 Composite -- 1.7.1