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From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 15/23] intel-gtt: i965: use detected gtt size for mapping
Date: Wed,  1 Sep 2010 22:30:02 +0200	[thread overview]
Message-ID: <1283373010-1314-16-git-send-email-daniel.vetter@ffwll.ch> (raw)
In-Reply-To: <1283373010-1314-1-git-send-email-daniel.vetter@ffwll.ch>

Also move the Sandybdridge size detection into gtt_total_entries, like
the rest.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/char/agp/intel-gtt.c |   75 +++++++++++++++++++-----------------------
 1 files changed, 34 insertions(+), 41 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 3425e71..fb324d7 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -682,7 +682,7 @@ static unsigned int intel_gtt_total_entries(void)
 {
 	int size;
 
-	if (IS_G33 || INTEL_GTT_GEN >= 4) {
+	if (IS_G33 || INTEL_GTT_GEN == 4 || INTEL_GTT_GEN == 5) {
 		u32 pgetbl_ctl;
 		pgetbl_ctl = readl(intel_private.registers+I810_PGETBL_CTL);
 
@@ -712,6 +712,24 @@ static unsigned int intel_gtt_total_entries(void)
 		}
 
 		return size/4;
+	} else if (INTEL_GTT_GEN == 6) {
+		u16 snb_gmch_ctl;
+
+		pci_read_config_word(intel_private.pcidev, SNB_GMCH_CTRL, &snb_gmch_ctl);
+		switch (snb_gmch_ctl & SNB_GTT_SIZE_MASK) {
+		default:
+		case SNB_GTT_SIZE_0M:
+			printk(KERN_ERR "Bad GTT size mask: 0x%04x.\n", snb_gmch_ctl);
+			size = MB(0);
+			break;
+		case SNB_GTT_SIZE_1M:
+			size = MB(1);
+			break;
+		case SNB_GTT_SIZE_2M:
+			size = MB(2);
+			break;
+		}
+		return size/4;
 	} else {
 		/* On previous hardware, the GTT size was just what was
 		 * required to map the aperture.
@@ -1296,43 +1314,18 @@ static unsigned long intel_gen6_mask_memory(struct agp_bridge_data *bridge,
 
 static void intel_i965_get_gtt_range(int *gtt_offset, int *gtt_size)
 {
-	u16 snb_gmch_ctl;
-
-	switch (intel_private.bridge_dev->device) {
-	case PCI_DEVICE_ID_INTEL_GM45_HB:
-	case PCI_DEVICE_ID_INTEL_EAGLELAKE_HB:
-	case PCI_DEVICE_ID_INTEL_Q45_HB:
-	case PCI_DEVICE_ID_INTEL_G45_HB:
-	case PCI_DEVICE_ID_INTEL_G41_HB:
-	case PCI_DEVICE_ID_INTEL_B43_HB:
-	case PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB:
-	case PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB:
-	case PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB:
-	case PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB:
-		*gtt_offset = *gtt_size = MB(2);
-		break;
-	case PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB:
-	case PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB:
+	switch (INTEL_GTT_GEN) {
+	case 5:
+	case 6:
 		*gtt_offset = MB(2);
-
-		pci_read_config_word(intel_private.pcidev, SNB_GMCH_CTRL, &snb_gmch_ctl);
-		switch (snb_gmch_ctl & SNB_GTT_SIZE_MASK) {
-		default:
-		case SNB_GTT_SIZE_0M:
-			printk(KERN_ERR "Bad GTT size mask: 0x%04x.\n", snb_gmch_ctl);
-			*gtt_size = MB(0);
-			break;
-		case SNB_GTT_SIZE_1M:
-			*gtt_size = MB(1);
-			break;
-		case SNB_GTT_SIZE_2M:
-			*gtt_size = MB(2);
-			break;
-		}
 		break;
+	case 4:
 	default:
-		*gtt_offset = *gtt_size = KB(512);
+		*gtt_offset =  KB(512);
+		break;
 	}
+
+	*gtt_size = intel_private.base.gtt_total_entries * 4;
 }
 
 /* The intel i965 automatically initializes the agp aperture during POST.
@@ -1355,17 +1348,17 @@ static int intel_i965_create_gatt_table(struct agp_bridge_data *bridge)
 
 	temp &= 0xfff00000;
 
-	intel_i965_get_gtt_range(&gtt_offset, &gtt_size);
+	intel_private.registers = ioremap(temp, 128 * 4096);
+	if (!intel_private.registers) 
+		return -ENOMEM;
 
-	intel_private.gtt = ioremap((temp + gtt_offset) , gtt_size);
+	intel_private.base.gtt_total_entries = intel_gtt_total_entries();
 
-	if (!intel_private.gtt)
-		return -ENOMEM;
+	intel_i965_get_gtt_range(&gtt_offset, &gtt_size);
 
-	intel_private.base.gtt_total_entries = gtt_size / 4;
+	intel_private.gtt = ioremap((temp + gtt_offset) , gtt_size);
 
-	intel_private.registers = ioremap(temp, 128 * 4096);
-	if (!intel_private.registers) {
+	if (!intel_private.gtt) {
 		iounmap(intel_private.gtt);
 		return -ENOMEM;
 	}
-- 
1.7.2.2

  parent reply	other threads:[~2010-09-01 20:28 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-09-01 20:29 [PATCH 00/23] intel gtt rework, part 1: initialization Daniel Vetter
2010-09-01 20:29 ` [PATCH 01/23] agp/intel: split out gmch/gtt probe, part 2 Daniel Vetter
2010-09-01 20:29 ` [PATCH 02/23] agp/intel: make intel-gtt.c into a real source file Daniel Vetter
2010-09-01 20:29 ` [PATCH 03/23] intel-gtt: introduce drm/intel-gtt.h Daniel Vetter
2010-09-01 20:29 ` [PATCH 04/23] intel-gtt: store a local pointer to the bridge pci dev Daniel Vetter
2010-09-01 20:29 ` [PATCH 05/23] intel-gtt: s/intel_i830_init_gtt_entries/intel_gtt_stolen_entries Daniel Vetter
2010-09-01 20:29 ` [PATCH 06/23] intel-gtt: new function intel_gtt_mappable_entries Daniel Vetter
2010-09-01 20:29 ` [PATCH 07/23] intel-gtt: generic intel_fake_agp_fetch_size Daniel Vetter
2010-09-01 20:29 ` [PATCH 08/23] intel-gtt: sane variable names for intel_gtt_stolen_entries Daniel Vetter
2010-09-01 20:29 ` [PATCH 09/23] intel-gtt: drop unnecessary conditions in intel_gtt_stolen_entries Daniel Vetter
2010-09-01 20:29 ` [PATCH 10/23] intel-gtt: adjust overhead entries " Daniel Vetter
2010-09-01 20:29 ` [PATCH 11/23] intel-gtt: s/i8[13]0/fake_agp for generic functions Daniel Vetter
2010-09-01 20:29 ` [PATCH 12/23] intel-gtt: fix gtt_total_entries detection Daniel Vetter
2010-09-01 20:30 ` [PATCH 13/23] intel-gtt: introduce intel_gtt_driver Daniel Vetter
2010-09-01 20:30 ` [PATCH 14/23] intel-gtt: i915: use detected gtt size for mapping Daniel Vetter
2010-09-01 20:30 ` Daniel Vetter [this message]
2010-09-01 20:30 ` [PATCH 16/23] intel-gtt: i830: adjust ioremap of regs and gtt to i9xx Daniel Vetter
2010-09-01 20:30 ` [PATCH 17/23] intel-gtt: consolidate the gtt ioremap calls Daniel Vetter
2010-09-01 20:30 ` [PATCH 18/23] intel-gtt: consolidate i830 setup Daniel Vetter
2010-09-01 20:30 ` [PATCH 19/23] intel-gtt: consolidate i9xx setup Daniel Vetter
2010-09-01 20:30 ` [PATCH 20/23] intel-gtt: call init_gtt_init in probe function Daniel Vetter
2010-09-01 20:30 ` [PATCH 21/23] intel-gtt: use chipset generation number some more Daniel Vetter
2010-09-01 20:30 ` [PATCH 22/23] drm/i915: drop prealloc_start from i915_dma.c gtt init Daniel Vetter
2010-09-01 20:30 ` [PATCH 23/23] drm/i915: die, i915_probe_agp, die Daniel Vetter
2010-09-05 16:10   ` Chris Wilson
2010-09-02  1:19 ` [PATCH 00/23] intel gtt rework, part 1: initialization Dave Airlie
2010-09-02 11:20 ` Chris Wilson

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