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From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 5/7] drm/i915: don't change VDD AUX status in panel power functions
Date: Wed,  8 Sep 2010 12:42:03 -0700	[thread overview]
Message-ID: <1283974925-2913-6-git-send-email-jbarnes@virtuousgeek.org> (raw)
In-Reply-To: <1283974925-2913-1-git-send-email-jbarnes@virtuousgeek.org>

Mode set sequence outlines when the AUX VDD bit should be set and
cleared, and it's separate from the panel power sequence.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_dp.c |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 5053391..2f7eb5d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -783,7 +783,7 @@ static bool ironlake_edp_panel_on (struct drm_device *dev)
 		DRM_ERROR("panel on wait timed out: 0x%08x\n",
 			  I915_READ(PCH_PP_STATUS));
 
-	pp &= ~(PANEL_UNLOCK_REGS | EDP_FORCE_VDD);
+	pp &= ~(PANEL_UNLOCK_REGS);
 	pp |= PANEL_POWER_RESET; /* restore panel reset bit */
 	I915_WRITE(PCH_PP_CONTROL, pp);
 	POSTING_READ(PCH_PP_CONTROL);
@@ -811,7 +811,7 @@ static void ironlake_edp_panel_off (struct drm_device *dev)
 			  I915_READ(PCH_PP_STATUS));
 
 	/* Make sure VDD is enabled so DP AUX will work */
-	pp |= EDP_FORCE_VDD | PANEL_POWER_RESET; /* restore panel reset bit */
+	pp |= PANEL_POWER_RESET; /* restore panel reset bit */
 	I915_WRITE(PCH_PP_CONTROL, pp);
 	POSTING_READ(PCH_PP_CONTROL);
 }
-- 
1.6.3.3

  parent reply	other threads:[~2010-09-08 19:42 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-09-08 19:41 eDP fixes Jesse Barnes
2010-09-08 19:41 ` [PATCH 1/7] drm/i915: fix eDP detection Jesse Barnes
2010-09-08 19:42 ` [PATCH 2/7] drm/i915: use 125MHz reference clock for PCH attached eDP Jesse Barnes
2010-09-08 19:42 ` [PATCH 3/7] drm/i915: use VDD AUX for panel power around detection and in prepare Jesse Barnes
2010-09-08 19:42 ` [PATCH 4/7] drm/i915: split DP link training across panel power sequencing Jesse Barnes
2010-09-08 19:42 ` Jesse Barnes [this message]
2010-09-08 19:42 ` [PATCH 6/7] drm/i915: make sure VDD AUX power has time to settle Jesse Barnes
2010-09-08 19:42 ` [PATCH 7/7] drm/i915: make sure panel is sequenced off when starting a mode set Jesse Barnes
2010-09-08 20:11   ` Chris Wilson

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