From: Daniel Vetter <daniel.vetter@ffwll.ch>
To: intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 16/17] intel-gtt: store the dma mask size in intel_gtt_driver
Date: Tue, 14 Sep 2010 00:35:13 +0200 [thread overview]
Message-ID: <1284417314-32070-17-git-send-email-daniel.vetter@ffwll.ch> (raw)
In-Reply-To: <1284417314-32070-1-git-send-email-daniel.vetter@ffwll.ch>
Storing this explicitly makes for clearer code and hopefully
less further confusion.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/char/agp/intel-gtt.c | 18 +++++++++++-------
1 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index a4f2774..b0ba00c 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -73,6 +73,7 @@ struct intel_gtt_driver {
unsigned int is_g33 : 1;
unsigned int is_pineview : 1;
unsigned int is_ironlake : 1;
+ unsigned int dma_mask_size : 8;
/* Chipset specific GTT setup */
int (*setup)(void);
void (*write_entry)(dma_addr_t addr, unsigned int entry, unsigned int flags);
@@ -1306,11 +1307,13 @@ static const struct agp_bridge_driver intel_fake_agp_driver = {
static const struct intel_gtt_driver i81x_gtt_driver = {
.gen = 1,
+ .dma_mask_size = 32,
};
static const struct intel_gtt_driver i8xx_gtt_driver = {
.gen = 2,
.setup = i830_setup,
.write_entry = i830_write_entry,
+ .dma_mask_size = 32,
.check_flags = i830_check_flags,
.chipset_flush = i830_chipset_flush,
};
@@ -1319,6 +1322,7 @@ static const struct intel_gtt_driver i915_gtt_driver = {
.setup = i9xx_setup,
/* i945 is the last gpu to need phys mem (for overlay and cursors). */
.write_entry = i830_write_entry,
+ .dma_mask_size = 32,
.check_flags = i830_check_flags,
.chipset_flush = i9xx_chipset_flush,
};
@@ -1327,6 +1331,7 @@ static const struct intel_gtt_driver g33_gtt_driver = {
.is_g33 = 1,
.setup = i9xx_setup,
.write_entry = i965_write_entry,
+ .dma_mask_size = 36,
.check_flags = i830_check_flags,
.chipset_flush = i9xx_chipset_flush,
};
@@ -1335,6 +1340,7 @@ static const struct intel_gtt_driver pineview_gtt_driver = {
.is_pineview = 1, .is_g33 = 1,
.setup = i9xx_setup,
.write_entry = i965_write_entry,
+ .dma_mask_size = 36,
.check_flags = i830_check_flags,
.chipset_flush = i9xx_chipset_flush,
};
@@ -1342,6 +1348,7 @@ static const struct intel_gtt_driver i965_gtt_driver = {
.gen = 4,
.setup = i9xx_setup,
.write_entry = i965_write_entry,
+ .dma_mask_size = 36,
.check_flags = i830_check_flags,
.chipset_flush = i9xx_chipset_flush,
};
@@ -1349,6 +1356,7 @@ static const struct intel_gtt_driver g4x_gtt_driver = {
.gen = 5,
.setup = i9xx_setup,
.write_entry = i965_write_entry,
+ .dma_mask_size = 36,
.check_flags = i830_check_flags,
.chipset_flush = i9xx_chipset_flush,
};
@@ -1357,6 +1365,7 @@ static const struct intel_gtt_driver ironlake_gtt_driver = {
.is_ironlake = 1,
.setup = i9xx_setup,
.write_entry = i965_write_entry,
+ .dma_mask_size = 36,
.check_flags = i830_check_flags,
.chipset_flush = i9xx_chipset_flush,
};
@@ -1364,6 +1373,7 @@ static const struct intel_gtt_driver sandybridge_gtt_driver = {
.gen = 6,
.setup = i9xx_setup,
.write_entry = gen6_write_entry,
+ .dma_mask_size = 40,
.check_flags = gen6_check_flags,
.chipset_flush = i9xx_chipset_flush,
};
@@ -1506,13 +1516,7 @@ int intel_gmch_probe(struct pci_dev *pdev,
dev_info(&pdev->dev, "Intel %s Chipset\n", intel_gtt_chipsets[i].name);
- if (intel_private.driver->write_entry == gen6_write_entry)
- mask = 40;
- else if (intel_private.driver->write_entry == i965_write_entry)
- mask = 36;
- else
- mask = 32;
-
+ mask = intel_private.driver->dma_mask_size;
if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(mask)))
dev_err(&intel_private.pcidev->dev,
"set gfx device dma mask %d-bit failed!\n", mask);
--
1.7.1
next prev parent reply other threads:[~2010-09-13 22:33 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-09-13 22:34 [PATCH 00/17] gtt rework, part2 : pte handling Daniel Vetter
2010-09-13 22:34 ` [PATCH 01/17] intel-gtt: initialize our own scratch page Daniel Vetter
2010-09-13 22:34 ` [PATCH 02/17] intel-gtt: introduce pte write function for i8xx/i915/i945 Daniel Vetter
2010-09-13 22:35 ` [PATCH 03/17] intel-gtt: introduce pte write function for g33/i965/gm45 Daniel Vetter
2010-09-13 22:35 ` [PATCH 04/17] intel-gtt: introduce pte write function for gen6 Daniel Vetter
2010-09-13 22:35 ` [PATCH 05/17] intel-gtt: drop agp scratch page support stuff Daniel Vetter
2010-09-13 22:35 ` [PATCH 06/17] agp: kill agp_(map|unmap)_page Daniel Vetter
2010-09-13 22:35 ` [PATCH 07/17] intel-gtt: generic (insert|remove)_entries for i830 Daniel Vetter
2010-09-13 22:35 ` [PATCH 08/17] intel-gtt: generic (insert|remove)_entries for i915 Daniel Vetter
2010-09-13 22:35 ` [PATCH 09/17] intel-gtt: generic (insert|remove)_entries for g33/i965 Daniel Vetter
2010-09-13 22:35 ` [PATCH 10/17] intel-gtt: generic (insert|remove)_entries for sandybridge Daniel Vetter
2010-09-13 22:35 ` [PATCH 11/17] intel-gtt: kill mask_memory functions Daniel Vetter
2010-09-13 22:35 ` [PATCH 12/17] intel-gtt: move chipset flush to the gtt driver struct Daniel Vetter
2010-09-13 22:35 ` [PATCH 13/17] intel-gtt: consolidate fake_agp driver structs Daniel Vetter
2010-09-13 22:35 ` [PATCH 14/17] agp: kill agp_(unmap|map)_memory Daniel Vetter
2010-09-13 22:35 ` [PATCH 15/17] intel-gtt: clean up gtt size reporting Daniel Vetter
2010-09-13 22:35 ` Daniel Vetter [this message]
2010-09-13 22:35 ` [PATCH 17/17] intel-gtt add a cleanup function for chipset specific stuff Daniel Vetter
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