* [U-Boot] [PATCH 0/3] Share header files of Faraday controllers from a320 SoC.
@ 2010-10-28 12:35 Macpaul Lin
2010-10-28 12:35 ` [U-Boot] [PATCH 1/3] ftpmu010: move ftpmu010 power controller to drivers/power folder Macpaul Lin
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Macpaul Lin @ 2010-10-28 12:35 UTC (permalink / raw)
To: u-boot
The following three device controller inside a320 SoC are Soft IP which are
also used by other SoC products. Here we suggest to move those header files
out from a320 SoC folder into drivers folder. This change should provide
header file sharing with multiple SoC.
Macpaul Lin (3):
ftpmu010: move ftpmu010 power controller to drivers/power folder
fttmr010: move fttmr010 controller to drivers/timer folder
ftsdmc020: move ftsdmc020 sdram controller to driver/misc folder
arch/arm/cpu/arm920t/a320/timer.c | 4 +-
arch/arm/include/asm/arch-a320/ftpmu010.h | 146 ----------------------------
arch/arm/include/asm/arch-a320/ftsdmc020.h | 103 -------------------
arch/arm/include/asm/arch-a320/fttmr010.h | 73 --------------
board/faraday/a320evb/lowlevel_init.S | 2 +-
drivers/misc/ftsdmc020.h | 103 +++++++++++++++++++
drivers/power/ftpmu010.h | 146 ++++++++++++++++++++++++++++
drivers/timer/fttmr010.h | 73 ++++++++++++++
8 files changed, 325 insertions(+), 325 deletions(-)
delete mode 100644 arch/arm/include/asm/arch-a320/ftpmu010.h
delete mode 100644 arch/arm/include/asm/arch-a320/ftsdmc020.h
delete mode 100644 arch/arm/include/asm/arch-a320/fttmr010.h
create mode 100644 drivers/misc/ftsdmc020.h
create mode 100644 drivers/power/ftpmu010.h
create mode 100644 drivers/timer/fttmr010.h
--
1.7.3.2
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 1/3] ftpmu010: move ftpmu010 power controller to drivers/power folder
2010-10-28 12:35 [U-Boot] [PATCH 0/3] Share header files of Faraday controllers from a320 SoC Macpaul Lin
@ 2010-10-28 12:35 ` Macpaul Lin
2010-10-28 12:36 ` [U-Boot] [PATCH 2/3] fttmr010: move fttmr010 controller to drivers/timer folder Macpaul Lin
2010-10-28 12:36 ` [U-Boot] [PATCH 3/3] ftsdmc020: move ftsdmc020 sdram controller to driver/misc folder Macpaul Lin
2 siblings, 0 replies; 6+ messages in thread
From: Macpaul Lin @ 2010-10-28 12:35 UTC (permalink / raw)
To: u-boot
Move the header file and definitions of ftpmu010
power control unit from a320 SoC folder to
"drivers/power" folder.
This change will let other SoC which also use ftpmu010
could share the same header file.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
---
arch/arm/cpu/arm920t/a320/timer.c | 2 +-
arch/arm/include/asm/arch-a320/ftpmu010.h | 146 -----------------------------
drivers/power/ftpmu010.h | 146 +++++++++++++++++++++++++++++
3 files changed, 147 insertions(+), 147 deletions(-)
delete mode 100644 arch/arm/include/asm/arch-a320/ftpmu010.h
create mode 100644 drivers/power/ftpmu010.h
diff --git a/arch/arm/cpu/arm920t/a320/timer.c b/arch/arm/cpu/arm920t/a320/timer.c
index d2e316f..4718ae6 100644
--- a/arch/arm/cpu/arm920t/a320/timer.c
+++ b/arch/arm/cpu/arm920t/a320/timer.c
@@ -19,7 +19,7 @@
#include <common.h>
#include <asm/io.h>
-#include <asm/arch/ftpmu010.h>
+#include "../../../../../drivers/power/ftpmu010.h"
#include <asm/arch/fttmr010.h>
static ulong timestamp;
diff --git a/arch/arm/include/asm/arch-a320/ftpmu010.h b/arch/arm/include/asm/arch-a320/ftpmu010.h
deleted file mode 100644
index 8ef7a37..0000000
--- a/arch/arm/include/asm/arch-a320/ftpmu010.h
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * (C) Copyright 2009 Faraday Technology
- * Po-Yu Chuang <ratbert@faraday-tech.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-/*
- * Power Management Unit
- */
-#ifndef __FTPMU010_H
-#define __FTPMU010_H
-
-struct ftpmu010 {
- unsigned int IDNMBR0; /* 0x00 */
- unsigned int reserved0; /* 0x04 */
- unsigned int OSCC; /* 0x08 */
- unsigned int PMODE; /* 0x0C */
- unsigned int PMCR; /* 0x10 */
- unsigned int PED; /* 0x14 */
- unsigned int PEDSR; /* 0x18 */
- unsigned int reserved1; /* 0x1C */
- unsigned int PMSR; /* 0x20 */
- unsigned int PGSR; /* 0x24 */
- unsigned int MFPSR; /* 0x28 */
- unsigned int MISC; /* 0x2C */
- unsigned int PDLLCR0; /* 0x30 */
- unsigned int PDLLCR1; /* 0x34 */
- unsigned int AHBMCLKOFF; /* 0x38 */
- unsigned int APBMCLKOFF; /* 0x3C */
- unsigned int DCSRCR0; /* 0x40 */
- unsigned int DCSRCR1; /* 0x44 */
- unsigned int DCSRCR2; /* 0x48 */
- unsigned int SDRAMHTC; /* 0x4C */
- unsigned int PSPR0; /* 0x50 */
- unsigned int PSPR1; /* 0x54 */
- unsigned int PSPR2; /* 0x58 */
- unsigned int PSPR3; /* 0x5C */
- unsigned int PSPR4; /* 0x60 */
- unsigned int PSPR5; /* 0x64 */
- unsigned int PSPR6; /* 0x68 */
- unsigned int PSPR7; /* 0x6C */
- unsigned int PSPR8; /* 0x70 */
- unsigned int PSPR9; /* 0x74 */
- unsigned int PSPR10; /* 0x78 */
- unsigned int PSPR11; /* 0x7C */
- unsigned int PSPR12; /* 0x80 */
- unsigned int PSPR13; /* 0x84 */
- unsigned int PSPR14; /* 0x88 */
- unsigned int PSPR15; /* 0x8C */
- unsigned int AHBDMA_RACCS; /* 0x90 */
- unsigned int reserved2; /* 0x94 */
- unsigned int reserved3; /* 0x98 */
- unsigned int JSS; /* 0x9C */
- unsigned int CFC_RACC; /* 0xA0 */
- unsigned int SSP1_RACC; /* 0xA4 */
- unsigned int UART1TX_RACC; /* 0xA8 */
- unsigned int UART1RX_RACC; /* 0xAC */
- unsigned int UART2TX_RACC; /* 0xB0 */
- unsigned int UART2RX_RACC; /* 0xB4 */
- unsigned int SDC_RACC; /* 0xB8 */
- unsigned int I2SAC97_RACC; /* 0xBC */
- unsigned int IRDATX_RACC; /* 0xC0 */
- unsigned int reserved4; /* 0xC4 */
- unsigned int USBD_RACC; /* 0xC8 */
- unsigned int IRDARX_RACC; /* 0xCC */
- unsigned int IRDA_RACC; /* 0xD0 */
- unsigned int ED0_RACC; /* 0xD4 */
- unsigned int ED1_RACC; /* 0xD8 */
-};
-
-/*
- * ID Number 0 Register
- */
-#define FTPMU010_ID_A320A 0x03200000
-#define FTPMU010_ID_A320C 0x03200010
-#define FTPMU010_ID_A320D 0x03200030
-
-/*
- * OSC Control Register
- */
-#define FTPMU010_OSCC_OSCH_TRI (1 << 11)
-#define FTPMU010_OSCC_OSCH_STABLE (1 << 9)
-#define FTPMU010_OSCC_OSCH_OFF (1 << 8)
-
-#define FTPMU010_OSCC_OSCL_TRI (1 << 3)
-#define FTPMU010_OSCC_OSCL_RTCLSEL (1 << 2)
-#define FTPMU010_OSCC_OSCL_STABLE (1 << 1)
-#define FTPMU010_OSCC_OSCL_OFF (1 << 0)
-
-/*
- * Power Mode Register
- */
-#define FTPMU010_PMODE_DIVAHBCLK_MASK (0x7 << 4)
-#define FTPMU010_PMODE_DIVAHBCLK_2 (0x0 << 4)
-#define FTPMU010_PMODE_DIVAHBCLK_3 (0x1 << 4)
-#define FTPMU010_PMODE_DIVAHBCLK_4 (0x2 << 4)
-#define FTPMU010_PMODE_DIVAHBCLK_6 (0x3 << 4)
-#define FTPMU010_PMODE_DIVAHBCLK_8 (0x4 << 4)
-#define FTPMU010_PMODE_DIVAHBCLK(pmode) (((pmode) >> 4) & 0x7)
-#define FTPMU010_PMODE_FCS (1 << 2)
-#define FTPMU010_PMODE_TURBO (1 << 1)
-#define FTPMU010_PMODE_SLEEP (1 << 0)
-
-/*
- * Power Manager Status Register
- */
-#define FTPMU010_PMSR_SMR (1 << 10)
-
-#define FTPMU010_PMSR_RDH (1 << 2)
-#define FTPMU010_PMSR_PH (1 << 1)
-#define FTPMU010_PMSR_CKEHLOW (1 << 0)
-
-/*
- * Multi-Function Port Setting Register
- */
-#define FTPMU010_MFPSR_MODEMPINSEL (1 << 14)
-#define FTPMU010_MFPSR_AC97CLKOUTSEL (1 << 13)
-#define FTPMU010_MFPSR_AC97PINSEL (1 << 3)
-
-/*
- * PLL/DLL Control Register 0
- */
-#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0) (((cr0) >> 20) & 0xf)
-#define FTPMU010_PDLLCR0_DLLFRAG (1 << 19)
-#define FTPMU010_PDLLCR0_DLLSTSEL (1 << 18)
-#define FTPMU010_PDLLCR0_DLLSTABLE (1 << 17)
-#define FTPMU010_PDLLCR0_DLLDIS (1 << 16)
-#define FTPMU010_PDLLCR0_PLL1NS(cr0) (((cr0) >> 3) & 0x1ff)
-#define FTPMU010_PDLLCR0_PLL1STSEL (1 << 2)
-#define FTPMU010_PDLLCR0_PLL1STABLE (1 << 1)
-#define FTPMU010_PDLLCR0_PLL1DIS (1 << 0)
-
-#endif /* __FTPMU010_H */
diff --git a/drivers/power/ftpmu010.h b/drivers/power/ftpmu010.h
new file mode 100644
index 0000000..8ef7a37
--- /dev/null
+++ b/drivers/power/ftpmu010.h
@@ -0,0 +1,146 @@
+/*
+ * (C) Copyright 2009 Faraday Technology
+ * Po-Yu Chuang <ratbert@faraday-tech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Power Management Unit
+ */
+#ifndef __FTPMU010_H
+#define __FTPMU010_H
+
+struct ftpmu010 {
+ unsigned int IDNMBR0; /* 0x00 */
+ unsigned int reserved0; /* 0x04 */
+ unsigned int OSCC; /* 0x08 */
+ unsigned int PMODE; /* 0x0C */
+ unsigned int PMCR; /* 0x10 */
+ unsigned int PED; /* 0x14 */
+ unsigned int PEDSR; /* 0x18 */
+ unsigned int reserved1; /* 0x1C */
+ unsigned int PMSR; /* 0x20 */
+ unsigned int PGSR; /* 0x24 */
+ unsigned int MFPSR; /* 0x28 */
+ unsigned int MISC; /* 0x2C */
+ unsigned int PDLLCR0; /* 0x30 */
+ unsigned int PDLLCR1; /* 0x34 */
+ unsigned int AHBMCLKOFF; /* 0x38 */
+ unsigned int APBMCLKOFF; /* 0x3C */
+ unsigned int DCSRCR0; /* 0x40 */
+ unsigned int DCSRCR1; /* 0x44 */
+ unsigned int DCSRCR2; /* 0x48 */
+ unsigned int SDRAMHTC; /* 0x4C */
+ unsigned int PSPR0; /* 0x50 */
+ unsigned int PSPR1; /* 0x54 */
+ unsigned int PSPR2; /* 0x58 */
+ unsigned int PSPR3; /* 0x5C */
+ unsigned int PSPR4; /* 0x60 */
+ unsigned int PSPR5; /* 0x64 */
+ unsigned int PSPR6; /* 0x68 */
+ unsigned int PSPR7; /* 0x6C */
+ unsigned int PSPR8; /* 0x70 */
+ unsigned int PSPR9; /* 0x74 */
+ unsigned int PSPR10; /* 0x78 */
+ unsigned int PSPR11; /* 0x7C */
+ unsigned int PSPR12; /* 0x80 */
+ unsigned int PSPR13; /* 0x84 */
+ unsigned int PSPR14; /* 0x88 */
+ unsigned int PSPR15; /* 0x8C */
+ unsigned int AHBDMA_RACCS; /* 0x90 */
+ unsigned int reserved2; /* 0x94 */
+ unsigned int reserved3; /* 0x98 */
+ unsigned int JSS; /* 0x9C */
+ unsigned int CFC_RACC; /* 0xA0 */
+ unsigned int SSP1_RACC; /* 0xA4 */
+ unsigned int UART1TX_RACC; /* 0xA8 */
+ unsigned int UART1RX_RACC; /* 0xAC */
+ unsigned int UART2TX_RACC; /* 0xB0 */
+ unsigned int UART2RX_RACC; /* 0xB4 */
+ unsigned int SDC_RACC; /* 0xB8 */
+ unsigned int I2SAC97_RACC; /* 0xBC */
+ unsigned int IRDATX_RACC; /* 0xC0 */
+ unsigned int reserved4; /* 0xC4 */
+ unsigned int USBD_RACC; /* 0xC8 */
+ unsigned int IRDARX_RACC; /* 0xCC */
+ unsigned int IRDA_RACC; /* 0xD0 */
+ unsigned int ED0_RACC; /* 0xD4 */
+ unsigned int ED1_RACC; /* 0xD8 */
+};
+
+/*
+ * ID Number 0 Register
+ */
+#define FTPMU010_ID_A320A 0x03200000
+#define FTPMU010_ID_A320C 0x03200010
+#define FTPMU010_ID_A320D 0x03200030
+
+/*
+ * OSC Control Register
+ */
+#define FTPMU010_OSCC_OSCH_TRI (1 << 11)
+#define FTPMU010_OSCC_OSCH_STABLE (1 << 9)
+#define FTPMU010_OSCC_OSCH_OFF (1 << 8)
+
+#define FTPMU010_OSCC_OSCL_TRI (1 << 3)
+#define FTPMU010_OSCC_OSCL_RTCLSEL (1 << 2)
+#define FTPMU010_OSCC_OSCL_STABLE (1 << 1)
+#define FTPMU010_OSCC_OSCL_OFF (1 << 0)
+
+/*
+ * Power Mode Register
+ */
+#define FTPMU010_PMODE_DIVAHBCLK_MASK (0x7 << 4)
+#define FTPMU010_PMODE_DIVAHBCLK_2 (0x0 << 4)
+#define FTPMU010_PMODE_DIVAHBCLK_3 (0x1 << 4)
+#define FTPMU010_PMODE_DIVAHBCLK_4 (0x2 << 4)
+#define FTPMU010_PMODE_DIVAHBCLK_6 (0x3 << 4)
+#define FTPMU010_PMODE_DIVAHBCLK_8 (0x4 << 4)
+#define FTPMU010_PMODE_DIVAHBCLK(pmode) (((pmode) >> 4) & 0x7)
+#define FTPMU010_PMODE_FCS (1 << 2)
+#define FTPMU010_PMODE_TURBO (1 << 1)
+#define FTPMU010_PMODE_SLEEP (1 << 0)
+
+/*
+ * Power Manager Status Register
+ */
+#define FTPMU010_PMSR_SMR (1 << 10)
+
+#define FTPMU010_PMSR_RDH (1 << 2)
+#define FTPMU010_PMSR_PH (1 << 1)
+#define FTPMU010_PMSR_CKEHLOW (1 << 0)
+
+/*
+ * Multi-Function Port Setting Register
+ */
+#define FTPMU010_MFPSR_MODEMPINSEL (1 << 14)
+#define FTPMU010_MFPSR_AC97CLKOUTSEL (1 << 13)
+#define FTPMU010_MFPSR_AC97PINSEL (1 << 3)
+
+/*
+ * PLL/DLL Control Register 0
+ */
+#define FTPMU010_PDLLCR0_HCLKOUTDIS(cr0) (((cr0) >> 20) & 0xf)
+#define FTPMU010_PDLLCR0_DLLFRAG (1 << 19)
+#define FTPMU010_PDLLCR0_DLLSTSEL (1 << 18)
+#define FTPMU010_PDLLCR0_DLLSTABLE (1 << 17)
+#define FTPMU010_PDLLCR0_DLLDIS (1 << 16)
+#define FTPMU010_PDLLCR0_PLL1NS(cr0) (((cr0) >> 3) & 0x1ff)
+#define FTPMU010_PDLLCR0_PLL1STSEL (1 << 2)
+#define FTPMU010_PDLLCR0_PLL1STABLE (1 << 1)
+#define FTPMU010_PDLLCR0_PLL1DIS (1 << 0)
+
+#endif /* __FTPMU010_H */
--
1.7.3.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 2/3] fttmr010: move fttmr010 controller to drivers/timer folder
2010-10-28 12:35 [U-Boot] [PATCH 0/3] Share header files of Faraday controllers from a320 SoC Macpaul Lin
2010-10-28 12:35 ` [U-Boot] [PATCH 1/3] ftpmu010: move ftpmu010 power controller to drivers/power folder Macpaul Lin
@ 2010-10-28 12:36 ` Macpaul Lin
2010-10-28 12:36 ` [U-Boot] [PATCH 3/3] ftsdmc020: move ftsdmc020 sdram controller to driver/misc folder Macpaul Lin
2 siblings, 0 replies; 6+ messages in thread
From: Macpaul Lin @ 2010-10-28 12:36 UTC (permalink / raw)
To: u-boot
Move the header file and definitions of fttmr010
power control unit from a320 SoC folder to
"drivers/timer" folder.
This change will let other SoC which also use fttmr010
could share the same header file.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
---
arch/arm/cpu/arm920t/a320/timer.c | 2 +-
arch/arm/include/asm/arch-a320/fttmr010.h | 73 -----------------------------
drivers/timer/fttmr010.h | 73 +++++++++++++++++++++++++++++
3 files changed, 74 insertions(+), 74 deletions(-)
delete mode 100644 arch/arm/include/asm/arch-a320/fttmr010.h
create mode 100644 drivers/timer/fttmr010.h
diff --git a/arch/arm/cpu/arm920t/a320/timer.c b/arch/arm/cpu/arm920t/a320/timer.c
index 4718ae6..f650126 100644
--- a/arch/arm/cpu/arm920t/a320/timer.c
+++ b/arch/arm/cpu/arm920t/a320/timer.c
@@ -20,7 +20,7 @@
#include <common.h>
#include <asm/io.h>
#include "../../../../../drivers/power/ftpmu010.h"
-#include <asm/arch/fttmr010.h>
+#include "../../../../../drivers/timer/fttmr010.h"
static ulong timestamp;
static ulong lastdec;
diff --git a/arch/arm/include/asm/arch-a320/fttmr010.h b/arch/arm/include/asm/arch-a320/fttmr010.h
deleted file mode 100644
index 72abcb3..0000000
--- a/arch/arm/include/asm/arch-a320/fttmr010.h
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * (C) Copyright 2009 Faraday Technology
- * Po-Yu Chuang <ratbert@faraday-tech.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-/*
- * Timer
- */
-#ifndef __FTTMR010_H
-#define __FTTMR010_H
-
-struct fttmr010 {
- unsigned int timer1_counter; /* 0x00 */
- unsigned int timer1_load; /* 0x04 */
- unsigned int timer1_match1; /* 0x08 */
- unsigned int timer1_match2; /* 0x0c */
- unsigned int timer2_counter; /* 0x10 */
- unsigned int timer2_load; /* 0x14 */
- unsigned int timer2_match1; /* 0x18 */
- unsigned int timer2_match2; /* 0x1c */
- unsigned int timer3_counter; /* 0x20 */
- unsigned int timer3_load; /* 0x24 */
- unsigned int timer3_match1; /* 0x28 */
- unsigned int timer3_match2; /* 0x2c */
- unsigned int cr; /* 0x30 */
- unsigned int interrupt_state; /* 0x34 */
- unsigned int interrupt_mask; /* 0x38 */
-};
-
-/*
- * Timer Control Register
- */
-#define FTTMR010_TM3_UPDOWN (1 << 11)
-#define FTTMR010_TM2_UPDOWN (1 << 10)
-#define FTTMR010_TM1_UPDOWN (1 << 9)
-#define FTTMR010_TM3_OFENABLE (1 << 8)
-#define FTTMR010_TM3_CLOCK (1 << 7)
-#define FTTMR010_TM3_ENABLE (1 << 6)
-#define FTTMR010_TM2_OFENABLE (1 << 5)
-#define FTTMR010_TM2_CLOCK (1 << 4)
-#define FTTMR010_TM2_ENABLE (1 << 3)
-#define FTTMR010_TM1_OFENABLE (1 << 2)
-#define FTTMR010_TM1_CLOCK (1 << 1)
-#define FTTMR010_TM1_ENABLE (1 << 0)
-
-/*
- * Timer Interrupt State & Mask Registers
- */
-#define FTTMR010_TM3_OVERFLOW (1 << 8)
-#define FTTMR010_TM3_MATCH2 (1 << 7)
-#define FTTMR010_TM3_MATCH1 (1 << 6)
-#define FTTMR010_TM2_OVERFLOW (1 << 5)
-#define FTTMR010_TM2_MATCH2 (1 << 4)
-#define FTTMR010_TM2_MATCH1 (1 << 3)
-#define FTTMR010_TM1_OVERFLOW (1 << 2)
-#define FTTMR010_TM1_MATCH2 (1 << 1)
-#define FTTMR010_TM1_MATCH1 (1 << 0)
-
-#endif /* __FTTMR010_H */
diff --git a/drivers/timer/fttmr010.h b/drivers/timer/fttmr010.h
new file mode 100644
index 0000000..72abcb3
--- /dev/null
+++ b/drivers/timer/fttmr010.h
@@ -0,0 +1,73 @@
+/*
+ * (C) Copyright 2009 Faraday Technology
+ * Po-Yu Chuang <ratbert@faraday-tech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * Timer
+ */
+#ifndef __FTTMR010_H
+#define __FTTMR010_H
+
+struct fttmr010 {
+ unsigned int timer1_counter; /* 0x00 */
+ unsigned int timer1_load; /* 0x04 */
+ unsigned int timer1_match1; /* 0x08 */
+ unsigned int timer1_match2; /* 0x0c */
+ unsigned int timer2_counter; /* 0x10 */
+ unsigned int timer2_load; /* 0x14 */
+ unsigned int timer2_match1; /* 0x18 */
+ unsigned int timer2_match2; /* 0x1c */
+ unsigned int timer3_counter; /* 0x20 */
+ unsigned int timer3_load; /* 0x24 */
+ unsigned int timer3_match1; /* 0x28 */
+ unsigned int timer3_match2; /* 0x2c */
+ unsigned int cr; /* 0x30 */
+ unsigned int interrupt_state; /* 0x34 */
+ unsigned int interrupt_mask; /* 0x38 */
+};
+
+/*
+ * Timer Control Register
+ */
+#define FTTMR010_TM3_UPDOWN (1 << 11)
+#define FTTMR010_TM2_UPDOWN (1 << 10)
+#define FTTMR010_TM1_UPDOWN (1 << 9)
+#define FTTMR010_TM3_OFENABLE (1 << 8)
+#define FTTMR010_TM3_CLOCK (1 << 7)
+#define FTTMR010_TM3_ENABLE (1 << 6)
+#define FTTMR010_TM2_OFENABLE (1 << 5)
+#define FTTMR010_TM2_CLOCK (1 << 4)
+#define FTTMR010_TM2_ENABLE (1 << 3)
+#define FTTMR010_TM1_OFENABLE (1 << 2)
+#define FTTMR010_TM1_CLOCK (1 << 1)
+#define FTTMR010_TM1_ENABLE (1 << 0)
+
+/*
+ * Timer Interrupt State & Mask Registers
+ */
+#define FTTMR010_TM3_OVERFLOW (1 << 8)
+#define FTTMR010_TM3_MATCH2 (1 << 7)
+#define FTTMR010_TM3_MATCH1 (1 << 6)
+#define FTTMR010_TM2_OVERFLOW (1 << 5)
+#define FTTMR010_TM2_MATCH2 (1 << 4)
+#define FTTMR010_TM2_MATCH1 (1 << 3)
+#define FTTMR010_TM1_OVERFLOW (1 << 2)
+#define FTTMR010_TM1_MATCH2 (1 << 1)
+#define FTTMR010_TM1_MATCH1 (1 << 0)
+
+#endif /* __FTTMR010_H */
--
1.7.3.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 3/3] ftsdmc020: move ftsdmc020 sdram controller to driver/misc folder
2010-10-28 12:35 [U-Boot] [PATCH 0/3] Share header files of Faraday controllers from a320 SoC Macpaul Lin
2010-10-28 12:35 ` [U-Boot] [PATCH 1/3] ftpmu010: move ftpmu010 power controller to drivers/power folder Macpaul Lin
2010-10-28 12:36 ` [U-Boot] [PATCH 2/3] fttmr010: move fttmr010 controller to drivers/timer folder Macpaul Lin
@ 2010-10-28 12:36 ` Macpaul Lin
2 siblings, 0 replies; 6+ messages in thread
From: Macpaul Lin @ 2010-10-28 12:36 UTC (permalink / raw)
To: u-boot
Move the header file and definitions of ftsdmc020
sdram control unit from a320 SoC folder to
"drivers/misc" folder.
This change will let other SoC which also use ftsdmc020
could share the same header file.
Signed-off-by: Macpaul Lin <macpaul@andestech.com>
---
arch/arm/include/asm/arch-a320/ftsdmc020.h | 103 ----------------------------
board/faraday/a320evb/lowlevel_init.S | 2 +-
drivers/misc/ftsdmc020.h | 103 ++++++++++++++++++++++++++++
3 files changed, 104 insertions(+), 104 deletions(-)
delete mode 100644 arch/arm/include/asm/arch-a320/ftsdmc020.h
create mode 100644 drivers/misc/ftsdmc020.h
diff --git a/arch/arm/include/asm/arch-a320/ftsdmc020.h b/arch/arm/include/asm/arch-a320/ftsdmc020.h
deleted file mode 100644
index 0699772..0000000
--- a/arch/arm/include/asm/arch-a320/ftsdmc020.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- * (C) Copyright 2009 Faraday Technology
- * Po-Yu Chuang <ratbert@faraday-tech.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-/*
- * SDRAM Controller
- */
-#ifndef __FTSDMC020_H
-#define __FTSDMC020_H
-
-#define FTSDMC020_OFFSET_TP0 0x00
-#define FTSDMC020_OFFSET_TP1 0x04
-#define FTSDMC020_OFFSET_CR 0x08
-#define FTSDMC020_OFFSET_BANK0_BSR 0x0C
-#define FTSDMC020_OFFSET_BANK1_BSR 0x10
-#define FTSDMC020_OFFSET_BANK2_BSR 0x14
-#define FTSDMC020_OFFSET_BANK3_BSR 0x18
-#define FTSDMC020_OFFSET_BANK4_BSR 0x1C
-#define FTSDMC020_OFFSET_BANK5_BSR 0x20
-#define FTSDMC020_OFFSET_BANK6_BSR 0x24
-#define FTSDMC020_OFFSET_BANK7_BSR 0x28
-#define FTSDMC020_OFFSET_ACR 0x34
-
-/*
- * Timing Parametet 0 Register
- */
-#define FTSDMC020_TP0_TCL(x) ((x) & 0x3)
-#define FTSDMC020_TP0_TWR(x) (((x) & 0x3) << 4)
-#define FTSDMC020_TP0_TRF(x) (((x) & 0xf) << 8)
-#define FTSDMC020_TP0_TRCD(x) (((x) & 0x7) << 12)
-#define FTSDMC020_TP0_TRP(x) (((x) & 0xf) << 16)
-#define FTSDMC020_TP0_TRAS(x) (((x) & 0xf) << 20)
-
-/*
- * Timing Parametet 1 Register
- */
-#define FTSDMC020_TP1_REF_INTV(x) ((x) & 0xffff)
-#define FTSDMC020_TP1_INI_REFT(x) (((x) & 0xf) << 16)
-#define FTSDMC020_TP1_INI_PREC(x) (((x) & 0xf) << 20)
-
-/*
- * Configuration Register
- */
-#define FTSDMC020_CR_SREF (1 << 0)
-#define FTSDMC020_CR_PWDN (1 << 1)
-#define FTSDMC020_CR_ISMR (1 << 2)
-#define FTSDMC020_CR_IREF (1 << 3)
-#define FTSDMC020_CR_IPREC (1 << 4)
-#define FTSDMC020_CR_REFTYPE (1 << 5)
-
-/*
- * SDRAM External Bank Base/Size Register
- */
-#define FTSDMC020_BANK_ENABLE (1 << 28)
-
-#define FTSDMC020_BANK_BASE(addr) (((addr) >> 20) << 16)
-
-#define FTSDMC020_BANK_DDW_X4 (0 << 12)
-#define FTSDMC020_BANK_DDW_X8 (1 << 12)
-#define FTSDMC020_BANK_DDW_X16 (2 << 12)
-#define FTSDMC020_BANK_DDW_X32 (3 << 12)
-
-#define FTSDMC020_BANK_DSZ_16M (0 << 8)
-#define FTSDMC020_BANK_DSZ_64M (1 << 8)
-#define FTSDMC020_BANK_DSZ_128M (2 << 8)
-#define FTSDMC020_BANK_DSZ_256M (3 << 8)
-
-#define FTSDMC020_BANK_MBW_8 (0 << 4)
-#define FTSDMC020_BANK_MBW_16 (1 << 4)
-#define FTSDMC020_BANK_MBW_32 (2 << 4)
-
-#define FTSDMC020_BANK_SIZE_1M 0x0
-#define FTSDMC020_BANK_SIZE_2M 0x1
-#define FTSDMC020_BANK_SIZE_4M 0x2
-#define FTSDMC020_BANK_SIZE_8M 0x3
-#define FTSDMC020_BANK_SIZE_16M 0x4
-#define FTSDMC020_BANK_SIZE_32M 0x5
-#define FTSDMC020_BANK_SIZE_64M 0x6
-#define FTSDMC020_BANK_SIZE_128M 0x7
-#define FTSDMC020_BANK_SIZE_256M 0x8
-
-/*
- * Arbiter Control Register
- */
-#define FTSDMC020_ACR_TOC(x) ((x) & 0x1f)
-#define FTSDMC020_ACR_TOE (1 << 8)
-
-#endif /* __FTSDMC020_H */
diff --git a/board/faraday/a320evb/lowlevel_init.S b/board/faraday/a320evb/lowlevel_init.S
index 97718c0..416e87c 100644
--- a/board/faraday/a320evb/lowlevel_init.S
+++ b/board/faraday/a320evb/lowlevel_init.S
@@ -21,7 +21,7 @@
#include <version.h>
#include <asm/macro.h>
-#include <asm/arch/ftsdmc020.h>
+#include "../../../drivers/misc/ftsdmc020.h"
/*
* parameters for the SDRAM controller
diff --git a/drivers/misc/ftsdmc020.h b/drivers/misc/ftsdmc020.h
new file mode 100644
index 0000000..0699772
--- /dev/null
+++ b/drivers/misc/ftsdmc020.h
@@ -0,0 +1,103 @@
+/*
+ * (C) Copyright 2009 Faraday Technology
+ * Po-Yu Chuang <ratbert@faraday-tech.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/*
+ * SDRAM Controller
+ */
+#ifndef __FTSDMC020_H
+#define __FTSDMC020_H
+
+#define FTSDMC020_OFFSET_TP0 0x00
+#define FTSDMC020_OFFSET_TP1 0x04
+#define FTSDMC020_OFFSET_CR 0x08
+#define FTSDMC020_OFFSET_BANK0_BSR 0x0C
+#define FTSDMC020_OFFSET_BANK1_BSR 0x10
+#define FTSDMC020_OFFSET_BANK2_BSR 0x14
+#define FTSDMC020_OFFSET_BANK3_BSR 0x18
+#define FTSDMC020_OFFSET_BANK4_BSR 0x1C
+#define FTSDMC020_OFFSET_BANK5_BSR 0x20
+#define FTSDMC020_OFFSET_BANK6_BSR 0x24
+#define FTSDMC020_OFFSET_BANK7_BSR 0x28
+#define FTSDMC020_OFFSET_ACR 0x34
+
+/*
+ * Timing Parametet 0 Register
+ */
+#define FTSDMC020_TP0_TCL(x) ((x) & 0x3)
+#define FTSDMC020_TP0_TWR(x) (((x) & 0x3) << 4)
+#define FTSDMC020_TP0_TRF(x) (((x) & 0xf) << 8)
+#define FTSDMC020_TP0_TRCD(x) (((x) & 0x7) << 12)
+#define FTSDMC020_TP0_TRP(x) (((x) & 0xf) << 16)
+#define FTSDMC020_TP0_TRAS(x) (((x) & 0xf) << 20)
+
+/*
+ * Timing Parametet 1 Register
+ */
+#define FTSDMC020_TP1_REF_INTV(x) ((x) & 0xffff)
+#define FTSDMC020_TP1_INI_REFT(x) (((x) & 0xf) << 16)
+#define FTSDMC020_TP1_INI_PREC(x) (((x) & 0xf) << 20)
+
+/*
+ * Configuration Register
+ */
+#define FTSDMC020_CR_SREF (1 << 0)
+#define FTSDMC020_CR_PWDN (1 << 1)
+#define FTSDMC020_CR_ISMR (1 << 2)
+#define FTSDMC020_CR_IREF (1 << 3)
+#define FTSDMC020_CR_IPREC (1 << 4)
+#define FTSDMC020_CR_REFTYPE (1 << 5)
+
+/*
+ * SDRAM External Bank Base/Size Register
+ */
+#define FTSDMC020_BANK_ENABLE (1 << 28)
+
+#define FTSDMC020_BANK_BASE(addr) (((addr) >> 20) << 16)
+
+#define FTSDMC020_BANK_DDW_X4 (0 << 12)
+#define FTSDMC020_BANK_DDW_X8 (1 << 12)
+#define FTSDMC020_BANK_DDW_X16 (2 << 12)
+#define FTSDMC020_BANK_DDW_X32 (3 << 12)
+
+#define FTSDMC020_BANK_DSZ_16M (0 << 8)
+#define FTSDMC020_BANK_DSZ_64M (1 << 8)
+#define FTSDMC020_BANK_DSZ_128M (2 << 8)
+#define FTSDMC020_BANK_DSZ_256M (3 << 8)
+
+#define FTSDMC020_BANK_MBW_8 (0 << 4)
+#define FTSDMC020_BANK_MBW_16 (1 << 4)
+#define FTSDMC020_BANK_MBW_32 (2 << 4)
+
+#define FTSDMC020_BANK_SIZE_1M 0x0
+#define FTSDMC020_BANK_SIZE_2M 0x1
+#define FTSDMC020_BANK_SIZE_4M 0x2
+#define FTSDMC020_BANK_SIZE_8M 0x3
+#define FTSDMC020_BANK_SIZE_16M 0x4
+#define FTSDMC020_BANK_SIZE_32M 0x5
+#define FTSDMC020_BANK_SIZE_64M 0x6
+#define FTSDMC020_BANK_SIZE_128M 0x7
+#define FTSDMC020_BANK_SIZE_256M 0x8
+
+/*
+ * Arbiter Control Register
+ */
+#define FTSDMC020_ACR_TOC(x) ((x) & 0x1f)
+#define FTSDMC020_ACR_TOE (1 << 8)
+
+#endif /* __FTSDMC020_H */
--
1.7.3.2
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 0/3] Share header files of Faraday controllers from a320 SoC.
@ 2010-11-15 10:35 macpaul at andestech.com
0 siblings, 0 replies; 6+ messages in thread
From: macpaul at andestech.com @ 2010-11-15 10:35 UTC (permalink / raw)
To: u-boot
> The following three device controller inside a320 SoC are Soft IP which are
> also used by other SoC products. Here we suggest to move those header files
> out from a320 SoC folder into drivers folder. This change should provide
> header file sharing with multiple SoC.
>
> Macpaul Lin (3):
> ftpmu010: move ftpmu010 power controller to drivers/power folder
> fttmr010: move fttmr010 controller to drivers/timer folder
> ftsdmc020: move ftsdmc020 sdram controller to driver/misc folder
Some of these hardware function blocks in a SoC also used by another SoC may have only header files in U-boot. Some of these header files were used only in assembly such as lowlevel_init.S. Some of these hardware drivers provide both C level functions and assembly definitions which could be organized as drivers or could be used directly as assembly commands.
However, if U-boot could access "drivers" folder as another "include PATH" just like "include" might be a good solution to avoid writing something like the following line.
#include "../../../../drivers/timer/fttmr010.h"
The other solution is to collect these kind of source codes into a specific folder in "include", such as "include/faraday". But I think this method cannot help people to recognize the difference class of the devices.
I'm not sure if add
CPPFLAGS += -I$(TOPDIR)/drivers
into "$(TOPDIR)/config.mk" is reasonable.
Just trying to give some suggestion.
Best regards,
Macpaul Lin
^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH 0/3] Share header files of Faraday controllers from a320 SoC.
@ 2010-10-28 12:39 macpaul at andestech.com
0 siblings, 0 replies; 6+ messages in thread
From: macpaul at andestech.com @ 2010-10-28 12:39 UTC (permalink / raw)
To: u-boot
[deleted]
> ----------------------------
> arch/arm/include/asm/arch-a320/ftsdmc020.h | 103 -------------------
> arch/arm/include/asm/arch-a320/fttmr010.h | 73 --------------
> board/faraday/a320evb/lowlevel_init.S | 2 +-
> create mode 100644 drivers/misc/ftsdmc020.h
> create mode 100644 drivers/power/ftpmu010.h
> create mode 100644 drivers/timer/fttmr010.h
>
> --
> 1.7.3.2
Sorry for forgetting to remove these duplicate stuffs in cover letter.
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2010-11-15 10:35 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-10-28 12:35 [U-Boot] [PATCH 0/3] Share header files of Faraday controllers from a320 SoC Macpaul Lin
2010-10-28 12:35 ` [U-Boot] [PATCH 1/3] ftpmu010: move ftpmu010 power controller to drivers/power folder Macpaul Lin
2010-10-28 12:36 ` [U-Boot] [PATCH 2/3] fttmr010: move fttmr010 controller to drivers/timer folder Macpaul Lin
2010-10-28 12:36 ` [U-Boot] [PATCH 3/3] ftsdmc020: move ftsdmc020 sdram controller to driver/misc folder Macpaul Lin
2010-10-28 12:39 [U-Boot] [PATCH 0/3] Share header files of Faraday controllers from a320 SoC macpaul at andestech.com
2010-11-15 10:35 macpaul at andestech.com
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