From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=47374 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PcUqC-0006yG-PM for qemu-devel@nongnu.org; Mon, 10 Jan 2011 22:24:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PcUqA-0005Xp-QM for qemu-devel@nongnu.org; Mon, 10 Jan 2011 22:24:12 -0500 Received: from b.mail.sonic.net ([64.142.19.5]:34704) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PcUqA-0005XI-In for qemu-devel@nongnu.org; Mon, 10 Jan 2011 22:24:10 -0500 From: Richard Henderson Date: Mon, 10 Jan 2011 19:23:43 -0800 Message-Id: <1294716228-9299-3-git-send-email-rth@twiddle.net> In-Reply-To: <1294716228-9299-1-git-send-email-rth@twiddle.net> References: <1294716228-9299-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH 2/7] tcg-ppc: Implement deposit operation. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: agraf@suse.de, aurelien@aurel32.net Signed-off-by: Richard Henderson --- tcg/ppc/tcg-target.c | 17 ++++++++++++++++- tcg/ppc/tcg-target.h | 1 + 2 files changed, 17 insertions(+), 1 deletions(-) diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index 7970268..39aa4f1 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -1611,6 +1611,21 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, } break; + case INDEX_op_deposit_i32: + { + unsigned len = args[4]; + unsigned lsb_ofs = args[3]; + unsigned msb_ofs = 31 - lsb_ofs; + + tcg_out32 (s, RLWIMI + | RA(args[0]) + | RS(args[2]) + | SH(lsb_ofs) + | MB(msb_ofs - len + 1) + | ME(msb_ofs)); + } + break; + case INDEX_op_add2_i32: if (args[0] == args[3] || args[0] == args[5]) { tcg_out32 (s, ADDC | TAB (0, args[2], args[4])); @@ -1829,9 +1844,9 @@ static const TCGTargetOpDef ppc_op_defs[] = { { INDEX_op_shl_i32, { "r", "r", "ri" } }, { INDEX_op_shr_i32, { "r", "r", "ri" } }, { INDEX_op_sar_i32, { "r", "r", "ri" } }, - { INDEX_op_rotl_i32, { "r", "r", "ri" } }, { INDEX_op_rotr_i32, { "r", "r", "ri" } }, + { INDEX_op_deposit_i32, { "r", "0", "r" } }, { INDEX_op_brcond_i32, { "r", "ri" } }, diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h index a1f8599..bbf38d5 100644 --- a/tcg/ppc/tcg-target.h +++ b/tcg/ppc/tcg-target.h @@ -92,6 +92,7 @@ enum { #define TCG_TARGET_HAS_eqv_i32 #define TCG_TARGET_HAS_nand_i32 #define TCG_TARGET_HAS_nor_i32 +#define TCG_TARGET_HAS_deposit_i32 #define TCG_AREG0 TCG_REG_R27 -- 1.7.2.3