From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=47641 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Phgi9-0001WN-VN for qemu-devel@nongnu.org; Tue, 25 Jan 2011 06:05:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Phgi8-0004ye-49 for qemu-devel@nongnu.org; Tue, 25 Jan 2011 06:05:21 -0500 Received: from hall.aurel32.net ([88.191.126.93]:43376) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Phgi7-0004yS-Vv for qemu-devel@nongnu.org; Tue, 25 Jan 2011 06:05:20 -0500 From: Aurelien Jarno Date: Tue, 25 Jan 2011 12:05:15 +0100 Message-Id: <1295953515-17818-2-git-send-email-aurelien@aurel32.net> In-Reply-To: <1295953515-17818-1-git-send-email-aurelien@aurel32.net> References: <1295953515-17818-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PATCH 2/2] mc146818rtc: update registers after a format change List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Aurelien Jarno For some unknown reason, the MIPS kernel briefly changes the RTC to binary mode during boot, switch back to BCD mode and read the time. As the registers are updated only every second, they may still be in the old format when they are read. This patch forces a register update immediately after a format change (BCD/binary or 12/24H). This avoid long fsck during boot due to time wrap. Signed-off-by: Aurelien Jarno --- hw/mc146818rtc.c | 10 +++++++++- 1 files changed, 9 insertions(+), 1 deletions(-) diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c index ec7c4ec..a1b0e31 100644 --- a/hw/mc146818rtc.c +++ b/hw/mc146818rtc.c @@ -247,7 +247,15 @@ static void cmos_ioport_write(void *opaque, uint32_t addr, uint32_t data) rtc_set_time(s); } } - s->cmos_data[RTC_REG_B] = data; + if (((s->cmos_data[RTC_REG_B] ^ data) & (REG_B_DM | REG_B_24H)) && + !(data & REG_B_SET)) { + /* If the time format has changed and not in set mode, + update the registers immediately. */ + s->cmos_data[RTC_REG_B] = data; + rtc_copy_date(s); + } else { + s->cmos_data[RTC_REG_B] = data; + } rtc_timer_update(s, qemu_get_clock(rtc_clock)); break; case RTC_REG_C: -- 1.7.2.3