* [PATCH v3 0/3] OMAP4: hwmod DSS support
@ 2011-01-27 11:17 Sumit Semwal
2011-01-27 11:17 ` [PATCH v3 1/3] OMAP2PLUS: DSS2: Add OMAP4 Kconfig support Sumit Semwal
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Sumit Semwal @ 2011-01-27 11:17 UTC (permalink / raw)
To: tomi.valkeinen, paul, khilman, hvaibhav, linux-omap, b-cousson
Cc: Sumit Semwal
This patch series enables support for OMAP4 DSS, and adds hwmod support
for dss, dispc, dsi1, dsi2, hdmi, rfbi and venc hwmods.
In OMAP4 there are severals IPs that can be reached by differents
interconnect paths depending of the access initiator (MPU vs. SDMA).
In the case of the DSS, both L3 direct path and L4 CFG path can be
used to access all the DSS IPs.
dss is also considered as an IP as dispc, rfbi, and named as dss_core.
TODO:
This patch doesn't handle the opt clocks via hwmod - there will be a separate
patch series which will take opt clock roles from hwmod, populate them in
the device structure, so that the driver can ask for relevant opt-clocks.
Also TBD is the migration to pm_runtime APIs, which need to be adapted a little
for handling DSS-family of clocks completely.
Changes from v2:
----------------
1. Corrected author name in patch 3/3.
2. Added some hwmod data in the database, missed during merge of a couple of patches.
Changes from v1:
----------------
- dss_dss device is renamed as dss_core as per suggestion from Benoit Cousson.
Patch Base:
===========
Patch-set rebased and tested w/ Zoom3 (OMAP3630) on top of:
url = git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
branch "master"
commit e8883f8057c0f7c9950fa9f20568f37bfa62f34a
Description: Add linux-next specific files for 20110115
+
Patch mentioned in http://www.mail-archive.com/linux-omap@vger.kernel.org/msg42384.html
[PATCH] OMAP: counter_32k: init clocksource as part of machine timer init
(This patch is required for OMAP bootup w/ 20110115 linux-next)
+
DSS hwmod patch series: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg42914.html
+
patch series: OMAP2PLUS: DSS: Generalize clock names
(http://www.mail-archive.com/linux-omap@vger.kernel.org/msg43058.html)
--------------------------------------------------------
Benoit Cousson (1):
OMAP4: hwmod data: add DSS DISPC DSI1,2 RFBI HDMI VENC
Mayuresh Janorkar (2):
OMAP2PLUS: DSS2: Add OMAP4 Kconfig support
OMAP4: DSS2: Add hwmod device names for OMAP4.
arch/arm/mach-omap2/display.c | 21 +-
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 603 ++++++++++++++++++++++++++++
drivers/video/omap2/dss/Kconfig | 6 +-
drivers/video/omap2/omapfb/Kconfig | 6 +-
4 files changed, 623 insertions(+), 13 deletions(-)
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v3 1/3] OMAP2PLUS: DSS2: Add OMAP4 Kconfig support
2011-01-27 11:17 [PATCH v3 0/3] OMAP4: hwmod DSS support Sumit Semwal
@ 2011-01-27 11:17 ` Sumit Semwal
2011-02-11 12:06 ` [v3,1/3] " Tomi Valkeinen
2011-01-27 11:17 ` [PATCH v3 2/3] OMAP4: hwmod data: add DSS DISPC DSI1,2 RFBI HDMI VENC Sumit Semwal
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Sumit Semwal @ 2011-01-27 11:17 UTC (permalink / raw)
To: tomi.valkeinen, paul, khilman, hvaibhav, linux-omap, b-cousson
Cc: Mayuresh Janorkar
From: Mayuresh Janorkar <mayur@ti.com>
Enable DSS2 and OMAPFB for OMAP4 in Kconfig
Signed-off-by: Mayuresh Janorkar <mayur@ti.com>
---
drivers/video/omap2/dss/Kconfig | 6 +++---
drivers/video/omap2/omapfb/Kconfig | 6 +++---
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/video/omap2/dss/Kconfig b/drivers/video/omap2/dss/Kconfig
index 43b6440..0d031b2 100644
--- a/drivers/video/omap2/dss/Kconfig
+++ b/drivers/video/omap2/dss/Kconfig
@@ -1,8 +1,8 @@
menuconfig OMAP2_DSS
- tristate "OMAP2/3 Display Subsystem support (EXPERIMENTAL)"
- depends on ARCH_OMAP2 || ARCH_OMAP3
+ tristate "OMAP2+ Display Subsystem support (EXPERIMENTAL)"
+ depends on ARCH_OMAP2PLUS
help
- OMAP2/3 Display Subsystem support.
+ OMAP2+ Display Subsystem support.
if OMAP2_DSS
diff --git a/drivers/video/omap2/omapfb/Kconfig b/drivers/video/omap2/omapfb/Kconfig
index 65149b2..1da712e 100644
--- a/drivers/video/omap2/omapfb/Kconfig
+++ b/drivers/video/omap2/omapfb/Kconfig
@@ -1,5 +1,5 @@
menuconfig FB_OMAP2
- tristate "OMAP2/3 frame buffer support (EXPERIMENTAL)"
+ tristate "OMAP2+ frame buffer support (EXPERIMENTAL)"
depends on FB && OMAP2_DSS
select OMAP2_VRAM
@@ -8,10 +8,10 @@ menuconfig FB_OMAP2
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
help
- Frame buffer driver for OMAP2/3 based boards.
+ Frame buffer driver for OMAP2+ based boards.
config FB_OMAP2_DEBUG_SUPPORT
- bool "Debug support for OMAP2/3 FB"
+ bool "Debug support for OMAP2+ FB"
default y
depends on FB_OMAP2
help
--
1.7.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v3 2/3] OMAP4: hwmod data: add DSS DISPC DSI1,2 RFBI HDMI VENC
2011-01-27 11:17 [PATCH v3 0/3] OMAP4: hwmod DSS support Sumit Semwal
2011-01-27 11:17 ` [PATCH v3 1/3] OMAP2PLUS: DSS2: Add OMAP4 Kconfig support Sumit Semwal
@ 2011-01-27 11:17 ` Sumit Semwal
2011-02-11 16:50 ` Cousson, Benoit
2011-01-27 11:17 ` [PATCH v3 3/3] OMAP4: DSS2: Add hwmod device names for OMAP4 Sumit Semwal
2011-02-11 12:23 ` [PATCH v3 0/3] OMAP4: hwmod DSS support Tomi Valkeinen
3 siblings, 1 reply; 9+ messages in thread
From: Sumit Semwal @ 2011-01-27 11:17 UTC (permalink / raw)
To: tomi.valkeinen, paul, khilman, hvaibhav, linux-omap, b-cousson
Cc: Mayuresh Janorkar, Senthilvadivu Guruswamy, Sumit Semwal
From: Benoit Cousson <b-cousson@ti.com>
Add dss, dispc, dsi1, dsi2, hdmi, rfbi and venc hwmods.
In OMAP4 there are severals IPs that can be reached by differents
interconnect paths depending of the access initiator (MPU vs. SDMA).
In the case of the DSS, both L3 direct path and L4 CFG path can be
used to access all the DSS IPs. The two ocp_ip already exists to support
the two address spaces.
+------------+-- L3_MAIN --+ MPU
IP | |
+-- L4_CFG --+
L3 main address range is specified first, since it is used by default.
dss is also considered as an IP as dispc, rfbi, and named as dss_core.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Mayuresh Janorkar <mayur@ti.com>
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
---
arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 603 ++++++++++++++++++++++++++++
1 files changed, 603 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index c2806bd..0bd579e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -43,6 +43,13 @@
static struct omap_hwmod omap44xx_dma_system_hwmod;
static struct omap_hwmod omap44xx_dmm_hwmod;
static struct omap_hwmod omap44xx_dsp_hwmod;
+static struct omap_hwmod omap44xx_dss_core_hwmod;
+static struct omap_hwmod omap44xx_dss_dispc_hwmod;
+static struct omap_hwmod omap44xx_dss_dsi1_hwmod;
+static struct omap_hwmod omap44xx_dss_dsi2_hwmod;
+static struct omap_hwmod omap44xx_dss_hdmi_hwmod;
+static struct omap_hwmod omap44xx_dss_rfbi_hwmod;
+static struct omap_hwmod omap44xx_dss_venc_hwmod;
static struct omap_hwmod omap44xx_emif_fw_hwmod;
static struct omap_hwmod omap44xx_iva_hwmod;
static struct omap_hwmod omap44xx_l3_instr_hwmod;
@@ -237,12 +244,21 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
+/* dss -> l3_main_1 */
+static struct omap_hwmod_ocp_if omap44xx_dss__l3_main_1 = {
+ .master = &omap44xx_dss_core_hwmod,
+ .slave = &omap44xx_l3_main_1_hwmod,
+ .clk = "l3_div_ck",
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
/* l3_main_1 slave ports */
static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
&omap44xx_dsp__l3_main_1,
&omap44xx_l3_main_2__l3_main_1,
&omap44xx_l4_cfg__l3_main_1,
&omap44xx_mpu__l3_main_1,
+ &omap44xx_dss__l3_main_1,
};
static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
@@ -746,6 +762,584 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
};
+/* ==== DSS related classes ==== */
+ /*
+ * 'dispc' class
+ * display controller
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_dispc_sysc = {
+ .rev_offs = 0x0000,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_MIDLEMODE |
+ SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
+ SYSS_HAS_RESET_STATUS),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
+ MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_dispc_hwmod_class = {
+ .name = "dispc",
+ .sysc = &omap44xx_dispc_sysc,
+};
+
+/* dss_dispc */
+static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = {
+ { .irq = 25 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = {
+ { .dma_req = 5 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = {
+ {
+ .pa_start = 0x48041000,
+ .pa_end = 0x48041fff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> dss_dispc */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_dss_dispc_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_dss_dispc_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = {
+ {
+ .pa_start = 0x58001000,
+ .pa_end = 0x58001fff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l3_main_2 -> dss_dispc */
+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = {
+ .master = &omap44xx_l3_main_2_hwmod,
+ .slave = &omap44xx_dss_dispc_hwmod,
+ .clk = "l3_div_ck",
+ .addr = omap44xx_dss_dispc_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* dss_dispc slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
+ &omap44xx_l3_main_2__dss_dispc,
+ &omap44xx_l4_per__dss_dispc,
+};
+
+static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
+ .name = "dss_dispc",
+ .class = &omap44xx_dispc_hwmod_class,
+ .mpu_irqs = omap44xx_dss_dispc_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_irqs),
+ .sdma_reqs = omap44xx_dss_dispc_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs),
+ .main_clk = "dss_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_dss_dispc_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/*
+ * 'dsi' class
+ * display serial interface controller
+ */
+static struct omap_hwmod_class_sysconfig omap44xx_dsi_sysc = {
+ .rev_offs = 0x0000,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
+ SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_dsi_hwmod_class = {
+ .name = "dsi",
+ .sysc = &omap44xx_dsi_sysc,
+};
+
+/* dss_dsi1 */
+static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = {
+ { .irq = 53 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = {
+ { .dma_req = 74 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = {
+ {
+ .pa_start = 0x48044000,
+ .pa_end = 0x480440ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> dss_dsi1 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_dss_dsi1_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_dss_dsi1_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = {
+ {
+ .pa_start = 0x58004000,
+ .pa_end = 0x580040ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l3_main_2 -> dss_dsi1 */
+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = {
+ .master = &omap44xx_l3_main_2_hwmod,
+ .slave = &omap44xx_dss_dsi1_hwmod,
+ .clk = "l3_div_ck",
+ .addr = omap44xx_dss_dsi1_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* dss_dsi1 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = {
+ &omap44xx_l3_main_2__dss_dsi1,
+ &omap44xx_l4_per__dss_dsi1,
+};
+
+static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
+ .name = "dss_dsi1",
+ .class = &omap44xx_dsi_hwmod_class,
+ .mpu_irqs = omap44xx_dss_dsi1_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs),
+ .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs),
+ .main_clk = "dss_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_dss_dsi1_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/* dss_dsi2 */
+static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = {
+ { .irq = 84 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = {
+ { .dma_req = 83 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = {
+ {
+ .pa_start = 0x48045000,
+ .pa_end = 0x480450ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> dss_dsi2 */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_dss_dsi2_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_dss_dsi2_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = {
+ {
+ .pa_start = 0x58005000,
+ .pa_end = 0x580050ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l3_main_2 -> dss_dsi2 */
+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = {
+ .master = &omap44xx_l3_main_2_hwmod,
+ .slave = &omap44xx_dss_dsi2_hwmod,
+ .clk = "l3_div_ck",
+ .addr = omap44xx_dss_dsi2_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* dss_dsi2 slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = {
+ &omap44xx_l3_main_2__dss_dsi2,
+ &omap44xx_l4_per__dss_dsi2,
+};
+
+static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
+ .name = "dss_dsi2",
+ .class = &omap44xx_dsi_hwmod_class,
+ .mpu_irqs = omap44xx_dss_dsi2_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_irqs),
+ .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs),
+ .main_clk = "dss_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_dss_dsi2_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/*
+ * 'dss' class
+ * display sub-system
+ */
+static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = {
+ .rev_offs = 0x0000,
+ .syss_offs = 0x0014,
+ .sysc_flags = SYSS_HAS_RESET_STATUS,
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+};
+
+static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
+ .name = "dss",
+ .sysc = &omap44xx_dss_sysc,
+};
+
+/* dss */
+/* dss master ports */
+static struct omap_hwmod_ocp_if *omap44xx_dss_masters[] = {
+ &omap44xx_dss__l3_main_1,
+};
+
+static struct omap_hwmod_irq_info omap44xx_dss_irqs[] = {
+ { .irq = 25 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = {
+ {
+ .pa_start = 0x48040000,
+ .pa_end = 0x4804007f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> dss */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_dss_core_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_dss_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = {
+ {
+ .pa_start = 0x58000000,
+ .pa_end = 0x5800007f,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l3_main_2 -> dss */
+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = {
+ .master = &omap44xx_l3_main_2_hwmod,
+ .slave = &omap44xx_dss_core_hwmod,
+ .clk = "l3_div_ck",
+ .addr = omap44xx_dss_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* dss slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = {
+ &omap44xx_l3_main_2__dss,
+ &omap44xx_l4_per__dss,
+};
+
+static struct omap_hwmod_opt_clk dss_opt_clks[] = {
+ { .role = "sys_clk", .clk = "dss_sys_clk" },
+ { .role = "tv_clk", .clk = "dss_tv_clk" },
+ { .role = "dss_clk", .clk = "dss_dss_clk" },
+ { .role = "video_clk", .clk = "dss_48mhz_clk" },
+};
+
+static struct omap_hwmod omap44xx_dss_core_hwmod = {
+ .name = "dss_core",
+ .class = &omap44xx_dss_hwmod_class,
+ .mpu_irqs = omap44xx_dss_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_irqs),
+ .main_clk = "dss_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
+ },
+ },
+ .opt_clks = dss_opt_clks,
+ .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
+ .slaves = omap44xx_dss_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_dss_slaves),
+ .masters = omap44xx_dss_masters,
+ .masters_cnt = ARRAY_SIZE(omap44xx_dss_masters),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/*
+ * 'hdmi' class
+ * hdmi controller
+ */
+
+static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = {
+ .name = "hdmi",
+};
+
+/* dss_hdmi */
+static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = {
+ { .irq = 101 + OMAP44XX_IRQ_GIC_START },
+};
+
+static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = {
+ { .dma_req = 75 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = {
+ {
+ .pa_start = 0x48046000,
+ .pa_end = 0x48046fff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> dss_hdmi */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_dss_hdmi_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_dss_hdmi_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = {
+ {
+ .pa_start = 0x58006000,
+ .pa_end = 0x58006fff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l3_main_2 -> dss_hdmi */
+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = {
+ .master = &omap44xx_l3_main_2_hwmod,
+ .slave = &omap44xx_dss_hdmi_hwmod,
+ .clk = "l3_div_ck",
+ .addr = omap44xx_dss_hdmi_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* dss_hdmi slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = {
+ &omap44xx_l3_main_2__dss_hdmi,
+ &omap44xx_l4_per__dss_hdmi,
+};
+
+static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
+ .name = "dss_hdmi",
+ .class = &omap44xx_hdmi_hwmod_class,
+ .mpu_irqs = omap44xx_dss_hdmi_irqs,
+ .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_irqs),
+ .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs),
+ .main_clk = "dss_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_dss_hdmi_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+ /*
+ * 'rfbi' class
+ * remote frame buffer interface
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_rfbi_sysc = {
+ .rev_offs = 0x0000,
+ .sysc_offs = 0x0010,
+ .syss_offs = 0x0014,
+ .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
+ SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+ .sysc_fields = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap44xx_rfbi_hwmod_class = {
+ .name = "rfbi",
+ .sysc = &omap44xx_rfbi_sysc,
+};
+
+/* dss_rfbi */
+static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = {
+ { .dma_req = 13 + OMAP44XX_DMA_REQ_START },
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = {
+ {
+ .pa_start = 0x48042000,
+ .pa_end = 0x480420ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> dss_rfbi */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_dss_rfbi_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_dss_rfbi_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = {
+ {
+ .pa_start = 0x58002000,
+ .pa_end = 0x580020ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l3_main_2 -> dss_rfbi */
+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = {
+ .master = &omap44xx_l3_main_2_hwmod,
+ .slave = &omap44xx_dss_rfbi_hwmod,
+ .clk = "l3_div_ck",
+ .addr = omap44xx_dss_rfbi_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* dss_rfbi slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = {
+ &omap44xx_l3_main_2__dss_rfbi,
+ &omap44xx_l4_per__dss_rfbi,
+};
+
+static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
+ .name = "dss_rfbi",
+ .class = &omap44xx_rfbi_hwmod_class,
+ .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs,
+ .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_sdma_reqs),
+ .main_clk = "dss_fck",
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_dss_rfbi_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+/*
+ * 'venc' class
+ * video encoder
+ */
+
+static struct omap_hwmod_class_sysconfig omap44xx_venc_sysc = {
+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+};
+
+static struct omap_hwmod_class omap44xx_venc_hwmod_class = {
+ .name = "venc",
+ .sysc = &omap44xx_venc_sysc,
+};
+
+/* dss_venc */
+static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = {
+ {
+ .pa_start = 0x48043000,
+ .pa_end = 0x480430ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l4_per -> dss_venc */
+static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = {
+ .master = &omap44xx_l4_per_hwmod,
+ .slave = &omap44xx_dss_venc_hwmod,
+ .clk = "l4_div_ck",
+ .addr = omap44xx_dss_venc_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_addrs),
+ .user = OCP_USER_MPU,
+};
+
+static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = {
+ {
+ .pa_start = 0x58003000,
+ .pa_end = 0x580030ff,
+ .flags = ADDR_TYPE_RT
+ },
+};
+
+/* l3_main_2 -> dss_venc */
+static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = {
+ .master = &omap44xx_l3_main_2_hwmod,
+ .slave = &omap44xx_dss_venc_hwmod,
+ .clk = "l3_div_ck",
+ .addr = omap44xx_dss_venc_dma_addrs,
+ .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_dma_addrs),
+ .user = OCP_USER_SDMA,
+};
+
+/* dss_venc slave ports */
+static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = {
+ &omap44xx_l3_main_2__dss_venc,
+ &omap44xx_l4_per__dss_venc,
+};
+
+static struct omap_hwmod omap44xx_dss_venc_hwmod = {
+ .name = "dss_venc",
+ .class = &omap44xx_venc_hwmod_class,
+ .prcm = {
+ .omap4 = {
+ .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
+ },
+ },
+ .slaves = omap44xx_dss_venc_slaves,
+ .slaves_cnt = ARRAY_SIZE(omap44xx_dss_venc_slaves),
+ .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
+};
+
+
/*
* 'gpio' class
* general purpose io module
@@ -2031,6 +2625,15 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
&omap44xx_dsp_hwmod,
&omap44xx_dsp_c0_hwmod,
+ /* dss class */
+ &omap44xx_dss_core_hwmod,
+ &omap44xx_dss_dispc_hwmod,
+ &omap44xx_dss_dsi1_hwmod,
+ &omap44xx_dss_dsi2_hwmod,
+ &omap44xx_dss_hdmi_hwmod,
+ &omap44xx_dss_rfbi_hwmod,
+ &omap44xx_dss_venc_hwmod,
+
/* gpio class */
&omap44xx_gpio1_hwmod,
&omap44xx_gpio2_hwmod,
--
1.7.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v3 3/3] OMAP4: DSS2: Add hwmod device names for OMAP4.
2011-01-27 11:17 [PATCH v3 0/3] OMAP4: hwmod DSS support Sumit Semwal
2011-01-27 11:17 ` [PATCH v3 1/3] OMAP2PLUS: DSS2: Add OMAP4 Kconfig support Sumit Semwal
2011-01-27 11:17 ` [PATCH v3 2/3] OMAP4: hwmod data: add DSS DISPC DSI1,2 RFBI HDMI VENC Sumit Semwal
@ 2011-01-27 11:17 ` Sumit Semwal
2011-02-11 12:23 ` [PATCH v3 0/3] OMAP4: hwmod DSS support Tomi Valkeinen
3 siblings, 0 replies; 9+ messages in thread
From: Sumit Semwal @ 2011-01-27 11:17 UTC (permalink / raw)
To: tomi.valkeinen, paul, khilman, hvaibhav, linux-omap, b-cousson
Cc: Mayuresh Janorkar, Sumit Semwal
From: Mayuresh Janorkar <mayur@ti.com>
Add hwmod device names for OMAP4; this enables device build for omap4 dss
hwmod IPs.
Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Mayuresh Janorkar <mayur@ti.com>
---
arch/arm/mach-omap2/display.c | 21 ++++++++++++++-------
1 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 5c0a78b..cc7b4f3 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -53,20 +53,27 @@ int __init omap_display_init(struct omap_dss_board_info
/*
* omap: valid DSS hwmod names
- * omap2,3: dss_core, dss_dispc, dss_rfbi, dss_venc
- * omap3: dss_dsi1
+ * omap2,3,4: dss_core, dss_dispc, dss_rfbi, dss_venc
+ * omap3,4: dss_dsi1
+ * omap4: dss_dsi2, dss_hdmi
*/
- char *oh_name[] = {"dss_core", "dss_dispc", "dss_rfbi", "dss_venc", "dss_dsi1"};
- char *dev_name[] = { "omap_dss", "omap_dispc", "omap_rfbi", "omap_venc", "omap_dsi1" };
+ char *oh_name[] = {"dss_core", "dss_dispc", "dss_rfbi", "dss_venc", "dss_dsi1",
+ "dss_dsi2", "dss_hdmi"};
+ char *dev_name[] = {"omap_dss", "omap_dispc", "omap_rfbi", "omap_venc", "omap_dsi1",
+ "omap_dsi2", "omap_hdmi"};
int oh_count;
memset(&pdata, 0, sizeof(pdata));
if (cpu_is_omap24xx())
- oh_count = ARRAY_SIZE(oh_name) - 1;
- /* last hwmod dev in oh_name is not available for omap2 */
- else
+ oh_count = ARRAY_SIZE(oh_name) - 3;
+ /* last 3 hwmod dev in oh_name are not available for omap2 */
+ else if (cpu_is_omap44xx())
oh_count = ARRAY_SIZE(oh_name);
+ else
+ oh_count = ARRAY_SIZE(oh_name) - 2;
+ /* last 2 hwmod dev in oh_name are not available for omap3 */
+
pdata.board_data = board_data;
pdata.board_data->get_last_off_on_transaction_id = NULL;
--
1.7.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [v3,1/3] OMAP2PLUS: DSS2: Add OMAP4 Kconfig support
2011-01-27 11:17 ` [PATCH v3 1/3] OMAP2PLUS: DSS2: Add OMAP4 Kconfig support Sumit Semwal
@ 2011-02-11 12:06 ` Tomi Valkeinen
2011-02-16 4:56 ` Semwal, Sumit
0 siblings, 1 reply; 9+ messages in thread
From: Tomi Valkeinen @ 2011-02-11 12:06 UTC (permalink / raw)
To: Sumit Semwal
Cc: tomi.valkeinen, paul, khilman, hvaibhav, linux-omap, b-cousson,
Mayuresh Janorkar
Hi,
On Thu, 2011-01-27 at 11:17 +0000, Sumit Semwal wrote:
> From: Mayuresh Janorkar <mayur@ti.com>
>
> Enable DSS2 and OMAPFB for OMAP4 in Kconfig
The indentation in this patch seems to be a bit inconsistent with the
current Kconfigs. For example, you use two tabs in the help lines, and
the current files use either one tab and 2 spaces, or 10 spaces.
Please stick to the current indentation, or change the indentation for
the whole file in a separate patch.
Tomi
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 0/3] OMAP4: hwmod DSS support
2011-01-27 11:17 [PATCH v3 0/3] OMAP4: hwmod DSS support Sumit Semwal
` (2 preceding siblings ...)
2011-01-27 11:17 ` [PATCH v3 3/3] OMAP4: DSS2: Add hwmod device names for OMAP4 Sumit Semwal
@ 2011-02-11 12:23 ` Tomi Valkeinen
3 siblings, 0 replies; 9+ messages in thread
From: Tomi Valkeinen @ 2011-02-11 12:23 UTC (permalink / raw)
To: ext Sumit Semwal
Cc: tomi.valkeinen, paul, khilman, hvaibhav, linux-omap, b-cousson
Hi,
I can't really comment on the HWMOD parts, but beside the Kconfig
indentation comments this patch set looks good to me.
Tomi
On Thu, 2011-01-27 at 16:47 +0530, ext Sumit Semwal wrote:
> This patch series enables support for OMAP4 DSS, and adds hwmod support
> for dss, dispc, dsi1, dsi2, hdmi, rfbi and venc hwmods.
>
> In OMAP4 there are severals IPs that can be reached by differents
> interconnect paths depending of the access initiator (MPU vs. SDMA).
>
> In the case of the DSS, both L3 direct path and L4 CFG path can be
> used to access all the DSS IPs.
> dss is also considered as an IP as dispc, rfbi, and named as dss_core.
>
> TODO:
> This patch doesn't handle the opt clocks via hwmod - there will be a separate
> patch series which will take opt clock roles from hwmod, populate them in
> the device structure, so that the driver can ask for relevant opt-clocks.
>
> Also TBD is the migration to pm_runtime APIs, which need to be adapted a little
> for handling DSS-family of clocks completely.
>
> Changes from v2:
> ----------------
> 1. Corrected author name in patch 3/3.
> 2. Added some hwmod data in the database, missed during merge of a couple of patches.
>
> Changes from v1:
> ----------------
> - dss_dss device is renamed as dss_core as per suggestion from Benoit Cousson.
>
> Patch Base:
> ===========
> Patch-set rebased and tested w/ Zoom3 (OMAP3630) on top of:
> url = git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
> branch "master"
> commit e8883f8057c0f7c9950fa9f20568f37bfa62f34a
> Description: Add linux-next specific files for 20110115
> +
> Patch mentioned in http://www.mail-archive.com/linux-omap@vger.kernel.org/msg42384.html
> [PATCH] OMAP: counter_32k: init clocksource as part of machine timer init
> (This patch is required for OMAP bootup w/ 20110115 linux-next)
> +
> DSS hwmod patch series: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg42914.html
> +
> patch series: OMAP2PLUS: DSS: Generalize clock names
> (http://www.mail-archive.com/linux-omap@vger.kernel.org/msg43058.html)
> --------------------------------------------------------
>
> Benoit Cousson (1):
> OMAP4: hwmod data: add DSS DISPC DSI1,2 RFBI HDMI VENC
>
> Mayuresh Janorkar (2):
> OMAP2PLUS: DSS2: Add OMAP4 Kconfig support
> OMAP4: DSS2: Add hwmod device names for OMAP4.
>
> arch/arm/mach-omap2/display.c | 21 +-
> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 603 ++++++++++++++++++++++++++++
> drivers/video/omap2/dss/Kconfig | 6 +-
> drivers/video/omap2/omapfb/Kconfig | 6 +-
> 4 files changed, 623 insertions(+), 13 deletions(-)
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 2/3] OMAP4: hwmod data: add DSS DISPC DSI1,2 RFBI HDMI VENC
2011-01-27 11:17 ` [PATCH v3 2/3] OMAP4: hwmod data: add DSS DISPC DSI1,2 RFBI HDMI VENC Sumit Semwal
@ 2011-02-11 16:50 ` Cousson, Benoit
2011-02-14 18:52 ` Semwal, Sumit
0 siblings, 1 reply; 9+ messages in thread
From: Cousson, Benoit @ 2011-02-11 16:50 UTC (permalink / raw)
To: Semwal, Sumit
Cc: tomi.valkeinen, paul, Hilman, Kevin, Hiremath, Vaibhav,
linux-omap, Janorkar, Mayuresh, Guruswamy, Senthilvadivu
Hi Sumit,
While I was trying to merge that patch for 2.6.39, I found some changes
that I didn't expected. I will take care of cleaning this patch, but I'd
to get the rational first.
All the other comments are purely cosmetic.
On 1/27/2011 12:17 PM, Semwal, Sumit wrote:
> From: Benoit Cousson<b-cousson@ti.com>
>
> Add dss, dispc, dsi1, dsi2, hdmi, rfbi and venc hwmods.
> In OMAP4 there are severals IPs that can be reached by differents
> interconnect paths depending of the access initiator (MPU vs. SDMA).
> In the case of the DSS, both L3 direct path and L4 CFG path can be
> used to access all the DSS IPs. The two ocp_ip already exists to support
> the two address spaces.
>
> +------------+-- L3_MAIN --+ MPU
> IP | |
> +-- L4_CFG --+
>
> L3 main address range is specified first, since it is used by default.
> dss is also considered as an IP as dispc, rfbi, and named as dss_core.
>
> Signed-off-by: Benoit Cousson<b-cousson@ti.com>
> Signed-off-by: Mayuresh Janorkar<mayur@ti.com>
> Signed-off-by: Senthilvadivu Guruswamy<svadivu@ti.com>
> Signed-off-by: Sumit Semwal<sumit.semwal@ti.com>
> ---
> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 603 ++++++++++++++++++++++++++++
> 1 files changed, 603 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> index c2806bd..0bd579e 100644
> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
> @@ -43,6 +43,13 @@
> static struct omap_hwmod omap44xx_dma_system_hwmod;
> static struct omap_hwmod omap44xx_dmm_hwmod;
> static struct omap_hwmod omap44xx_dsp_hwmod;
> +static struct omap_hwmod omap44xx_dss_core_hwmod;
> +static struct omap_hwmod omap44xx_dss_dispc_hwmod;
> +static struct omap_hwmod omap44xx_dss_dsi1_hwmod;
> +static struct omap_hwmod omap44xx_dss_dsi2_hwmod;
> +static struct omap_hwmod omap44xx_dss_hdmi_hwmod;
> +static struct omap_hwmod omap44xx_dss_rfbi_hwmod;
> +static struct omap_hwmod omap44xx_dss_venc_hwmod;
> static struct omap_hwmod omap44xx_emif_fw_hwmod;
> static struct omap_hwmod omap44xx_iva_hwmod;
> static struct omap_hwmod omap44xx_l3_instr_hwmod;
> @@ -237,12 +244,21 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
> .user = OCP_USER_MPU | OCP_USER_SDMA,
> };
>
> +/* dss -> l3_main_1 */
> +static struct omap_hwmod_ocp_if omap44xx_dss__l3_main_1 = {
> + .master =&omap44xx_dss_core_hwmod,
> + .slave =&omap44xx_l3_main_1_hwmod,
> + .clk = "l3_div_ck",
> + .user = OCP_USER_MPU | OCP_USER_SDMA,
> +};
> +
> /* l3_main_1 slave ports */
> static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
> &omap44xx_dsp__l3_main_1,
> &omap44xx_l3_main_2__l3_main_1,
> &omap44xx_l4_cfg__l3_main_1,
> &omap44xx_mpu__l3_main_1,
> +&omap44xx_dss__l3_main_1,
> };
>
> static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
> @@ -746,6 +762,584 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
> .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> };
>
> +/* ==== DSS related classes ==== */
That line should not be removed.
> + /*
> + * 'dispc' class
> + * display controller
> + */
> +
> +static struct omap_hwmod_class_sysconfig omap44xx_dispc_sysc = {
> + .rev_offs = 0x0000,
> + .sysc_offs = 0x0010,
> + .syss_offs = 0x0014,
> + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
> + SYSC_HAS_ENAWAKEUP | SYSC_HAS_MIDLEMODE |
> + SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
> + SYSS_HAS_RESET_STATUS),
> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
> + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
> + .sysc_fields =&omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap44xx_dispc_hwmod_class = {
> + .name = "dispc",
> + .sysc =&omap44xx_dispc_sysc,
> +};
> +
> +/* dss_dispc */
> +static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = {
> + { .irq = 25 + OMAP44XX_IRQ_GIC_START },
> +};
> +
> +static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = {
> + { .dma_req = 5 + OMAP44XX_DMA_REQ_START },
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = {
> + {
> + .pa_start = 0x48041000,
> + .pa_end = 0x48041fff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l4_per -> dss_dispc */
> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {
> + .master =&omap44xx_l4_per_hwmod,
> + .slave =&omap44xx_dss_dispc_hwmod,
> + .clk = "l4_div_ck",
> + .addr = omap44xx_dss_dispc_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_addrs),
> + .user = OCP_USER_MPU,
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = {
> + {
> + .pa_start = 0x58001000,
> + .pa_end = 0x58001fff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
The L3 mapping should be before the L4 one. This is the same for the
other hwmods. Please note that this is just to be in sync with the
generated code, it does not have any impact on the functionality.
> +
> +/* l3_main_2 -> dss_dispc */
> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = {
> + .master =&omap44xx_l3_main_2_hwmod,
> + .slave =&omap44xx_dss_dispc_hwmod,
> + .clk = "l3_div_ck",
> + .addr = omap44xx_dss_dispc_dma_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_dma_addrs),
> + .user = OCP_USER_SDMA,
> +};
> +
> +/* dss_dispc slave ports */
> +static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
> +&omap44xx_l3_main_2__dss_dispc,
> +&omap44xx_l4_per__dss_dispc,
> +};
> +
> +static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
> + .name = "dss_dispc",
> + .class =&omap44xx_dispc_hwmod_class,
> + .mpu_irqs = omap44xx_dss_dispc_irqs,
> + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_irqs),
> + .sdma_reqs = omap44xx_dss_dispc_sdma_reqs,
> + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs),
> + .main_clk = "dss_fck",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
> + },
> + },
> + .slaves = omap44xx_dss_dispc_slaves,
> + .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> +};
> +
> +/*
> + * 'dsi' class
> + * display serial interface controller
> + */
> +static struct omap_hwmod_class_sysconfig omap44xx_dsi_sysc = {
> + .rev_offs = 0x0000,
> + .sysc_offs = 0x0010,
> + .syss_offs = 0x0014,
> + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
> + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
> + SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> + .sysc_fields =&omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap44xx_dsi_hwmod_class = {
> + .name = "dsi",
> + .sysc =&omap44xx_dsi_sysc,
> +};
> +
> +/* dss_dsi1 */
> +static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = {
> + { .irq = 53 + OMAP44XX_IRQ_GIC_START },
> +};
> +
> +static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = {
> + { .dma_req = 74 + OMAP44XX_DMA_REQ_START },
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = {
> + {
> + .pa_start = 0x48044000,
> + .pa_end = 0x480440ff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l4_per -> dss_dsi1 */
> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = {
> + .master =&omap44xx_l4_per_hwmod,
> + .slave =&omap44xx_dss_dsi1_hwmod,
> + .clk = "l4_div_ck",
> + .addr = omap44xx_dss_dsi1_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_addrs),
> + .user = OCP_USER_MPU,
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = {
> + {
> + .pa_start = 0x58004000,
> + .pa_end = 0x580040ff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l3_main_2 -> dss_dsi1 */
> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = {
> + .master =&omap44xx_l3_main_2_hwmod,
> + .slave =&omap44xx_dss_dsi1_hwmod,
> + .clk = "l3_div_ck",
> + .addr = omap44xx_dss_dsi1_dma_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_dma_addrs),
> + .user = OCP_USER_SDMA,
> +};
> +
> +/* dss_dsi1 slave ports */
> +static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = {
> +&omap44xx_l3_main_2__dss_dsi1,
> +&omap44xx_l4_per__dss_dsi1,
> +};
> +
> +static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
> + .name = "dss_dsi1",
> + .class =&omap44xx_dsi_hwmod_class,
> + .mpu_irqs = omap44xx_dss_dsi1_irqs,
> + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs),
> + .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs,
> + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs),
> + .main_clk = "dss_fck",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
> + },
> + },
> + .slaves = omap44xx_dss_dsi1_slaves,
> + .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves),
> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> +};
> +
> +/* dss_dsi2 */
> +static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = {
> + { .irq = 84 + OMAP44XX_IRQ_GIC_START },
> +};
> +
> +static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = {
> + { .dma_req = 83 + OMAP44XX_DMA_REQ_START },
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = {
> + {
> + .pa_start = 0x48045000,
> + .pa_end = 0x480450ff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l4_per -> dss_dsi2 */
> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = {
> + .master =&omap44xx_l4_per_hwmod,
> + .slave =&omap44xx_dss_dsi2_hwmod,
> + .clk = "l4_div_ck",
> + .addr = omap44xx_dss_dsi2_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_addrs),
> + .user = OCP_USER_MPU,
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = {
> + {
> + .pa_start = 0x58005000,
> + .pa_end = 0x580050ff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l3_main_2 -> dss_dsi2 */
> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = {
> + .master =&omap44xx_l3_main_2_hwmod,
> + .slave =&omap44xx_dss_dsi2_hwmod,
> + .clk = "l3_div_ck",
> + .addr = omap44xx_dss_dsi2_dma_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_dma_addrs),
> + .user = OCP_USER_SDMA,
> +};
> +
> +/* dss_dsi2 slave ports */
> +static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = {
> +&omap44xx_l3_main_2__dss_dsi2,
> +&omap44xx_l4_per__dss_dsi2,
> +};
> +
> +static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
> + .name = "dss_dsi2",
> + .class =&omap44xx_dsi_hwmod_class,
> + .mpu_irqs = omap44xx_dss_dsi2_irqs,
> + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_irqs),
> + .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs,
> + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs),
> + .main_clk = "dss_fck",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
> + },
> + },
> + .slaves = omap44xx_dss_dsi2_slaves,
> + .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves),
> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> +};
> +
> +/*
> + * 'dss' class
> + * display sub-system
> + */
> +static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = {
> + .rev_offs = 0x0000,
> + .syss_offs = 0x0014,
> + .sysc_flags = SYSS_HAS_RESET_STATUS,
> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
There is a read-only SYSCONFIG in DSS, so it is not usable at all to
change the idlemode.
The attribute should be empty.
> +};
> +
> +static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
> + .name = "dss",
> + .sysc =&omap44xx_dss_sysc,
> +};
> +
> +/* dss */
> +/* dss master ports */
> +static struct omap_hwmod_ocp_if *omap44xx_dss_masters[] = {
> +&omap44xx_dss__l3_main_1,
> +};
> +
> +static struct omap_hwmod_irq_info omap44xx_dss_irqs[] = {
> + { .irq = 25 + OMAP44XX_IRQ_GIC_START },
Why did you map that irq to the dss_core? It is already mapped to dispc.
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = {
> + {
> + .pa_start = 0x48040000,
> + .pa_end = 0x4804007f,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l4_per -> dss */
> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = {
> + .master =&omap44xx_l4_per_hwmod,
> + .slave =&omap44xx_dss_core_hwmod,
> + .clk = "l4_div_ck",
> + .addr = omap44xx_dss_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_addrs),
> + .user = OCP_USER_MPU,
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = {
> + {
> + .pa_start = 0x58000000,
> + .pa_end = 0x5800007f,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l3_main_2 -> dss */
> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = {
> + .master =&omap44xx_l3_main_2_hwmod,
> + .slave =&omap44xx_dss_core_hwmod,
> + .clk = "l3_div_ck",
> + .addr = omap44xx_dss_dma_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dma_addrs),
> + .user = OCP_USER_SDMA,
> +};
> +
> +/* dss slave ports */
> +static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = {
> +&omap44xx_l3_main_2__dss,
> +&omap44xx_l4_per__dss,
> +};
> +
> +static struct omap_hwmod_opt_clk dss_opt_clks[] = {
> + { .role = "sys_clk", .clk = "dss_sys_clk" },
> + { .role = "tv_clk", .clk = "dss_tv_clk" },
> + { .role = "dss_clk", .clk = "dss_dss_clk" },
> + { .role = "video_clk", .clk = "dss_48mhz_clk" },
> +};
> +
> +static struct omap_hwmod omap44xx_dss_core_hwmod = {
> + .name = "dss_core",
> + .class =&omap44xx_dss_hwmod_class,
> + .mpu_irqs = omap44xx_dss_irqs,
> + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_irqs),
> + .main_clk = "dss_fck",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
> + },
> + },
> + .opt_clks = dss_opt_clks,
> + .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
> + .slaves = omap44xx_dss_slaves,
> + .slaves_cnt = ARRAY_SIZE(omap44xx_dss_slaves),
> + .masters = omap44xx_dss_masters,
> + .masters_cnt = ARRAY_SIZE(omap44xx_dss_masters),
> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> +};
> +
> +/*
> + * 'hdmi' class
> + * hdmi controller
> + */
> +
> +static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = {
> + .name = "hdmi",
The sysconfig is missing for the hdmi.
> +};
> +
> +/* dss_hdmi */
> +static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = {
> + { .irq = 101 + OMAP44XX_IRQ_GIC_START },
> +};
> +
> +static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = {
> + { .dma_req = 75 + OMAP44XX_DMA_REQ_START },
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = {
> + {
> + .pa_start = 0x48046000,
> + .pa_end = 0x48046fff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l4_per -> dss_hdmi */
> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = {
> + .master =&omap44xx_l4_per_hwmod,
> + .slave =&omap44xx_dss_hdmi_hwmod,
> + .clk = "l4_div_ck",
> + .addr = omap44xx_dss_hdmi_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_addrs),
> + .user = OCP_USER_MPU,
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = {
> + {
> + .pa_start = 0x58006000,
> + .pa_end = 0x58006fff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l3_main_2 -> dss_hdmi */
> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = {
> + .master =&omap44xx_l3_main_2_hwmod,
> + .slave =&omap44xx_dss_hdmi_hwmod,
> + .clk = "l3_div_ck",
> + .addr = omap44xx_dss_hdmi_dma_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_dma_addrs),
> + .user = OCP_USER_SDMA,
> +};
> +
> +/* dss_hdmi slave ports */
> +static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = {
> +&omap44xx_l3_main_2__dss_hdmi,
> +&omap44xx_l4_per__dss_hdmi,
> +};
> +
> +static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
> + .name = "dss_hdmi",
> + .class =&omap44xx_hdmi_hwmod_class,
> + .mpu_irqs = omap44xx_dss_hdmi_irqs,
> + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_irqs),
> + .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
> + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs),
> + .main_clk = "dss_fck",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
> + },
> + },
> + .slaves = omap44xx_dss_hdmi_slaves,
> + .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves),
> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> +};
> +
> + /*
> + * 'rfbi' class
> + * remote frame buffer interface
> + */
> +
> +static struct omap_hwmod_class_sysconfig omap44xx_rfbi_sysc = {
The name should be dss_rfbi.
> + .rev_offs = 0x0000,
> + .sysc_offs = 0x0010,
> + .syss_offs = 0x0014,
> + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
> + SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> + .sysc_fields =&omap_hwmod_sysc_type1,
> +};
> +
> +static struct omap_hwmod_class omap44xx_rfbi_hwmod_class = {
> + .name = "rfbi",
> + .sysc =&omap44xx_rfbi_sysc,
> +};
> +
> +/* dss_rfbi */
> +static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = {
> + { .dma_req = 13 + OMAP44XX_DMA_REQ_START },
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = {
> + {
> + .pa_start = 0x48042000,
> + .pa_end = 0x480420ff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l4_per -> dss_rfbi */
> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = {
> + .master =&omap44xx_l4_per_hwmod,
> + .slave =&omap44xx_dss_rfbi_hwmod,
> + .clk = "l4_div_ck",
> + .addr = omap44xx_dss_rfbi_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_addrs),
> + .user = OCP_USER_MPU,
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = {
> + {
> + .pa_start = 0x58002000,
> + .pa_end = 0x580020ff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l3_main_2 -> dss_rfbi */
> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = {
> + .master =&omap44xx_l3_main_2_hwmod,
> + .slave =&omap44xx_dss_rfbi_hwmod,
> + .clk = "l3_div_ck",
> + .addr = omap44xx_dss_rfbi_dma_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_dma_addrs),
> + .user = OCP_USER_SDMA,
> +};
> +
> +/* dss_rfbi slave ports */
> +static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = {
> +&omap44xx_l3_main_2__dss_rfbi,
> +&omap44xx_l4_per__dss_rfbi,
> +};
> +
> +static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
> + .name = "dss_rfbi",
> + .class =&omap44xx_rfbi_hwmod_class,
> + .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs,
> + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_sdma_reqs),
> + .main_clk = "dss_fck",
> + .prcm = {
> + .omap4 = {
> + .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
> + },
> + },
> + .slaves = omap44xx_dss_rfbi_slaves,
> + .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves),
> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
> +};
> +
> +/*
> + * 'venc' class
> + * video encoder
> + */
> +
> +static struct omap_hwmod_class_sysconfig omap44xx_venc_sysc = {
> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
> +};
There is no sysconfig at all in the VENC module, so this structure
should not be there at all.
> +
> +static struct omap_hwmod_class omap44xx_venc_hwmod_class = {
> + .name = "venc",
> + .sysc =&omap44xx_venc_sysc,
> +};
> +
> +/* dss_venc */
> +static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = {
> + {
> + .pa_start = 0x48043000,
> + .pa_end = 0x480430ff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l4_per -> dss_venc */
> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = {
> + .master =&omap44xx_l4_per_hwmod,
> + .slave =&omap44xx_dss_venc_hwmod,
> + .clk = "l4_div_ck",
> + .addr = omap44xx_dss_venc_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_addrs),
> + .user = OCP_USER_MPU,
> +};
> +
> +static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = {
> + {
> + .pa_start = 0x58003000,
> + .pa_end = 0x580030ff,
> + .flags = ADDR_TYPE_RT
> + },
> +};
> +
> +/* l3_main_2 -> dss_venc */
> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = {
> + .master =&omap44xx_l3_main_2_hwmod,
> + .slave =&omap44xx_dss_venc_hwmod,
> + .clk = "l3_div_ck",
> + .addr = omap44xx_dss_venc_dma_addrs,
> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_dma_addrs),
> + .user = OCP_USER_SDMA,
> +};
> +
> +/* dss_venc slave ports */
> +static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = {
> +&omap44xx_l3_main_2__dss_venc,
> +&omap44xx_l4_per__dss_venc,
> +};
> +
> +static struct omap_hwmod omap44xx_dss_venc_hwmod = {
> + .name = "dss_venc",
> + .class =&omap44xx_venc_hwmod_class,
Why don't you have any main_clk entry for venc, whereas all the other
dss submodules does have:
.main_clk = "dss_fck",
Regards,
Benoit
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v3 2/3] OMAP4: hwmod data: add DSS DISPC DSI1,2 RFBI HDMI VENC
2011-02-11 16:50 ` Cousson, Benoit
@ 2011-02-14 18:52 ` Semwal, Sumit
0 siblings, 0 replies; 9+ messages in thread
From: Semwal, Sumit @ 2011-02-14 18:52 UTC (permalink / raw)
To: Cousson, Benoit
Cc: tomi.valkeinen, paul, Hilman, Kevin, Hiremath, Vaibhav,
linux-omap, Janorkar, Mayuresh, Guruswamy, Senthilvadivu
Hi Benoit,
On Fri, Feb 11, 2011 at 10:20 PM, Cousson, Benoit <b-cousson@ti.com> wrote:
> Hi Sumit,
>
> While I was trying to merge that patch for 2.6.39, I found some changes that
> I didn't expected. I will take care of cleaning this patch, but I'd to get
> the rational first.
> All the other comments are purely cosmetic.
>
> On 1/27/2011 12:17 PM, Semwal, Sumit wrote:
>>
>> From: Benoit Cousson<b-cousson@ti.com>
>>
>> Add dss, dispc, dsi1, dsi2, hdmi, rfbi and venc hwmods.
>> In OMAP4 there are severals IPs that can be reached by differents
>> interconnect paths depending of the access initiator (MPU vs. SDMA).
>> In the case of the DSS, both L3 direct path and L4 CFG path can be
>> used to access all the DSS IPs. The two ocp_ip already exists to support
>> the two address spaces.
>>
>> +------------+-- L3_MAIN --+ MPU
>> IP | |
>> +-- L4_CFG --+
>>
>> L3 main address range is specified first, since it is used by default.
>> dss is also considered as an IP as dispc, rfbi, and named as dss_core.
>>
>> Signed-off-by: Benoit Cousson<b-cousson@ti.com>
>> Signed-off-by: Mayuresh Janorkar<mayur@ti.com>
>> Signed-off-by: Senthilvadivu Guruswamy<svadivu@ti.com>
>> Signed-off-by: Sumit Semwal<sumit.semwal@ti.com>
>> ---
>> arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 603
>> ++++++++++++++++++++++++++++
>> 1 files changed, 603 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
>> b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
>> index c2806bd..0bd579e 100644
>> --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
>> +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
>> @@ -43,6 +43,13 @@
>> static struct omap_hwmod omap44xx_dma_system_hwmod;
>> static struct omap_hwmod omap44xx_dmm_hwmod;
>> static struct omap_hwmod omap44xx_dsp_hwmod;
>> +static struct omap_hwmod omap44xx_dss_core_hwmod;
>> +static struct omap_hwmod omap44xx_dss_dispc_hwmod;
>> +static struct omap_hwmod omap44xx_dss_dsi1_hwmod;
>> +static struct omap_hwmod omap44xx_dss_dsi2_hwmod;
>> +static struct omap_hwmod omap44xx_dss_hdmi_hwmod;
>> +static struct omap_hwmod omap44xx_dss_rfbi_hwmod;
>> +static struct omap_hwmod omap44xx_dss_venc_hwmod;
>> static struct omap_hwmod omap44xx_emif_fw_hwmod;
>> static struct omap_hwmod omap44xx_iva_hwmod;
>> static struct omap_hwmod omap44xx_l3_instr_hwmod;
>> @@ -237,12 +244,21 @@ static struct omap_hwmod_ocp_if
>> omap44xx_mpu__l3_main_1 = {
>> .user = OCP_USER_MPU | OCP_USER_SDMA,
>> };
>>
>> +/* dss -> l3_main_1 */
>> +static struct omap_hwmod_ocp_if omap44xx_dss__l3_main_1 = {
>> + .master =&omap44xx_dss_core_hwmod,
>> + .slave =&omap44xx_l3_main_1_hwmod,
>> + .clk = "l3_div_ck",
>> + .user = OCP_USER_MPU | OCP_USER_SDMA,
>> +};
>> +
>> /* l3_main_1 slave ports */
>> static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = {
>> &omap44xx_dsp__l3_main_1,
>> &omap44xx_l3_main_2__l3_main_1,
>> &omap44xx_l4_cfg__l3_main_1,
>> &omap44xx_mpu__l3_main_1,
>> +&omap44xx_dss__l3_main_1,
>> };
>>
>> static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
>> @@ -746,6 +762,584 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
>> .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
>> };
>>
>> +/* ==== DSS related classes ==== */
>
> That line should not be removed.
>
>> + /*
>> + * 'dispc' class
>> + * display controller
>> + */
>> +
>> +static struct omap_hwmod_class_sysconfig omap44xx_dispc_sysc = {
>> + .rev_offs = 0x0000,
>> + .sysc_offs = 0x0010,
>> + .syss_offs = 0x0014,
>> + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
>> + SYSC_HAS_ENAWAKEUP | SYSC_HAS_MIDLEMODE |
>> + SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
>> + SYSS_HAS_RESET_STATUS),
>> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
>> + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
>> + .sysc_fields =&omap_hwmod_sysc_type1,
>> +};
>> +
>> +static struct omap_hwmod_class omap44xx_dispc_hwmod_class = {
>> + .name = "dispc",
>> + .sysc =&omap44xx_dispc_sysc,
>> +};
>> +
>> +/* dss_dispc */
>> +static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = {
>> + { .irq = 25 + OMAP44XX_IRQ_GIC_START },
>> +};
>> +
>> +static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = {
>> + { .dma_req = 5 + OMAP44XX_DMA_REQ_START },
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = {
>> + {
>> + .pa_start = 0x48041000,
>> + .pa_end = 0x48041fff,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l4_per -> dss_dispc */
>> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = {
>> + .master =&omap44xx_l4_per_hwmod,
>> + .slave =&omap44xx_dss_dispc_hwmod,
>> + .clk = "l4_div_ck",
>> + .addr = omap44xx_dss_dispc_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_addrs),
>> + .user = OCP_USER_MPU,
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = {
>> + {
>> + .pa_start = 0x58001000,
>> + .pa_end = 0x58001fff,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>
> The L3 mapping should be before the L4 one. This is the same for the other
> hwmods. Please note that this is just to be in sync with the generated code,
> it does not have any impact on the functionality.
>
>> +
>> +/* l3_main_2 -> dss_dispc */
>> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = {
>> + .master =&omap44xx_l3_main_2_hwmod,
>> + .slave =&omap44xx_dss_dispc_hwmod,
>> + .clk = "l3_div_ck",
>> + .addr = omap44xx_dss_dispc_dma_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_dma_addrs),
>> + .user = OCP_USER_SDMA,
>> +};
>> +
>> +/* dss_dispc slave ports */
>> +static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = {
>> +&omap44xx_l3_main_2__dss_dispc,
>> +&omap44xx_l4_per__dss_dispc,
>> +};
>> +
>> +static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
>> + .name = "dss_dispc",
>> + .class =&omap44xx_dispc_hwmod_class,
>> + .mpu_irqs = omap44xx_dss_dispc_irqs,
>> + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_irqs),
>> + .sdma_reqs = omap44xx_dss_dispc_sdma_reqs,
>> + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs),
>> + .main_clk = "dss_fck",
>> + .prcm = {
>> + .omap4 = {
>> + .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
>> + },
>> + },
>> + .slaves = omap44xx_dss_dispc_slaves,
>> + .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
>> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
>> +};
>> +
>> +/*
>> + * 'dsi' class
>> + * display serial interface controller
>> + */
>> +static struct omap_hwmod_class_sysconfig omap44xx_dsi_sysc = {
>> + .rev_offs = 0x0000,
>> + .sysc_offs = 0x0010,
>> + .syss_offs = 0x0014,
>> + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_CLOCKACTIVITY |
>> + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE |
>> + SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
>> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
>> + .sysc_fields =&omap_hwmod_sysc_type1,
>> +};
>> +
>> +static struct omap_hwmod_class omap44xx_dsi_hwmod_class = {
>> + .name = "dsi",
>> + .sysc =&omap44xx_dsi_sysc,
>> +};
>> +
>> +/* dss_dsi1 */
>> +static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = {
>> + { .irq = 53 + OMAP44XX_IRQ_GIC_START },
>> +};
>> +
>> +static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = {
>> + { .dma_req = 74 + OMAP44XX_DMA_REQ_START },
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = {
>> + {
>> + .pa_start = 0x48044000,
>> + .pa_end = 0x480440ff,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l4_per -> dss_dsi1 */
>> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = {
>> + .master =&omap44xx_l4_per_hwmod,
>> + .slave =&omap44xx_dss_dsi1_hwmod,
>> + .clk = "l4_div_ck",
>> + .addr = omap44xx_dss_dsi1_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_addrs),
>> + .user = OCP_USER_MPU,
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = {
>> + {
>> + .pa_start = 0x58004000,
>> + .pa_end = 0x580040ff,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l3_main_2 -> dss_dsi1 */
>> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = {
>> + .master =&omap44xx_l3_main_2_hwmod,
>> + .slave =&omap44xx_dss_dsi1_hwmod,
>> + .clk = "l3_div_ck",
>> + .addr = omap44xx_dss_dsi1_dma_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_dma_addrs),
>> + .user = OCP_USER_SDMA,
>> +};
>> +
>> +/* dss_dsi1 slave ports */
>> +static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = {
>> +&omap44xx_l3_main_2__dss_dsi1,
>> +&omap44xx_l4_per__dss_dsi1,
>> +};
>> +
>> +static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
>> + .name = "dss_dsi1",
>> + .class =&omap44xx_dsi_hwmod_class,
>> + .mpu_irqs = omap44xx_dss_dsi1_irqs,
>> + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs),
>> + .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs,
>> + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs),
>> + .main_clk = "dss_fck",
>> + .prcm = {
>> + .omap4 = {
>> + .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
>> + },
>> + },
>> + .slaves = omap44xx_dss_dsi1_slaves,
>> + .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves),
>> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
>> +};
>> +
>> +/* dss_dsi2 */
>> +static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = {
>> + { .irq = 84 + OMAP44XX_IRQ_GIC_START },
>> +};
>> +
>> +static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = {
>> + { .dma_req = 83 + OMAP44XX_DMA_REQ_START },
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = {
>> + {
>> + .pa_start = 0x48045000,
>> + .pa_end = 0x480450ff,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l4_per -> dss_dsi2 */
>> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = {
>> + .master =&omap44xx_l4_per_hwmod,
>> + .slave =&omap44xx_dss_dsi2_hwmod,
>> + .clk = "l4_div_ck",
>> + .addr = omap44xx_dss_dsi2_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_addrs),
>> + .user = OCP_USER_MPU,
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = {
>> + {
>> + .pa_start = 0x58005000,
>> + .pa_end = 0x580050ff,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l3_main_2 -> dss_dsi2 */
>> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = {
>> + .master =&omap44xx_l3_main_2_hwmod,
>> + .slave =&omap44xx_dss_dsi2_hwmod,
>> + .clk = "l3_div_ck",
>> + .addr = omap44xx_dss_dsi2_dma_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_dma_addrs),
>> + .user = OCP_USER_SDMA,
>> +};
>> +
>> +/* dss_dsi2 slave ports */
>> +static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = {
>> +&omap44xx_l3_main_2__dss_dsi2,
>> +&omap44xx_l4_per__dss_dsi2,
>> +};
>> +
>> +static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
>> + .name = "dss_dsi2",
>> + .class =&omap44xx_dsi_hwmod_class,
>> + .mpu_irqs = omap44xx_dss_dsi2_irqs,
>> + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_irqs),
>> + .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs,
>> + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs),
>> + .main_clk = "dss_fck",
>> + .prcm = {
>> + .omap4 = {
>> + .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
>> + },
>> + },
>> + .slaves = omap44xx_dss_dsi2_slaves,
>> + .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves),
>> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
>> +};
>> +
>> +/*
>> + * 'dss' class
>> + * display sub-system
>> + */
>> +static struct omap_hwmod_class_sysconfig omap44xx_dss_sysc = {
>> + .rev_offs = 0x0000,
>> + .syss_offs = 0x0014,
>> + .sysc_flags = SYSS_HAS_RESET_STATUS,
>> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
>
> There is a read-only SYSCONFIG in DSS, so it is not usable at all to change
> the idlemode.
> The attribute should be empty.
>
>> +};
>> +
>> +static struct omap_hwmod_class omap44xx_dss_hwmod_class = {
>> + .name = "dss",
>> + .sysc =&omap44xx_dss_sysc,
>> +};
>> +
>> +/* dss */
>> +/* dss master ports */
>> +static struct omap_hwmod_ocp_if *omap44xx_dss_masters[] = {
>> +&omap44xx_dss__l3_main_1,
>> +};
>> +
>> +static struct omap_hwmod_irq_info omap44xx_dss_irqs[] = {
>> + { .irq = 25 + OMAP44XX_IRQ_GIC_START },
>
> Why did you map that irq to the dss_core? It is already mapped to dispc.
I didn't change this portion, so I guess it must've gotten mixed up
when Senthil merged. But I should've re-validated - will take care in
future.
>
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = {
>> + {
>> + .pa_start = 0x48040000,
>> + .pa_end = 0x4804007f,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l4_per -> dss */
>> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = {
>> + .master =&omap44xx_l4_per_hwmod,
>> + .slave =&omap44xx_dss_core_hwmod,
>> + .clk = "l4_div_ck",
>> + .addr = omap44xx_dss_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_addrs),
>> + .user = OCP_USER_MPU,
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = {
>> + {
>> + .pa_start = 0x58000000,
>> + .pa_end = 0x5800007f,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l3_main_2 -> dss */
>> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = {
>> + .master =&omap44xx_l3_main_2_hwmod,
>> + .slave =&omap44xx_dss_core_hwmod,
>> + .clk = "l3_div_ck",
>> + .addr = omap44xx_dss_dma_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_dma_addrs),
>> + .user = OCP_USER_SDMA,
>> +};
>> +
>> +/* dss slave ports */
>> +static struct omap_hwmod_ocp_if *omap44xx_dss_slaves[] = {
>> +&omap44xx_l3_main_2__dss,
>> +&omap44xx_l4_per__dss,
>> +};
>> +
>> +static struct omap_hwmod_opt_clk dss_opt_clks[] = {
>> + { .role = "sys_clk", .clk = "dss_sys_clk" },
>> + { .role = "tv_clk", .clk = "dss_tv_clk" },
>> + { .role = "dss_clk", .clk = "dss_dss_clk" },
>> + { .role = "video_clk", .clk = "dss_48mhz_clk" },
>> +};
>> +
>> +static struct omap_hwmod omap44xx_dss_core_hwmod = {
>> + .name = "dss_core",
>> + .class =&omap44xx_dss_hwmod_class,
>> + .mpu_irqs = omap44xx_dss_irqs,
>> + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_irqs),
>> + .main_clk = "dss_fck",
>> + .prcm = {
>> + .omap4 = {
>> + .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
>> + },
>> + },
>> + .opt_clks = dss_opt_clks,
>> + .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks),
>> + .slaves = omap44xx_dss_slaves,
>> + .slaves_cnt = ARRAY_SIZE(omap44xx_dss_slaves),
>> + .masters = omap44xx_dss_masters,
>> + .masters_cnt = ARRAY_SIZE(omap44xx_dss_masters),
>> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
>> +};
>> +
>> +/*
>> + * 'hdmi' class
>> + * hdmi controller
>> + */
>> +
>> +static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = {
>> + .name = "hdmi",
>
> The sysconfig is missing for the hdmi.
Inadvertent miss. Missed in consolidation I guess; my apologies.
>
>> +};
>> +
>> +/* dss_hdmi */
>> +static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = {
>> + { .irq = 101 + OMAP44XX_IRQ_GIC_START },
>> +};
>> +
>> +static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = {
>> + { .dma_req = 75 + OMAP44XX_DMA_REQ_START },
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = {
>> + {
>> + .pa_start = 0x48046000,
>> + .pa_end = 0x48046fff,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l4_per -> dss_hdmi */
>> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = {
>> + .master =&omap44xx_l4_per_hwmod,
>> + .slave =&omap44xx_dss_hdmi_hwmod,
>> + .clk = "l4_div_ck",
>> + .addr = omap44xx_dss_hdmi_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_addrs),
>> + .user = OCP_USER_MPU,
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = {
>> + {
>> + .pa_start = 0x58006000,
>> + .pa_end = 0x58006fff,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l3_main_2 -> dss_hdmi */
>> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = {
>> + .master =&omap44xx_l3_main_2_hwmod,
>> + .slave =&omap44xx_dss_hdmi_hwmod,
>> + .clk = "l3_div_ck",
>> + .addr = omap44xx_dss_hdmi_dma_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_dma_addrs),
>> + .user = OCP_USER_SDMA,
>> +};
>> +
>> +/* dss_hdmi slave ports */
>> +static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = {
>> +&omap44xx_l3_main_2__dss_hdmi,
>> +&omap44xx_l4_per__dss_hdmi,
>> +};
>> +
>> +static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
>> + .name = "dss_hdmi",
>> + .class =&omap44xx_hdmi_hwmod_class,
>> + .mpu_irqs = omap44xx_dss_hdmi_irqs,
>> + .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_irqs),
>> + .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs,
>> + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs),
>> + .main_clk = "dss_fck",
>> + .prcm = {
>> + .omap4 = {
>> + .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
>> + },
>> + },
>> + .slaves = omap44xx_dss_hdmi_slaves,
>> + .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves),
>> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
>> +};
>> +
>> + /*
>> + * 'rfbi' class
>> + * remote frame buffer interface
>> + */
>> +
>> +static struct omap_hwmod_class_sysconfig omap44xx_rfbi_sysc = {
>
> The name should be dss_rfbi.
>
>> + .rev_offs = 0x0000,
>> + .sysc_offs = 0x0010,
>> + .syss_offs = 0x0014,
>> + .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
>> + SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
>> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
>> + .sysc_fields =&omap_hwmod_sysc_type1,
>> +};
>> +
>> +static struct omap_hwmod_class omap44xx_rfbi_hwmod_class = {
>> + .name = "rfbi",
>> + .sysc =&omap44xx_rfbi_sysc,
>> +};
>> +
>> +/* dss_rfbi */
>> +static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = {
>> + { .dma_req = 13 + OMAP44XX_DMA_REQ_START },
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = {
>> + {
>> + .pa_start = 0x48042000,
>> + .pa_end = 0x480420ff,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l4_per -> dss_rfbi */
>> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = {
>> + .master =&omap44xx_l4_per_hwmod,
>> + .slave =&omap44xx_dss_rfbi_hwmod,
>> + .clk = "l4_div_ck",
>> + .addr = omap44xx_dss_rfbi_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_addrs),
>> + .user = OCP_USER_MPU,
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = {
>> + {
>> + .pa_start = 0x58002000,
>> + .pa_end = 0x580020ff,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l3_main_2 -> dss_rfbi */
>> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = {
>> + .master =&omap44xx_l3_main_2_hwmod,
>> + .slave =&omap44xx_dss_rfbi_hwmod,
>> + .clk = "l3_div_ck",
>> + .addr = omap44xx_dss_rfbi_dma_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_dma_addrs),
>> + .user = OCP_USER_SDMA,
>> +};
>> +
>> +/* dss_rfbi slave ports */
>> +static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = {
>> +&omap44xx_l3_main_2__dss_rfbi,
>> +&omap44xx_l4_per__dss_rfbi,
>> +};
>> +
>> +static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
>> + .name = "dss_rfbi",
>> + .class =&omap44xx_rfbi_hwmod_class,
>> + .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs,
>> + .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_sdma_reqs),
>> + .main_clk = "dss_fck",
>> + .prcm = {
>> + .omap4 = {
>> + .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL,
>> + },
>> + },
>> + .slaves = omap44xx_dss_rfbi_slaves,
>> + .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves),
>> + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
>> +};
>> +
>> +/*
>> + * 'venc' class
>> + * video encoder
>> + */
>> +
>> +static struct omap_hwmod_class_sysconfig omap44xx_venc_sysc = {
>> + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
>> +};
>
> There is no sysconfig at all in the VENC module, so this structure should
> not be there at all.
Yes, you're right.
>
>> +
>> +static struct omap_hwmod_class omap44xx_venc_hwmod_class = {
>> + .name = "venc",
>> + .sysc =&omap44xx_venc_sysc,
>> +};
>> +
>> +/* dss_venc */
>> +static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = {
>> + {
>> + .pa_start = 0x48043000,
>> + .pa_end = 0x480430ff,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l4_per -> dss_venc */
>> +static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = {
>> + .master =&omap44xx_l4_per_hwmod,
>> + .slave =&omap44xx_dss_venc_hwmod,
>> + .clk = "l4_div_ck",
>> + .addr = omap44xx_dss_venc_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_addrs),
>> + .user = OCP_USER_MPU,
>> +};
>> +
>> +static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = {
>> + {
>> + .pa_start = 0x58003000,
>> + .pa_end = 0x580030ff,
>> + .flags = ADDR_TYPE_RT
>> + },
>> +};
>> +
>> +/* l3_main_2 -> dss_venc */
>> +static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = {
>> + .master =&omap44xx_l3_main_2_hwmod,
>> + .slave =&omap44xx_dss_venc_hwmod,
>> + .clk = "l3_div_ck",
>> + .addr = omap44xx_dss_venc_dma_addrs,
>> + .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_dma_addrs),
>> + .user = OCP_USER_SDMA,
>> +};
>> +
>> +/* dss_venc slave ports */
>> +static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = {
>> +&omap44xx_l3_main_2__dss_venc,
>> +&omap44xx_l4_per__dss_venc,
>> +};
>> +
>> +static struct omap_hwmod omap44xx_dss_venc_hwmod = {
>> + .name = "dss_venc",
>> + .class =&omap44xx_venc_hwmod_class,
>
> Why don't you have any main_clk entry for venc, whereas all the other dss
> submodules does have:
> .main_clk = "dss_fck",
This must be a miss; the other main_clk were also added / consolidated
into this one patch, so I think it got missed during that.
>
>
> Regards,
> Benoit
>
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [v3,1/3] OMAP2PLUS: DSS2: Add OMAP4 Kconfig support
2011-02-11 12:06 ` [v3,1/3] " Tomi Valkeinen
@ 2011-02-16 4:56 ` Semwal, Sumit
0 siblings, 0 replies; 9+ messages in thread
From: Semwal, Sumit @ 2011-02-16 4:56 UTC (permalink / raw)
To: Tomi Valkeinen; +Cc: linux-omap, Mayuresh Janorkar
Hi Tomi,
Sent an updated one; apologies for double posting, as I posted the
first one with your earlier email Id.
Best regards,
~Sumit.
On Fri, Feb 11, 2011 at 5:36 PM, Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
> Hi,
>
> On Thu, 2011-01-27 at 11:17 +0000, Sumit Semwal wrote:
>> From: Mayuresh Janorkar <mayur@ti.com>
>>
>> Enable DSS2 and OMAPFB for OMAP4 in Kconfig
>
> The indentation in this patch seems to be a bit inconsistent with the
> current Kconfigs. For example, you use two tabs in the help lines, and
> the current files use either one tab and 2 spaces, or 10 spaces.
>
> Please stick to the current indentation, or change the indentation for
> the whole file in a separate patch.
>
> Tomi
>
>
>
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^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2011-02-16 4:57 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-01-27 11:17 [PATCH v3 0/3] OMAP4: hwmod DSS support Sumit Semwal
2011-01-27 11:17 ` [PATCH v3 1/3] OMAP2PLUS: DSS2: Add OMAP4 Kconfig support Sumit Semwal
2011-02-11 12:06 ` [v3,1/3] " Tomi Valkeinen
2011-02-16 4:56 ` Semwal, Sumit
2011-01-27 11:17 ` [PATCH v3 2/3] OMAP4: hwmod data: add DSS DISPC DSI1,2 RFBI HDMI VENC Sumit Semwal
2011-02-11 16:50 ` Cousson, Benoit
2011-02-14 18:52 ` Semwal, Sumit
2011-01-27 11:17 ` [PATCH v3 3/3] OMAP4: DSS2: Add hwmod device names for OMAP4 Sumit Semwal
2011-02-11 12:23 ` [PATCH v3 0/3] OMAP4: hwmod DSS support Tomi Valkeinen
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