From mboxrd@z Thu Jan  1 00:00:00 1970
From: Haiying Wang <Haiying.Wang@freescale.com>
Date: Tue, 1 Feb 2011 12:01:46 -0500
Subject: [U-Boot] [PATCH 6/6] p1021mds: add QE and UEC support
In-Reply-To: <20110201105057.363f67cf@udp111988uds.am.freescale.net>
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On Tue, 2011-02-01 at 10:50 -0600, Scott Wood wrote:
> > > 
> > If it is a one time setting, there should be no problem to put it into
> > board code. But these pin settings need to be done before any usage of
> > phy read/write (accessing MDIO/MDC), and need to be released after the
> > usage of phy, thus the devices connected to eLBC like NAND flash/BCSR
> > can be accessed. If we use board code to set/release the pin, we don't
> > know when the phy access and nand flash access will happen.
> 
> Is this actually a board issue or an SoC issue?
> 
It is not a board issue. It is a SoC *feature*. Too many pins are muxed
on P1021. For this case, LBCTL of eLBC is muxed with QE's CE_PB[20]
which is used for MDIO signal. 

Haiying