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Mon, 20 Jun 2022 17:59:29 -0500 From: Ashish Kalra To: , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH Part2 v6 02/49] iommu/amd: Introduce function to check SEV-SNP support Date: Mon, 20 Jun 2022 22:59:19 +0000 Message-ID: <12df64394b1788156c8a3c2ee8dfd62b51ab3a81.1655761627.git.ashish.kalra@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-coco@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 82e25892-27e4-4c49-59f7-08da53108979 X-MS-TrafficTypeDiagnostic: BYAPR12MB3142:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Jun 2022 22:59:31.6735 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 82e25892-27e4-4c49-59f7-08da53108979 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT011.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BYAPR12MB3142 From: Brijesh Singh The SEV-SNP support requires that IOMMU must to enabled, see the IOMMU spec section 2.12 for further details. If IOMMU is not enabled or the SNPSup extended feature register is not set then the SNP_INIT command (used for initializing firmware) will fail. The iommu_sev_snp_supported() can be used to check if IOMMU supports the SEV-SNP feature. Signed-off-by: Brijesh Singh --- drivers/iommu/amd/init.c | 30 ++++++++++++++++++++++++++++++ include/linux/iommu.h | 9 +++++++++ 2 files changed, 39 insertions(+) diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c index 1a3ad58ba846..82be8067ddf5 100644 --- a/drivers/iommu/amd/init.c +++ b/drivers/iommu/amd/init.c @@ -3361,3 +3361,33 @@ int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 return iommu_pc_get_set_reg(iommu, bank, cntr, fxn, value, true); } + +bool iommu_sev_snp_supported(void) +{ + struct amd_iommu *iommu; + + /* + * The SEV-SNP support requires that IOMMU must be enabled, and is + * not configured in the passthrough mode. + */ + if (no_iommu || iommu_default_passthrough()) { + pr_err("SEV-SNP: IOMMU is either disabled or configured in passthrough mode.\n"); + return false; + } + + /* + * Iterate through all the IOMMUs and verify the SNPSup feature is + * enabled. + */ + for_each_iommu(iommu) { + if (!iommu_feature(iommu, FEATURE_SNP)) { + pr_err("SNPSup is disabled (devid: %02x:%02x.%x)\n", + PCI_BUS_NUM(iommu->devid), PCI_SLOT(iommu->devid), + PCI_FUNC(iommu->devid)); + return false; + } + } + + return true; +} +EXPORT_SYMBOL_GPL(iommu_sev_snp_supported); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 9208eca4b0d1..fecb72e1b11b 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -675,6 +675,12 @@ struct iommu_sva *iommu_sva_bind_device(struct device *dev, void iommu_sva_unbind_device(struct iommu_sva *handle); u32 iommu_sva_get_pasid(struct iommu_sva *handle); +#ifdef CONFIG_AMD_MEM_ENCRYPT +bool iommu_sev_snp_supported(void); +#else +static inline bool iommu_sev_snp_supported(void) { return false; } +#endif + #else /* CONFIG_IOMMU_API */ struct iommu_ops {}; @@ -1031,6 +1037,9 @@ static inline struct iommu_fwspec *dev_iommu_fwspec_get(struct device *dev) { return NULL; } + +static inline bool iommu_sev_snp_supported(void) { return false; } + #endif /* CONFIG_IOMMU_API */ /** -- 2.25.1