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From: David Gibson <david@gibson.dropbear.id.au>
To: agraf@suse.de, qemu-devel@nongnu.org
Cc: paulus@samba.org, anton@samba.org
Subject: [Qemu-devel] [PATCH 25/27] Add a PAPR TCE-bypass mechanism for the pSeries machine
Date: Fri, 25 Mar 2011 14:21:30 +1100	[thread overview]
Message-ID: <1301023292-24977-26-git-send-email-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <1301023292-24977-1-git-send-email-david@gibson.dropbear.id.au>

From: Ben Herrenschmidt <benh@kernel.crashing.org>

Usually, PAPR virtual IO devices use a virtual IOMMU mechanism, TCEs,
to mediate all DMA transfers.  While this is necessary for some sorts of
operation, it can be complex to program and slow for others.

This patch implements a mechanism for bypassing TCE translation, treating
"IO" addresses as plain (guest) physical memory addresses.  This has two
main uses:
 * Simple, but 64-bit aware programs like firmwares can use the VIO devices
without the complexity of TCE setup.
 * The guest OS can optionally use the TCE bypass to improve performance in
suitable situations.

The mechanism used is a per-device flag which disables TCE translation.
The flag is toggled with some (hypervisor-implemented) RTAS methods.

Signed-off-by: Ben Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: David Gibson <dwg@au1.ibm.com>
---
 hw/spapr_vio.c |   82 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 hw/spapr_vio.h |    5 +++
 2 files changed, 87 insertions(+), 0 deletions(-)

diff --git a/hw/spapr_vio.c b/hw/spapr_vio.c
index 8f14fcc..481a804 100644
--- a/hw/spapr_vio.c
+++ b/hw/spapr_vio.c
@@ -226,6 +226,12 @@ int spapr_tce_dma_write(VIOsPAPRDevice *dev, uint64_t taddr, const void *buf,
             (unsigned long long)taddr, size);
 #endif
 
+    /* Check for bypass */
+    if (dev->flags & VIO_PAPR_FLAG_DMA_BYPASS) {
+        cpu_physical_memory_write(taddr, buf, size);
+        return 0;
+    }
+
     while (size) {
         uint64_t tce;
         uint32_t lsize;
@@ -313,6 +319,12 @@ int spapr_tce_dma_read(VIOsPAPRDevice *dev, uint64_t taddr, void *buf,
             (unsigned long long)taddr, size);
 #endif
 
+    /* Check for bypass */
+    if (dev->flags & VIO_PAPR_FLAG_DMA_BYPASS) {
+        cpu_physical_memory_read(taddr, buf, size);
+        return 0;
+    }
+
     while (size) {
         uint64_t tce;
         uint32_t lsize;
@@ -513,6 +525,72 @@ int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq)
     return 0;
 }
 
+/* "quiesce" handling */
+
+static void spapr_vio_quiesce_one(VIOsPAPRDevice *dev)
+{
+    dev->flags &= ~VIO_PAPR_FLAG_DMA_BYPASS;
+
+    if (dev->rtce_table) {
+        size_t size = (dev->rtce_window_size >> SPAPR_VIO_TCE_PAGE_SHIFT)
+            * sizeof(VIOsPAPR_RTCE);
+        memset(dev->rtce_table, 0, size);
+    }
+
+    dev->crq.qladdr = 0;
+    dev->crq.qsize = 0;
+    dev->crq.qnext = 0;
+}
+
+static void rtas_set_tce_bypass(sPAPREnvironment *spapr, uint32_t token,
+                                uint32_t nargs, target_ulong args,
+                                uint32_t nret, target_ulong rets)
+{
+    VIOsPAPRBus *bus = spapr->vio_bus;
+    VIOsPAPRDevice *dev;
+    uint32_t unit, enable;
+
+    if (nargs != 2) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+    unit = rtas_ld(args, 0);
+    enable = rtas_ld(args, 1);
+    dev = spapr_vio_find_by_reg(bus, unit);
+    if (!dev) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+    if (enable) {
+        dev->flags |= VIO_PAPR_FLAG_DMA_BYPASS;
+    } else {
+        dev->flags &= ~VIO_PAPR_FLAG_DMA_BYPASS;
+    }
+
+    rtas_st(rets, 0, 0);
+}
+
+static void rtas_quiesce(sPAPREnvironment *spapr, uint32_t token,
+                         uint32_t nargs, target_ulong args,
+                         uint32_t nret, target_ulong rets)
+{
+    VIOsPAPRBus *bus = spapr->vio_bus;
+    DeviceState *qdev;
+    VIOsPAPRDevice *dev = NULL;
+
+    if (nargs != 0) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+
+    QLIST_FOREACH(qdev, &bus->bus.children, sibling) {
+        dev = (VIOsPAPRDevice *)qdev;
+        spapr_vio_quiesce_one(dev);
+    }
+
+    rtas_st(rets, 0, 0);
+}
+
 static int spapr_vio_busdev_init(DeviceState *qdev, DeviceInfo *qinfo)
 {
     VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qinfo;
@@ -591,6 +669,10 @@ VIOsPAPRBus *spapr_vio_bus_init(void)
     spapr_register_hypercall(H_SEND_CRQ, h_send_crq);
     spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq);
 
+    /* RTAS calls */
+    spapr_rtas_register("ibm,set-tce-bypass", rtas_set_tce_bypass);
+    spapr_rtas_register("quiesce", rtas_quiesce);
+
     for (qinfo = device_info_list; qinfo; qinfo = qinfo->next) {
         VIOsPAPRDeviceInfo *info = (VIOsPAPRDeviceInfo *)qinfo;
 
diff --git a/hw/spapr_vio.h b/hw/spapr_vio.h
index b7d0daa..841b043 100644
--- a/hw/spapr_vio.h
+++ b/hw/spapr_vio.h
@@ -48,6 +48,8 @@ typedef struct VIOsPAPR_CRQ {
 typedef struct VIOsPAPRDevice {
     DeviceState qdev;
     uint32_t reg;
+    uint32_t flags;
+#define VIO_PAPR_FLAG_DMA_BYPASS        0x1
     qemu_irq qirq;
     uint32_t vio_irq_num;
     target_ulong signal_state;
@@ -104,4 +106,7 @@ void spapr_vlan_create(VIOsPAPRBus *bus, uint32_t reg, NICInfo *nd,
 void spapr_vscsi_create(VIOsPAPRBus *bus, uint32_t reg,
                         qemu_irq qirq, uint32_t vio_irq_num);
 
+int spapr_tce_set_bypass(uint32_t unit, uint32_t enable);
+void spapr_vio_quiesce(void);
+
 #endif /* _HW_SPAPR_VIO_H */
-- 
1.7.1

  parent reply	other threads:[~2011-03-25  3:22 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-03-25  3:21 [Qemu-devel] [0/27] Implement emulation of pSeries logical partitions (v5) David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 01/27] Clean up PowerPC SLB handling code David Gibson
2011-05-19  5:35   ` Andreas Färber
2011-05-19  5:39     ` David Gibson
     [not found]       ` <67F15A3F-5EE2-4825-8766-2CA2D6B3356B@web.de>
2011-05-19  6:45         ` David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 02/27] Allow qemu_devtree_setprop() to take arbitrary values David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 03/27] Add a hook to allow hypercalls to be emulated on PowerPC David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 04/27] Implement PowerPC slbmfee and slbmfev instructions David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 05/27] Implement missing parts of the logic for the POWER PURR David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 06/27] Correct ppc popcntb logic, implement popcntw and popcntd David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 07/27] Clean up slb_lookup() function David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 08/27] Parse SDR1 on mtspr instead of at translate time David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 09/27] Use "hash" more consistently in ppc mmu code David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 10/27] Better factor the ppc hash translation path David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 11/27] Support 1T segments on ppc David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 12/27] Add POWER7 support for ppc David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 13/27] Start implementing pSeries logical partition machine David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 14/27] Implement the bus structure for PAPR virtual IO David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 15/27] Virtual hash page table handling on pSeries machine David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 16/27] Implement hcall based RTAS for pSeries machines David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 17/27] Implement assorted pSeries hcalls and RTAS methods David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 18/27] Implement the PAPR (pSeries) virtualized interrupt controller (xics) David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 19/27] Add PAPR H_VIO_SIGNAL hypercall and infrastructure for VIO interrupts David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 20/27] Add (virtual) interrupt to PAPR virtual tty device David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 21/27] Implement TCE translation for sPAPR VIO David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 22/27] Implement sPAPR Virtual LAN (ibmveth) David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 23/27] Implement PAPR CRQ hypercalls David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 24/27] Implement PAPR virtual SCSI interface (ibmvscsi) David Gibson
2011-03-25  3:21 ` David Gibson [this message]
2011-03-25  3:21 ` [Qemu-devel] [PATCH 26/27] Implement PAPR VPA functions for pSeries shared processor partitions David Gibson
2011-03-25  3:21 ` [Qemu-devel] [PATCH 27/27] Add SLOF-based partition firmware for pSeries machine, allowing more boot options David Gibson
2011-03-25 18:29   ` Anthony Liguori
2011-03-28  1:19     ` David Gibson
2011-03-28  9:03       ` Alexander Graf
2011-03-28 12:49         ` Avi Kivity
2011-03-28 12:53           ` Alexander Graf
2011-03-28 13:02             ` Avi Kivity
2011-03-28 13:08               ` Alexander Graf
2011-03-28 13:20                 ` Anthony Liguori
2011-03-28 13:16         ` Anthony Liguori
2011-03-28 14:07           ` David Gibson
2011-03-28 17:42           ` Blue Swirl
2011-03-28 18:02             ` Anthony Liguori
2011-03-28 18:24               ` Aurelien Jarno
2011-03-28 18:50                 ` Anthony Liguori
2011-03-28 19:52                   ` Aurelien Jarno
2011-03-29  9:09                     ` Alexander Graf
2011-03-29  9:07               ` Alexander Graf
2011-03-28 13:13       ` Anthony Liguori
2011-03-29  7:21         ` David Gibson
2011-03-28 10:30   ` [Qemu-devel] " Alexander Graf
2011-03-28 10:51     ` Paolo Bonzini
2011-03-28 10:51     ` Paolo Bonzini
2011-03-28 11:19       ` Alexander Graf
2011-03-28 11:22 ` [Qemu-devel] Re: [0/27] Implement emulation of pSeries logical partitions (v5) Alexander Graf
  -- strict thread matches above, loose matches on Subject: below --
2011-04-01  4:15 [Qemu-devel] [0/27] Implement emulation of pSeries logical partitions (v6) David Gibson
2011-04-01  4:15 ` [Qemu-devel] [PATCH 25/27] Add a PAPR TCE-bypass mechanism for the pSeries machine David Gibson
2011-03-23  5:30 [Qemu-devel] [0/27] Implement emulation of pSeries logical partitions (v4) David Gibson
2011-03-23  5:30 ` [Qemu-devel] [PATCH 25/27] Add a PAPR TCE-bypass mechanism for the pSeries machine David Gibson

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