From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Scott Wood <scottwood@freescale.com>
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 2/7] powerpc/mm: 64-bit 4k: use a PMD-based virtual page table
Date: Sat, 21 May 2011 08:15:36 +1000 [thread overview]
Message-ID: <1305929736.7481.188.camel@pasglop> (raw)
In-Reply-To: <20110520155719.32e51635@schlenkerla.am.freescale.net>
On Fri, 2011-05-20 at 15:57 -0500, Scott Wood wrote:
> I see a 2% cost going from virtual pmd to full 4-level walk in the
> benchmark mentioned above (some type of sort), and just under 3% in
> page-stride lat_mem_rd from lmbench.
>
> OTOH, the virtual pmd approach still leaves the possibility of taking a
> bunch of virtual page table misses if non-localized accesses happen over a
> very large chunk of address space (tens of GiB), and we'd have one fewer
> type of TLB miss to worry about complexity-wise with a straight table walk.
>
> Let me know what you'd prefer.
I'm tempted to kill the virtual linear feature alltogether.. it didn't
buy us that much. Have you looked if you can snatch back some of those
cycles with hand tuning of the level walker ?
Would it work/help to have a simple cache of the last pmd & address and
compare just that ? Maybe in a SPRG or a known cache hot location like
the PACA in a line that we already load anyways ?
Cheers,
Ben.
next prev parent reply other threads:[~2011-05-20 22:15 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-18 21:04 [PATCH 1/7] powerpc/mm: 64-bit 4k: use page-sized PMDs Scott Wood
2011-05-18 21:05 ` [PATCH 2/7] powerpc/mm: 64-bit 4k: use a PMD-based virtual page table Scott Wood
2011-05-18 21:33 ` Benjamin Herrenschmidt
2011-05-20 20:57 ` Scott Wood
2011-05-20 22:15 ` Benjamin Herrenschmidt [this message]
2011-05-23 18:54 ` Scott Wood
2011-05-23 20:51 ` Benjamin Herrenschmidt
2011-05-23 23:31 ` Scott Wood
2011-05-24 2:52 ` Benjamin Herrenschmidt
2011-05-18 21:05 ` [PATCH 3/7] powerpc/mm: 64-bit tlb miss: get PACA from memory rather than SPR Scott Wood
2011-05-18 21:05 ` [PATCH 4/7] powerpc/mm: 64-bit: Don't load PACA in normal TLB miss exceptions Scott Wood
2011-05-18 21:05 ` [PATCH 5/7] powerpc/mm: 64-bit: don't handle non-standard page sizes Scott Wood
2011-05-18 21:36 ` Benjamin Herrenschmidt
2011-05-18 21:50 ` Scott Wood
2011-05-18 21:54 ` Benjamin Herrenschmidt
2011-05-18 21:05 ` [PATCH 6/7] powerpc/mm: 64-bit: tlb handler micro-optimization Scott Wood
2011-05-18 21:37 ` Benjamin Herrenschmidt
2011-05-18 21:51 ` Scott Wood
2011-05-18 21:54 ` Benjamin Herrenschmidt
2011-05-18 22:27 ` Scott Wood
2011-05-18 21:05 ` [PATCH 7/7] powerpc/e5500: set MMU_FTR_USE_PAIRED_MAS Scott Wood
2011-05-18 21:38 ` Benjamin Herrenschmidt
2011-05-18 21:52 ` Scott Wood
2011-05-18 21:58 ` Benjamin Herrenschmidt
2011-05-18 21:32 ` [PATCH 1/7] powerpc/mm: 64-bit 4k: use page-sized PMDs Benjamin Herrenschmidt
2011-05-18 21:46 ` Scott Wood
2011-05-18 21:52 ` Benjamin Herrenschmidt
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