From: Alex.Waterman.awaterman at dawning.com <Alex.Waterman.awaterman@dawning.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 4/8] Updates the at91sam9mg45_matrix.h header to new defines.
Date: Thu, 30 Jun 2011 15:14:55 -0400 [thread overview]
Message-ID: <1309461299-22604-5-git-send-email-awaterman@dawning.com> (raw)
In-Reply-To: <1309461299-22604-1-git-send-email-awaterman@dawning.com>
From: Alex Waterman <awaterman@dawning.com>
Moves the at91sam9g45_matrix.h header file to use the new
ATMEL_BASE_MATRIX define.
Signed-off-by: Alex Waterman <awaterman@dawning.com>
---
.../arm/include/asm/arch-at91/at91sam9g45_matrix.h | 84 ++++++++++----------
1 files changed, 42 insertions(+), 42 deletions(-)
diff --git a/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h
index 1620e1b..9808e38 100644
--- a/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h
+++ b/arch/arm/include/asm/arch-at91/at91sam9g45_matrix.h
@@ -15,18 +15,18 @@
#ifndef AT91SAM9G45_MATRIX_H
#define AT91SAM9G45_MATRIX_H
-#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6 (AT91_MATRIX + 0x18) /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7 (AT91_MATRIX + 0x1C) /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8 (AT91_MATRIX + 0x20) /* Master Configuration Register 8 */
-#define AT91_MATRIX_MCFG9 (AT91_MATRIX + 0x24) /* Master Configuration Register 9 */
-#define AT91_MATRIX_MCFG10 (AT91_MATRIX + 0x28) /* Master Configuration Register 10 */
-#define AT91_MATRIX_MCFG11 (AT91_MATRIX + 0x2C) /* Master Configuration Register 11 */
+#define AT91_MATRIX_MCFG0 (ATMEL_BASE_MATRIX + 0x00) /* Master Configuration Register 0 */
+#define AT91_MATRIX_MCFG1 (ATMEL_BASE_MATRIX + 0x04) /* Master Configuration Register 1 */
+#define AT91_MATRIX_MCFG2 (ATMEL_BASE_MATRIX + 0x08) /* Master Configuration Register 2 */
+#define AT91_MATRIX_MCFG3 (ATMEL_BASE_MATRIX + 0x0C) /* Master Configuration Register 3 */
+#define AT91_MATRIX_MCFG4 (ATMEL_BASE_MATRIX + 0x10) /* Master Configuration Register 4 */
+#define AT91_MATRIX_MCFG5 (ATMEL_BASE_MATRIX + 0x14) /* Master Configuration Register 5 */
+#define AT91_MATRIX_MCFG6 (ATMEL_BASE_MATRIX + 0x18) /* Master Configuration Register 6 */
+#define AT91_MATRIX_MCFG7 (ATMEL_BASE_MATRIX + 0x1C) /* Master Configuration Register 7 */
+#define AT91_MATRIX_MCFG8 (ATMEL_BASE_MATRIX + 0x20) /* Master Configuration Register 8 */
+#define AT91_MATRIX_MCFG9 (ATMEL_BASE_MATRIX + 0x24) /* Master Configuration Register 9 */
+#define AT91_MATRIX_MCFG10 (ATMEL_BASE_MATRIX + 0x28) /* Master Configuration Register 10 */
+#define AT91_MATRIX_MCFG11 (ATMEL_BASE_MATRIX + 0x2C) /* Master Configuration Register 11 */
#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
@@ -37,14 +37,14 @@
#define AT91_MATRIX_ULBT_SIXTYFOUR (6 << 0)
#define AT91_MATRIX_ULBT_128 (7 << 0)
-#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5 (AT91_MATRIX + 0x54) /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6 (AT91_MATRIX + 0x58) /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7 (AT91_MATRIX + 0x5C) /* Slave Configuration Register 7 */
+#define AT91_MATRIX_SCFG0 (ATMEL_BASE_MATRIX + 0x40) /* Slave Configuration Register 0 */
+#define AT91_MATRIX_SCFG1 (ATMEL_BASE_MATRIX + 0x44) /* Slave Configuration Register 1 */
+#define AT91_MATRIX_SCFG2 (ATMEL_BASE_MATRIX + 0x48) /* Slave Configuration Register 2 */
+#define AT91_MATRIX_SCFG3 (ATMEL_BASE_MATRIX + 0x4C) /* Slave Configuration Register 3 */
+#define AT91_MATRIX_SCFG4 (ATMEL_BASE_MATRIX + 0x50) /* Slave Configuration Register 4 */
+#define AT91_MATRIX_SCFG5 (ATMEL_BASE_MATRIX + 0x54) /* Slave Configuration Register 5 */
+#define AT91_MATRIX_SCFG6 (ATMEL_BASE_MATRIX + 0x58) /* Slave Configuration Register 6 */
+#define AT91_MATRIX_SCFG7 (ATMEL_BASE_MATRIX + 0x5C) /* Slave Configuration Register 7 */
#define AT91_MATRIX_SLOT_CYCLE (0x1ff << 0) /* Maximum Number of Allowed Cycles for a Burst */
#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
@@ -52,22 +52,22 @@
#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */
-#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0 (AT91_MATRIX + 0x84) /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1 (AT91_MATRIX + 0x8C) /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2 (AT91_MATRIX + 0x94) /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3 (AT91_MATRIX + 0x9C) /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4 (AT91_MATRIX + 0xA4) /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5 (AT91_MATRIX + 0xA8) /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5 (AT91_MATRIX + 0xAC) /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6 (AT91_MATRIX + 0xB0) /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6 (AT91_MATRIX + 0xB4) /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7 (AT91_MATRIX + 0xB8) /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7 (AT91_MATRIX + 0xBC) /* Priority Register B for Slave 7 */
+#define AT91_MATRIX_PRAS0 (ATMEL_BASE_MATRIX + 0x80) /* Priority Register A for Slave 0 */
+#define AT91_MATRIX_PRBS0 (ATMEL_BASE_MATRIX + 0x84) /* Priority Register B for Slave 0 */
+#define AT91_MATRIX_PRAS1 (ATMEL_BASE_MATRIX + 0x88) /* Priority Register A for Slave 1 */
+#define AT91_MATRIX_PRBS1 (ATMEL_BASE_MATRIX + 0x8C) /* Priority Register B for Slave 1 */
+#define AT91_MATRIX_PRAS2 (ATMEL_BASE_MATRIX + 0x90) /* Priority Register A for Slave 2 */
+#define AT91_MATRIX_PRBS2 (ATMEL_BASE_MATRIX + 0x94) /* Priority Register B for Slave 2 */
+#define AT91_MATRIX_PRAS3 (ATMEL_BASE_MATRIX + 0x98) /* Priority Register A for Slave 3 */
+#define AT91_MATRIX_PRBS3 (ATMEL_BASE_MATRIX + 0x9C) /* Priority Register B for Slave 3 */
+#define AT91_MATRIX_PRAS4 (ATMEL_BASE_MATRIX + 0xA0) /* Priority Register A for Slave 4 */
+#define AT91_MATRIX_PRBS4 (ATMEL_BASE_MATRIX + 0xA4) /* Priority Register B for Slave 4 */
+#define AT91_MATRIX_PRAS5 (ATMEL_BASE_MATRIX + 0xA8) /* Priority Register A for Slave 5 */
+#define AT91_MATRIX_PRBS5 (ATMEL_BASE_MATRIX + 0xAC) /* Priority Register B for Slave 5 */
+#define AT91_MATRIX_PRAS6 (ATMEL_BASE_MATRIX + 0xB0) /* Priority Register A for Slave 6 */
+#define AT91_MATRIX_PRBS6 (ATMEL_BASE_MATRIX + 0xB4) /* Priority Register B for Slave 6 */
+#define AT91_MATRIX_PRAS7 (ATMEL_BASE_MATRIX + 0xB8) /* Priority Register A for Slave 7 */
+#define AT91_MATRIX_PRBS7 (ATMEL_BASE_MATRIX + 0xBC) /* Priority Register B for Slave 7 */
#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
@@ -81,7 +81,7 @@
#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */
#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */
-#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */
+#define AT91_MATRIX_MRCR (ATMEL_BASE_MATRIX + 0x100) /* Master Remap Control Register */
#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
#define AT91_MATRIX_RCB2 (1 << 2)
@@ -95,7 +95,7 @@
#define AT91_MATRIX_RCB10 (1 << 10)
#define AT91_MATRIX_RCB11 (1 << 11)
-#define AT91_MATRIX_TCMR (AT91_MATRIX + 0x110) /* TCM Configuration Register */
+#define AT91_MATRIX_TCMR (ATMEL_BASE_MATRIX + 0x110) /* TCM Configuration Register */
#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
#define AT91_MATRIX_ITCM_0 (0 << 0)
#define AT91_MATRIX_ITCM_32 (6 << 0)
@@ -107,12 +107,12 @@
#define AT91_MATRIX_TCM_NO_WS (0x0 << 11)
#define AT91_MATRIX_TCM_ONE_WS (0x1 << 11)
-#define AT91_MATRIX_VIDEO (AT91_MATRIX + 0x118) /* Video Mode Configuration Register */
+#define AT91_MATRIX_VIDEO (ATMEL_BASE_MATRIX + 0x118) /* Video Mode Configuration Register */
#define AT91C_VDEC_SEL (0x1 << 0) /* Video Mode Selection */
#define AT91C_VDEC_SEL_OFF (0 << 0)
#define AT91C_VDEC_SEL_ON (1 << 0)
-#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x128) /* EBI Chip Select Assignment Register */
+#define AT91_MATRIX_EBICSA (ATMEL_BASE_MATRIX + 0x128) /* EBI Chip Select Assignment Register */
#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */
#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1)
@@ -138,13 +138,13 @@
#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18)
#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18)
-#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */
+#define AT91_MATRIX_WPMR (ATMEL_BASE_MATRIX + 0x1E4) /* Write Protect Mode Register */
#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */
#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0)
#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0)
#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */
-#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */
+#define AT91_MATRIX_WPSR (ATMEL_BASE_MATRIX + 0x1E8) /* Write Protect Status Register */
#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */
#define AT91_MATRIX_WPSR_NO_WPV (0 << 0)
#define AT91_MATRIX_WPSR_WPV (1 << 0)
--
1.7.4.4
next prev parent reply other threads:[~2011-06-30 19:14 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-06-29 22:47 [U-Boot] Is somebody workin on getting the AT91SAM9G45EKES working on the latest build? William C. Landolina
2011-06-30 12:32 ` Alex Waterman
2011-06-30 13:12 ` Albert ARIBAUD
2011-06-30 20:01 ` Alex Waterman
2011-06-30 19:14 ` [U-Boot] [PATCH 0/8] Fixes compilation for the at91sam9m10g45ek Alex.Waterman.awaterman at dawning.com
2011-06-30 19:14 ` [U-Boot] [PATCH 1/8] Remove old config stuff from Makefile Alex.Waterman.awaterman at dawning.com
2011-06-30 19:14 ` [U-Boot] [PATCH 2/8] Update at91sam9m10g45_devices.c to fix compile errors Alex.Waterman.awaterman at dawning.com
2011-06-30 19:14 ` [U-Boot] [PATCH 3/8] Fix compile problem for some boards in the clock code Alex.Waterman.awaterman at dawning.com
2011-06-30 19:14 ` Alex.Waterman.awaterman at dawning.com [this message]
2011-06-30 19:14 ` [U-Boot] [PATCH 5/8] Updates the board specific files for the at91sam9mg45ek Alex.Waterman.awaterman at dawning.com
2011-06-30 19:14 ` [U-Boot] [PATCH 6/8] Adds wait to atmel_usart serial_init function Alex.Waterman.awaterman at dawning.com
2011-06-30 19:14 ` [U-Boot] [PATCH 7/8] Updates the at91sam9m10g45ek.h config file Alex.Waterman.awaterman at dawning.com
2011-06-30 19:14 ` [U-Boot] [PATCH 8/8] Updates the boards.cfg file Alex.Waterman.awaterman at dawning.com
[not found] ` <657FC3AB549C7F4DB01F4397232ED733A2DACD735E@Exchange2007.techatl.com>
2011-06-30 19:32 ` [U-Boot] Is somebody workin on getting the AT91SAM9G45EKES working on the latest build? Alex Waterman
2011-06-30 20:54 ` William C. Landolina
2011-07-01 13:15 ` Alex Waterman
2011-07-01 19:37 ` William C. Landolina
2011-06-30 19:32 ` [U-Boot] [PATCH 0/8] Fixes compilation for the at91sam9m10g45ek Alex Waterman
2011-06-30 19:33 ` [U-Boot] [PATCH 1/8] Remove old config stuff from Makefile Alex Waterman
2011-06-30 19:33 ` [U-Boot] [PATCH 2/8] Update at91sam9m10g45_devices.c to fix compile errors Alex Waterman
2011-07-04 7:35 ` Reinhard Meyer
2011-06-30 19:33 ` [U-Boot] [PATCH 3/8] Fix compile problem for some boards in the clock code Alex Waterman
2011-07-04 7:37 ` Reinhard Meyer
2011-06-30 19:33 ` [U-Boot] [PATCH 4/8] Updates the at91sam9mg45_matrix.h header to new defines Alex Waterman
2011-06-30 19:33 ` [U-Boot] [PATCH 5/8] Updates the board specific files for the at91sam9mg45ek Alex Waterman
2011-06-30 19:33 ` [U-Boot] [PATCH 6/8] Adds wait to atmel_usart serial_init function Alex Waterman
2011-07-01 12:03 ` Sergei Shtylyov
2011-07-01 12:37 ` Alex Waterman
2011-07-01 15:17 ` Albert ARIBAUD
2011-07-04 7:42 ` Reinhard Meyer
2011-06-30 19:33 ` [U-Boot] [PATCH 7/8] Updates the at91sam9m10g45ek.h config file Alex Waterman
2011-07-04 7:50 ` Reinhard Meyer
2011-06-30 19:33 ` [U-Boot] [PATCH 8/8] Updates the boards.cfg file Alex Waterman
2011-07-04 7:52 ` Reinhard Meyer
2011-08-02 8:19 ` [U-Boot] [PATCH 0/8] Fixes compilation for the at91sam9m10g45ek Thomas Petazzoni
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