From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sasha Levin Subject: [PATCH v2] KVM: Implement support for the RH bit Date: Fri, 2 Sep 2011 10:48:41 +0300 Message-ID: <1314949721-32761-1-git-send-email-levinsasha928@gmail.com> Cc: Sasha Levin , Avi Kivity , Marcelo Tosatti To: kvm@vger.kernel.org Return-path: Received: from mail-ww0-f42.google.com ([74.125.82.42]:40160 "EHLO mail-ww0-f42.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757858Ab1IBHtY (ORCPT ); Fri, 2 Sep 2011 03:49:24 -0400 Received: by wwe5 with SMTP id 5so1803498wwe.1 for ; Fri, 02 Sep 2011 00:49:23 -0700 (PDT) Sender: kvm-owner@vger.kernel.org List-ID: The RH bit exists in the message address register (lower 32 bits of the address). The bit indicates whether the message should go to the processor which was indicated in the destination ID bits, or whether it should go to the processor running at the lowest priority. Cc: Avi Kivity Cc: Marcelo Tosatti Signed-off-by: Sasha Levin --- virt/kvm/irq_comm.c | 17 ++++++++++++++++- 1 files changed, 16 insertions(+), 1 deletions(-) diff --git a/virt/kvm/irq_comm.c b/virt/kvm/irq_comm.c index 9f614b4..0ba3a3d 100644 --- a/virt/kvm/irq_comm.c +++ b/virt/kvm/irq_comm.c @@ -134,7 +134,22 @@ int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, irq.level = 1; irq.shorthand = 0; - /* TODO Deal with RH bit of MSI message address */ + /* + * If the RH bit is set, we'll deliver to the processor running + * at the lowest priority. + */ + if (e->msi.address_lo & MSI_ADDR_REDIRECTION_LOWPRI) { + irq.delivery_mode = MSI_DATA_DELIVERY_LOWPRI; + } else { + /* + * If the RH bit is not set, we'll deliver to the specific + * processor mentioned in destination ID, and ignore the DM + * bit. + */ + irq.dest_mode = MSI_ADDR_DEST_MODE_PHYSICAL; + irq.delivery_mode = MSI_DATA_DELIVERY_FIXED; + } + return kvm_irq_delivery_to_apic(kvm, NULL, &irq); } -- 1.7.6.1