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* Misc. display fixes
@ 2011-09-22  5:45 Jesse Barnes
  2011-09-22  5:45 ` [PATCH 1/5] drm/i915: remove PP_ON/OFF waits from LVDS code Jesse Barnes
                   ` (4 more replies)
  0 siblings, 5 replies; 14+ messages in thread
From: Jesse Barnes @ 2011-09-22  5:45 UTC (permalink / raw)
  To: intel-gfx

Using some test equipment here in Banaglore, I came up with the
following fixes.  Also, it sounds like we can skip the PP_ON waits in
the LVDS code to speed up boot & resume, but that change needs lots of
soak time before I'll be happy pushing it upstream (works here though).

Thanks,
Jesse

^ permalink raw reply	[flat|nested] 14+ messages in thread

* [PATCH 1/5] drm/i915: remove PP_ON/OFF waits from LVDS code
  2011-09-22  5:45 Misc. display fixes Jesse Barnes
@ 2011-09-22  5:45 ` Jesse Barnes
  2011-09-22  8:42   ` Chris Wilson
  2011-09-22  5:45 ` [PATCH 2/5] drm/i915: read full receiver capability field during DP hot plug Jesse Barnes
                   ` (3 subsequent siblings)
  4 siblings, 1 reply; 14+ messages in thread
From: Jesse Barnes @ 2011-09-22  5:45 UTC (permalink / raw)
  To: intel-gfx

These aren't actually needed for correct functionality and can speed up
boot and resume a bit.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_lvds.c |    4 ----
 1 files changed, 0 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 8b521a2..8ef9a45 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -104,8 +104,6 @@ static void intel_lvds_enable(struct intel_lvds *intel_lvds)
 
 	I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 	POSTING_READ(lvds_reg);
-	if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
-		DRM_ERROR("timed out waiting for panel to power on\n");
 
 	intel_panel_enable_backlight(dev);
 }
@@ -129,8 +127,6 @@ static void intel_lvds_disable(struct intel_lvds *intel_lvds)
 	intel_panel_disable_backlight(dev);
 
 	I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
-	if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
-		DRM_ERROR("timed out waiting for panel to power off\n");
 
 	if (intel_lvds->pfit_control) {
 		I915_WRITE(PFIT_CONTROL, 0);
-- 
1.7.4.1

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH 2/5] drm/i915: read full receiver capability field during DP hot plug
  2011-09-22  5:45 Misc. display fixes Jesse Barnes
  2011-09-22  5:45 ` [PATCH 1/5] drm/i915: remove PP_ON/OFF waits from LVDS code Jesse Barnes
@ 2011-09-22  5:45 ` Jesse Barnes
  2011-09-22  8:41   ` Chris Wilson
  2011-09-22  5:45 ` [PATCH 3/5] drm/i915: add DP test request handling Jesse Barnes
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 14+ messages in thread
From: Jesse Barnes @ 2011-09-22  5:45 UTC (permalink / raw)
  To: intel-gfx

Read link status first, followed by the full DPCD receiver cap field
rather than just the first 8 bytes.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/i915_irq.c |    2 ++
 drivers/gpu/drm/i915/intel_dp.c |    4 ++--
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 02f96fd..80b49cc 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -530,6 +530,7 @@ static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)
 		if (pch_iir & SDE_HOTPLUG_MASK_CPT)
 			queue_work(dev_priv->wq, &dev_priv->hotplug_work);
 		pch_irq_handler(dev);
+		I915_WRITE(PCH_PORT_HOTPLUG, I915_READ(PCH_PORT_HOTPLUG));
 	}
 
 	if (pm_iir & GEN6_PM_DEFERRED_EVENTS) {
@@ -629,6 +630,7 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)
 		if (pch_iir & hotplug_mask)
 			queue_work(dev_priv->wq, &dev_priv->hotplug_work);
 		pch_irq_handler(dev);
+		I915_WRITE(PCH_PORT_HOTPLUG, I915_READ(PCH_PORT_HOTPLUG));
 	}
 
 	if (de_iir & DE_PCU_EVENT) {
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0feae90..01848f9 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -36,7 +36,7 @@
 #include "i915_drv.h"
 #include "drm_dp_helper.h"
 
-
+#define DP_RECEIVER_CAP_SIZE	0xf
 #define DP_LINK_STATUS_SIZE	6
 #define DP_LINK_CHECK_TIMEOUT	(10 * 1000)
 
@@ -53,7 +53,7 @@ struct intel_dp {
 	int dpms_mode;
 	uint8_t link_bw;
 	uint8_t lane_count;
-	uint8_t dpcd[8];
+	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
 	struct i2c_adapter adapter;
 	struct i2c_algo_dp_aux_data algo;
 	bool is_pch_edp;
-- 
1.7.4.1

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH 3/5] drm/i915: add DP test request handling
  2011-09-22  5:45 Misc. display fixes Jesse Barnes
  2011-09-22  5:45 ` [PATCH 1/5] drm/i915: remove PP_ON/OFF waits from LVDS code Jesse Barnes
  2011-09-22  5:45 ` [PATCH 2/5] drm/i915: read full receiver capability field during DP hot plug Jesse Barnes
@ 2011-09-22  5:45 ` Jesse Barnes
  2011-09-22  5:46 ` [PATCH 4/5] drm/i915: fix ILK+ infoframe support Jesse Barnes
  2011-09-22  5:46 ` [PATCH 5/5] drm/i915: use correct SPD type value Jesse Barnes
  4 siblings, 0 replies; 14+ messages in thread
From: Jesse Barnes @ 2011-09-22  5:45 UTC (permalink / raw)
  To: intel-gfx

DPCD 1.1+ adds some automated test infrastructure support.  Add support
for reading the IRQ source and jumping to a test handling routine if
needed.  Subsequent patches will handle particular tests; this patch
just ACKs any requested tests by default.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_dp.c |   37 +++++++++++++++++++++++++++++++++++++
 include/drm/drm_dp_helper.h     |   25 +++++++++++++++++++++++++
 2 files changed, 62 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 01848f9..dafc976 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1592,6 +1592,27 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
 	return false;
 }
 
+static bool
+intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector)
+{
+	int ret;
+
+	ret = intel_dp_aux_native_read_retry(intel_dp,
+					     DP_DEVICE_SERVICE_IRQ_VECTOR,
+					     sink_irq_vector, 1);
+	if (!ret)
+		return false;
+
+	return true;
+}
+
+static void
+intel_dp_handle_test_request(struct intel_dp *intel_dp)
+{
+	/* NAK by default */
+	intel_dp_aux_native_write_1(intel_dp, DP_TEST_RESPONSE, DP_TEST_ACK);
+}
+
 /*
  * According to DP spec
  * 5.1.2:
@@ -1604,6 +1625,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
 static void
 intel_dp_check_link_status(struct intel_dp *intel_dp)
 {
+	u8 sink_irq_vector;
+
 	if (intel_dp->dpms_mode != DRM_MODE_DPMS_ON)
 		return;
 
@@ -1622,6 +1645,20 @@ intel_dp_check_link_status(struct intel_dp *intel_dp)
 		return;
 	}
 
+	/* Try to read the source of the interrupt */
+	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 &&
+	    intel_dp_get_sink_irq(intel_dp, &sink_irq_vector)) {
+		/* Clear interrupt source */
+		intel_dp_aux_native_write_1(intel_dp,
+					    DP_DEVICE_SERVICE_IRQ_VECTOR,
+					    sink_irq_vector);
+
+		if (sink_irq_vector & DP_AUTOMATED_TEST_REQUEST)
+			intel_dp_handle_test_request(intel_dp);
+		if (sink_irq_vector & (DP_CP_IRQ | DP_SINK_SPECIFIC_IRQ))
+			DRM_DEBUG_DRIVER("CP or sink specific irq unhandled\n");
+	}
+
 	if (!intel_channel_eq_ok(intel_dp)) {
 		DRM_DEBUG_KMS("%s: channel EQ not ok, retraining\n",
 			      drm_get_encoder_name(&intel_dp->base.base));
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 91567bb..4ba017f 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -133,6 +133,12 @@
 #define DP_MAIN_LINK_CHANNEL_CODING_SET	    0x108
 # define DP_SET_ANSI_8B10B		    (1 << 0)
 
+#define DP_DEVICE_SERVICE_IRQ_VECTOR	    0x201
+# define DP_REMOTE_CONTROL_COMMAND_PENDING  (1 << 0)
+# define DP_AUTOMATED_TEST_REQUEST	    (1 << 1)
+# define DP_CP_IRQ			    (1 << 2)
+# define DP_SINK_SPECIFIC_IRQ		    (1 << 6)
+
 #define DP_LANE0_1_STATUS		    0x202
 #define DP_LANE2_3_STATUS		    0x203
 # define DP_LANE_CR_DONE		    (1 << 0)
@@ -165,6 +171,25 @@
 # define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK   0xc0
 # define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT  6
 
+#define DP_TEST_REQUEST			    0x218
+# define DP_TEST_LINK_TRAINING		    (1 << 0)
+# define DP_TEST_LINK_PATTERN		    (1 << 1)
+# define DP_TEST_LINK_EDID_READ		    (1 << 2)
+# define DP_TEST_LINK_PHY_TEST_PATTERN	    (1 << 3) /* DPCD >= 1.1 */
+
+#define DP_TEST_LINK_RATE		    0x219
+# define DP_LINK_RATE_162		    (0x6)
+# define DP_LINK_RATE_27		    (0xa)
+
+#define DP_TEST_LANE_COUNT		    0x220
+
+#define DP_TEST_PATTERN			    0x221
+
+#define DP_TEST_RESPONSE		    0x260
+# define DP_TEST_ACK			    (1 << 0)
+# define DP_TEST_NAK			    (1 << 1)
+# define DP_TEST_EDID_CHECKSUM_WRITE	    (1 << 2)
+
 #define DP_SET_POWER                        0x600
 # define DP_SET_POWER_D0                    0x1
 # define DP_SET_POWER_D3                    0x2
-- 
1.7.4.1

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH 4/5] drm/i915: fix ILK+ infoframe support
  2011-09-22  5:45 Misc. display fixes Jesse Barnes
                   ` (2 preceding siblings ...)
  2011-09-22  5:45 ` [PATCH 3/5] drm/i915: add DP test request handling Jesse Barnes
@ 2011-09-22  5:46 ` Jesse Barnes
  2011-10-17 15:50   ` Jesse Barnes
  2011-09-22  5:46 ` [PATCH 5/5] drm/i915: use correct SPD type value Jesse Barnes
  4 siblings, 1 reply; 14+ messages in thread
From: Jesse Barnes @ 2011-09-22  5:46 UTC (permalink / raw)
  To: intel-gfx

Misc fixes based on tests with an infoframe analyzer:
  - checksum *does* include header bytes
  - DIP enable & AVI infoframe are tied together in hw, so disable both
    and make sure AVI frames are enabled first
  - use every vsync flag for SPD frames to avoid reserved value in
    frequency field when enabling both AVI & SPD

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=40281.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_hdmi.c |   18 +++++++++++-------
 1 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 226ba83..7244761 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -69,8 +69,7 @@ void intel_dip_infoframe_csum(struct dip_infoframe *frame)
 	frame->checksum = 0;
 	frame->ecc = 0;
 
-	/* Header isn't part of the checksum */
-	for (i = 5; i < frame->len; i++)
+	for (i = 0; i < frame->len + DIP_HEADER_SIZE; i++)
 		sum += data[i];
 
 	frame->checksum = 0x100 - sum;
@@ -104,7 +103,7 @@ static u32 intel_infoframe_flags(struct dip_infoframe *frame)
 		flags |= VIDEO_DIP_ENABLE_AVI | VIDEO_DIP_FREQ_VSYNC;
 		break;
 	case DIP_TYPE_SPD:
-		flags |= VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_FREQ_2VSYNC;
+		flags |= VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_FREQ_VSYNC;
 		break;
 	default:
 		DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type);
@@ -165,9 +164,9 @@ static void ironlake_write_infoframe(struct drm_encoder *encoder,
 
 	flags = intel_infoframe_index(frame);
 
-	val &= ~VIDEO_DIP_SELECT_MASK;
+	val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */
 
-	I915_WRITE(reg, val | flags);
+	I915_WRITE(reg, VIDEO_DIP_ENABLE | val | flags);
 
 	for (i = 0; i < len; i += 4) {
 		I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
@@ -486,6 +485,7 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
 	struct intel_encoder *intel_encoder;
 	struct intel_connector *intel_connector;
 	struct intel_hdmi *intel_hdmi;
+	int i;
 
 	intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL);
 	if (!intel_hdmi)
@@ -538,10 +538,14 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
 
 	intel_hdmi->sdvox_reg = sdvox_reg;
 
-	if (!HAS_PCH_SPLIT(dev))
+	if (!HAS_PCH_SPLIT(dev)) {
 		intel_hdmi->write_infoframe = i9xx_write_infoframe;
-	else
+		I915_WRITE(VIDEO_DIP_CTL, 0);
+	} else {
 		intel_hdmi->write_infoframe = ironlake_write_infoframe;
+		for_each_pipe(i)
+			I915_WRITE(TVIDEO_DIP_CTL(i), 0);
+	}
 
 	drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
 
-- 
1.7.4.1

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* [PATCH 5/5] drm/i915: use correct SPD type value
  2011-09-22  5:45 Misc. display fixes Jesse Barnes
                   ` (3 preceding siblings ...)
  2011-09-22  5:46 ` [PATCH 4/5] drm/i915: fix ILK+ infoframe support Jesse Barnes
@ 2011-09-22  5:46 ` Jesse Barnes
  2011-10-17 15:50   ` Jesse Barnes
  4 siblings, 1 reply; 14+ messages in thread
From: Jesse Barnes @ 2011-09-22  5:46 UTC (permalink / raw)
  To: intel-gfx

SPD frames are actually type 0x83, not just 0x3.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_drv.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 7b330e7..756f3b9 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -184,7 +184,7 @@ struct intel_crtc {
 #define DIP_VERSION_AVI 0x2
 #define DIP_LEN_AVI     13
 
-#define DIP_TYPE_SPD	0x3
+#define DIP_TYPE_SPD	0x83
 #define DIP_VERSION_SPD	0x1
 #define DIP_LEN_SPD	25
 #define DIP_SPD_UNKNOWN	0
-- 
1.7.4.1

^ permalink raw reply related	[flat|nested] 14+ messages in thread

* Re: [PATCH 2/5] drm/i915: read full receiver capability field during DP hot plug
  2011-09-22  5:45 ` [PATCH 2/5] drm/i915: read full receiver capability field during DP hot plug Jesse Barnes
@ 2011-09-22  8:41   ` Chris Wilson
  2011-09-22 14:59     ` Jesse Barnes
  0 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2011-09-22  8:41 UTC (permalink / raw)
  To: Jesse Barnes, intel-gfx

On Thu, 22 Sep 2011 11:15:58 +0530, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> Read link status first, followed by the full DPCD receiver cap field
> rather than just the first 8 bytes.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/i915_irq.c |    2 ++
>  drivers/gpu/drm/i915/intel_dp.c |    4 ++--
>  2 files changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 02f96fd..80b49cc 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -530,6 +530,7 @@ static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)
>  		if (pch_iir & SDE_HOTPLUG_MASK_CPT)
>  			queue_work(dev_priv->wq, &dev_priv->hotplug_work);
>  		pch_irq_handler(dev);
> +		I915_WRITE(PCH_PORT_HOTPLUG, I915_READ(PCH_PORT_HOTPLUG));
>  	}
>  
>  	if (pm_iir & GEN6_PM_DEFERRED_EVENTS) {
> @@ -629,6 +630,7 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)
>  		if (pch_iir & hotplug_mask)
>  			queue_work(dev_priv->wq, &dev_priv->hotplug_work);
>  		pch_irq_handler(dev);
> +		I915_WRITE(PCH_PORT_HOTPLUG, I915_READ(PCH_PORT_HOTPLUG));
>  	}

This is a seperate chunk to the commit message.

>  
>  	if (de_iir & DE_PCU_EVENT) {
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 0feae90..01848f9 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -36,7 +36,7 @@
>  #include "i915_drv.h"
>  #include "drm_dp_helper.h"
>  
> -
> +#define DP_RECEIVER_CAP_SIZE	0xf
>  #define DP_LINK_STATUS_SIZE	6
>  #define DP_LINK_CHECK_TIMEOUT	(10 * 1000)
>  
> @@ -53,7 +53,7 @@ struct intel_dp {
>  	int dpms_mode;
>  	uint8_t link_bw;
>  	uint8_t lane_count;
> -	uint8_t dpcd[8];
> +	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
>  	struct i2c_adapter adapter;
>  	struct i2c_algo_dp_aux_data algo;
>  	bool is_pch_edp;

So I'm not seeing the quick check followed by the full read as
described.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH 1/5] drm/i915: remove PP_ON/OFF waits from LVDS code
  2011-09-22  5:45 ` [PATCH 1/5] drm/i915: remove PP_ON/OFF waits from LVDS code Jesse Barnes
@ 2011-09-22  8:42   ` Chris Wilson
  2011-09-22 15:00     ` Jesse Barnes
  0 siblings, 1 reply; 14+ messages in thread
From: Chris Wilson @ 2011-09-22  8:42 UTC (permalink / raw)
  To: Jesse Barnes, intel-gfx

On Thu, 22 Sep 2011 11:15:57 +0530, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> These aren't actually needed for correct functionality and can speed up
> boot and resume a bit.

We've been paranoid for years here. Even after I removed them they've
returned.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_lvds.c |    4 ----
>  1 files changed, 0 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
> index 8b521a2..8ef9a45 100644
> --- a/drivers/gpu/drm/i915/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/intel_lvds.c
> @@ -104,8 +104,6 @@ static void intel_lvds_enable(struct intel_lvds *intel_lvds)
>  
>  	I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
>  	POSTING_READ(lvds_reg);
> -	if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
> -		DRM_ERROR("timed out waiting for panel to power on\n");
>  
>  	intel_panel_enable_backlight(dev);
>  }
> @@ -129,8 +127,6 @@ static void intel_lvds_disable(struct intel_lvds *intel_lvds)
>  	intel_panel_disable_backlight(dev);
>  
>  	I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
> -	if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
> -		DRM_ERROR("timed out waiting for panel to power off\n");
>  
>  	if (intel_lvds->pfit_control) {
>  		I915_WRITE(PFIT_CONTROL, 0);
> -- 
> 1.7.4.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Chris Wilson, Intel Open Source Technology Centre

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH 2/5] drm/i915: read full receiver capability field during DP hot plug
  2011-09-22  8:41   ` Chris Wilson
@ 2011-09-22 14:59     ` Jesse Barnes
  2011-10-17 15:53       ` Jesse Barnes
  0 siblings, 1 reply; 14+ messages in thread
From: Jesse Barnes @ 2011-09-22 14:59 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

On Thu, 22 Sep 2011 09:41:01 +0100
Chris Wilson <chris@chris-wilson.co.uk> wrote:

> On Thu, 22 Sep 2011 11:15:58 +0530, Jesse Barnes
> <jbarnes@virtuousgeek.org> wrote:
> > Read link status first, followed by the full DPCD receiver cap field
> > rather than just the first 8 bytes.
> > 
> > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> > ---
> >  drivers/gpu/drm/i915/i915_irq.c |    2 ++
> >  drivers/gpu/drm/i915/intel_dp.c |    4 ++--
> >  2 files changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_irq.c
> > b/drivers/gpu/drm/i915/i915_irq.c index 02f96fd..80b49cc 100644
> > --- a/drivers/gpu/drm/i915/i915_irq.c
> > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > @@ -530,6 +530,7 @@ static irqreturn_t
> > ivybridge_irq_handler(DRM_IRQ_ARGS) if (pch_iir &
> > SDE_HOTPLUG_MASK_CPT) queue_work(dev_priv->wq,
> > &dev_priv->hotplug_work); pch_irq_handler(dev);
> > +		I915_WRITE(PCH_PORT_HOTPLUG,
> > I915_READ(PCH_PORT_HOTPLUG)); }
> >  
> >  	if (pm_iir & GEN6_PM_DEFERRED_EVENTS) {
> > @@ -629,6 +630,7 @@ static irqreturn_t
> > ironlake_irq_handler(DRM_IRQ_ARGS) if (pch_iir & hotplug_mask)
> >  			queue_work(dev_priv->wq,
> > &dev_priv->hotplug_work); pch_irq_handler(dev);
> > +		I915_WRITE(PCH_PORT_HOTPLUG,
> > I915_READ(PCH_PORT_HOTPLUG)); }
> 
> This is a seperate chunk to the commit message.

Damnit, git commit -a should ask "do you really mean it?".

> >  
> >  	if (de_iir & DE_PCU_EVENT) {
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c index 0feae90..01848f9 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -36,7 +36,7 @@
> >  #include "i915_drv.h"
> >  #include "drm_dp_helper.h"
> >  
> > -
> > +#define DP_RECEIVER_CAP_SIZE	0xf
> >  #define DP_LINK_STATUS_SIZE	6
> >  #define DP_LINK_CHECK_TIMEOUT	(10 * 1000)
> >  
> > @@ -53,7 +53,7 @@ struct intel_dp {
> >  	int dpms_mode;
> >  	uint8_t link_bw;
> >  	uint8_t lane_count;
> > -	uint8_t dpcd[8];
> > +	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
> >  	struct i2c_adapter adapter;
> >  	struct i2c_algo_dp_aux_data algo;
> >  	bool is_pch_edp;
> 
> So I'm not seeing the quick check followed by the full read as
> described.

Increasing the DPCD size here increases the read size to include the
full receiver caps field.  We already read the link status at hot plug
time, so the commit message is a little misleading.  The main fix here
is to read the full caps field rather than just the first 8 bytes.

Jesse

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH 1/5] drm/i915: remove PP_ON/OFF waits from LVDS code
  2011-09-22  8:42   ` Chris Wilson
@ 2011-09-22 15:00     ` Jesse Barnes
  0 siblings, 0 replies; 14+ messages in thread
From: Jesse Barnes @ 2011-09-22 15:00 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

On Thu, 22 Sep 2011 09:42:38 +0100
Chris Wilson <chris@chris-wilson.co.uk> wrote:

> On Thu, 22 Sep 2011 11:15:57 +0530, Jesse Barnes
> <jbarnes@virtuousgeek.org> wrote:
> > These aren't actually needed for correct functionality and can
> > speed up boot and resume a bit.
> 
> We've been paranoid for years here. Even after I removed them they've
> returned.

Yeah I'm wary of this one too.  But supposedly it's ok, and who knows,
maybe it will finally break those last remaining 8xx systems out
there. :)

Jesse

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH 4/5] drm/i915: fix ILK+ infoframe support
  2011-09-22  5:46 ` [PATCH 4/5] drm/i915: fix ILK+ infoframe support Jesse Barnes
@ 2011-10-17 15:50   ` Jesse Barnes
  0 siblings, 0 replies; 14+ messages in thread
From: Jesse Barnes @ 2011-10-17 15:50 UTC (permalink / raw)
  Cc: intel-gfx


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On Thu, 22 Sep 2011 11:16:00 +0530
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

> Misc fixes based on tests with an infoframe analyzer:
>   - checksum *does* include header bytes
>   - DIP enable & AVI infoframe are tied together in hw, so disable both
>     and make sure AVI frames are enabled first
>   - use every vsync flag for SPD frames to avoid reserved value in
>     frequency field when enabling both AVI & SPD
> 
> Fixes https://bugs.freedesktop.org/show_bug.cgi?id=40281.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_hdmi.c |   18 +++++++++++-------

Keith, please pull this one in to -fixes and/or cc: stable when you
apply it.

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center

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http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH 5/5] drm/i915: use correct SPD type value
  2011-09-22  5:46 ` [PATCH 5/5] drm/i915: use correct SPD type value Jesse Barnes
@ 2011-10-17 15:50   ` Jesse Barnes
  0 siblings, 0 replies; 14+ messages in thread
From: Jesse Barnes @ 2011-10-17 15:50 UTC (permalink / raw)
  Cc: intel-gfx


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On Thu, 22 Sep 2011 11:16:01 +0530
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

> SPD frames are actually type 0x83, not just 0x3.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Another one for -fixes.

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center

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http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH 2/5] drm/i915: read full receiver capability field during DP hot plug
  2011-09-22 14:59     ` Jesse Barnes
@ 2011-10-17 15:53       ` Jesse Barnes
  2011-10-17 21:52         ` Adam Jackson
  0 siblings, 1 reply; 14+ messages in thread
From: Jesse Barnes @ 2011-10-17 15:53 UTC (permalink / raw)
  Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 3231 bytes --]

On Thu, 22 Sep 2011 20:29:09 +0530
Jesse Barnes <jbarnes@virtuousgeek.org> wrote:

> On Thu, 22 Sep 2011 09:41:01 +0100
> Chris Wilson <chris@chris-wilson.co.uk> wrote:
> 
> > On Thu, 22 Sep 2011 11:15:58 +0530, Jesse Barnes
> > <jbarnes@virtuousgeek.org> wrote:
> > > Read link status first, followed by the full DPCD receiver cap field
> > > rather than just the first 8 bytes.
> > > 
> > > Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> > > ---
> > >  drivers/gpu/drm/i915/i915_irq.c |    2 ++
> > >  drivers/gpu/drm/i915/intel_dp.c |    4 ++--
> > >  2 files changed, 4 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_irq.c
> > > b/drivers/gpu/drm/i915/i915_irq.c index 02f96fd..80b49cc 100644
> > > --- a/drivers/gpu/drm/i915/i915_irq.c
> > > +++ b/drivers/gpu/drm/i915/i915_irq.c
> > > @@ -530,6 +530,7 @@ static irqreturn_t
> > > ivybridge_irq_handler(DRM_IRQ_ARGS) if (pch_iir &
> > > SDE_HOTPLUG_MASK_CPT) queue_work(dev_priv->wq,
> > > &dev_priv->hotplug_work); pch_irq_handler(dev);
> > > +		I915_WRITE(PCH_PORT_HOTPLUG,
> > > I915_READ(PCH_PORT_HOTPLUG)); }
> > >  
> > >  	if (pm_iir & GEN6_PM_DEFERRED_EVENTS) {
> > > @@ -629,6 +630,7 @@ static irqreturn_t
> > > ironlake_irq_handler(DRM_IRQ_ARGS) if (pch_iir & hotplug_mask)
> > >  			queue_work(dev_priv->wq,
> > > &dev_priv->hotplug_work); pch_irq_handler(dev);
> > > +		I915_WRITE(PCH_PORT_HOTPLUG,
> > > I915_READ(PCH_PORT_HOTPLUG)); }
> > 
> > This is a seperate chunk to the commit message.
> 
> Damnit, git commit -a should ask "do you really mean it?".
> 
> > >  
> > >  	if (de_iir & DE_PCU_EVENT) {
> > > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > > b/drivers/gpu/drm/i915/intel_dp.c index 0feae90..01848f9 100644
> > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > @@ -36,7 +36,7 @@
> > >  #include "i915_drv.h"
> > >  #include "drm_dp_helper.h"
> > >  
> > > -
> > > +#define DP_RECEIVER_CAP_SIZE	0xf
> > >  #define DP_LINK_STATUS_SIZE	6
> > >  #define DP_LINK_CHECK_TIMEOUT	(10 * 1000)
> > >  
> > > @@ -53,7 +53,7 @@ struct intel_dp {
> > >  	int dpms_mode;
> > >  	uint8_t link_bw;
> > >  	uint8_t lane_count;
> > > -	uint8_t dpcd[8];
> > > +	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
> > >  	struct i2c_adapter adapter;
> > >  	struct i2c_algo_dp_aux_data algo;
> > >  	bool is_pch_edp;
> > 
> > So I'm not seeing the quick check followed by the full read as
> > described.
> 
> Increasing the DPCD size here increases the read size to include the
> full receiver caps field.  We already read the link status at hot plug
> time, so the commit message is a little misleading.  The main fix here
> is to read the full caps field rather than just the first 8 bytes.

Sorry Keith, should have cc'd you on the other two replies to this
thread as well.

This one is mainly increasing the size of the DPCD array we use so that
we read all the cap bytes instead of just the first 8.  This makes some
sinks (the compliance testing one at least) happier.

I can re-post or you can just commit this by itself.  Any preference?

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center

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http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 14+ messages in thread

* Re: [PATCH 2/5] drm/i915: read full receiver capability field during DP hot plug
  2011-10-17 15:53       ` Jesse Barnes
@ 2011-10-17 21:52         ` Adam Jackson
  0 siblings, 0 replies; 14+ messages in thread
From: Adam Jackson @ 2011-10-17 21:52 UTC (permalink / raw)
  To: Jesse Barnes; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 610 bytes --]

On Mon, 2011-10-17 at 08:53 -0700, Jesse Barnes wrote:

> Sorry Keith, should have cc'd you on the other two replies to this
> thread as well.
> 
> This one is mainly increasing the size of the DPCD array we use so that
> we read all the cap bytes instead of just the first 8.  This makes some
> sinks (the compliance testing one at least) happier.
> 
> I can re-post or you can just commit this by itself.  Any preference?

Sorry to be late on this one.  Matches the 1.1a spec (well, to the
extent that 1.1a says anything with authority).

Reviewed-by: Adam Jackson <ajax@redhat.com>

- ajax

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^ permalink raw reply	[flat|nested] 14+ messages in thread

end of thread, other threads:[~2011-10-17 21:52 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-09-22  5:45 Misc. display fixes Jesse Barnes
2011-09-22  5:45 ` [PATCH 1/5] drm/i915: remove PP_ON/OFF waits from LVDS code Jesse Barnes
2011-09-22  8:42   ` Chris Wilson
2011-09-22 15:00     ` Jesse Barnes
2011-09-22  5:45 ` [PATCH 2/5] drm/i915: read full receiver capability field during DP hot plug Jesse Barnes
2011-09-22  8:41   ` Chris Wilson
2011-09-22 14:59     ` Jesse Barnes
2011-10-17 15:53       ` Jesse Barnes
2011-10-17 21:52         ` Adam Jackson
2011-09-22  5:45 ` [PATCH 3/5] drm/i915: add DP test request handling Jesse Barnes
2011-09-22  5:46 ` [PATCH 4/5] drm/i915: fix ILK+ infoframe support Jesse Barnes
2011-10-17 15:50   ` Jesse Barnes
2011-09-22  5:46 ` [PATCH 5/5] drm/i915: use correct SPD type value Jesse Barnes
2011-10-17 15:50   ` Jesse Barnes

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