From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Cc: patches@linaro.org
Subject: [Qemu-devel] [PATCH 2/5] target-arm: v6 media multiply space: UNDEF on unassigned encodings
Date: Wed, 28 Sep 2011 18:27:30 +0100 [thread overview]
Message-ID: <1317230853-24970-3-git-send-email-peter.maydell@linaro.org> (raw)
In-Reply-To: <1317230853-24970-1-git-send-email-peter.maydell@linaro.org>
Clean up the decoding of the v6 media multiply space so that we UNDEF
on unassigned encodings rather than randomly interpreting them as
some instruction in this space.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target-arm/translate.c | 24 ++++++++++++++++++++----
1 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 75c0ad4..e99fc18 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7569,11 +7569,16 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
}
break;
case 2: /* Multiplies (Type 3). */
- tmp = load_reg(s, rm);
- tmp2 = load_reg(s, rs);
- if (insn & (1 << 20)) {
+ switch ((insn >> 20) & 0x7) {
+ case 5:
+ if (((insn >> 6) ^ (insn >> 7)) & 1) {
+ /* op2 not 00x or 11x : UNDEF */
+ goto illegal_op;
+ }
/* Signed multiply most significant [accumulate].
(SMMUL, SMMLA, SMMLS) */
+ tmp = load_reg(s, rm);
+ tmp2 = load_reg(s, rs);
tmp64 = gen_muls_i64_i32(tmp, tmp2);
if (rd != 15) {
@@ -7592,7 +7597,15 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
tcg_gen_trunc_i64_i32(tmp, tmp64);
tcg_temp_free_i64(tmp64);
store_reg(s, rn, tmp);
- } else {
+ break;
+ case 0:
+ case 4:
+ /* SMLAD, SMUAD, SMLSD, SMUSD, SMLALD, SMLSLD */
+ if (insn & (1 << 7)) {
+ goto illegal_op;
+ }
+ tmp = load_reg(s, rm);
+ tmp2 = load_reg(s, rs);
if (insn & (1 << 5))
gen_swap_half(tmp2);
gen_smul_dual(tmp, tmp2);
@@ -7625,6 +7638,9 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
}
store_reg(s, rn, tmp);
}
+ break;
+ default:
+ goto illegal_op;
}
break;
case 3:
--
1.7.1
next prev parent reply other threads:[~2011-09-28 17:27 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-28 17:27 [Qemu-devel] [PATCH 0/5] target-arm: Implement UDIV/SDIV and fused multiply-accumulate Peter Maydell
2011-09-28 17:27 ` [Qemu-devel] [PATCH 1/5] softfloat: Reinstate accidentally disabled target-specific NaN handling Peter Maydell
2011-09-30 15:03 ` Richard Henderson
2011-09-28 17:27 ` Peter Maydell [this message]
2011-09-28 17:27 ` [Qemu-devel] [PATCH 3/5] target-arm: Add ARM UDIV/SDIV support Peter Maydell
2011-09-28 17:27 ` [Qemu-devel] [PATCH 4/5] softfloat: Implement fused multiply-add Peter Maydell
2011-09-30 15:28 ` Richard Henderson
2011-09-30 16:12 ` Peter Maydell
2011-09-28 17:27 ` [Qemu-devel] [PATCH 5/5] target-arm: Implement VFPv4 fused multiply-accumulate insns Peter Maydell
2011-09-28 19:13 ` [Qemu-devel] [PATCH 0/5] target-arm: Implement UDIV/SDIV and fused multiply-accumulate Blue Swirl
2011-09-28 19:32 ` Peter Maydell
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