From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:57576) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RdnFh-0003xj-Lu for qemu-devel@nongnu.org; Thu, 22 Dec 2011 13:20:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RdnFf-0001FO-EU for qemu-devel@nongnu.org; Thu, 22 Dec 2011 13:20:25 -0500 Received: from smtp201.dfw.emailsrvr.com ([67.192.241.201]:37303) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RdnFf-0001FC-9h for qemu-devel@nongnu.org; Thu, 22 Dec 2011 13:20:23 -0500 From: Mark Langsdorf Date: Thu, 22 Dec 2011 12:20:07 -0600 Message-Id: <1324578014-24746-3-git-send-email-mark.langsdorf@calxeda.com> In-Reply-To: <1324578014-24746-1-git-send-email-mark.langsdorf@calxeda.com> References: <1324578014-24746-1-git-send-email-mark.langsdorf@calxeda.com> Subject: [Qemu-devel] [PATCH v2 2/9] arm: Set frequencies for arm_timer List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: kwolf@redhat.com, peter.maydell@linaro.org, paul@codesourcery.com, Mark Langsdorf Use qdev properties to allow board modelers to set the frequencies for the sp804 timer. Each of the sp804's timers can have an individual frequency. The timers default to 1MHz. Signed-off-by: Mark Langsdorf --- Changes from v1 Simplified multiple timer frequency handling Removed the shared default hw/arm_timer.c | 26 +++++++++++++++++++++----- 1 files changed, 21 insertions(+), 5 deletions(-) diff --git a/hw/arm_timer.c b/hw/arm_timer.c index 0a5b9d2..d2738c7 100644 --- a/hw/arm_timer.c +++ b/hw/arm_timer.c @@ -9,6 +9,8 @@ #include "sysbus.h" #include "qemu-timer.h" +#include "qemu-common.h" +#include "qdev.h" /* Common timer implementation. */ @@ -178,6 +180,7 @@ typedef struct { SysBusDevice busdev; MemoryRegion iomem; arm_timer_state *timer[2]; + int freq0, freq1; int level[2]; qemu_irq irq; } sp804_state; @@ -269,10 +272,13 @@ static int sp804_init(SysBusDevice *dev) qi = qemu_allocate_irqs(sp804_set_irq, s, 2); sysbus_init_irq(dev, &s->irq); - /* ??? The timers are actually configurable between 32kHz and 1MHz, but - we don't implement that. */ - s->timer[0] = arm_timer_init(1000000); - s->timer[1] = arm_timer_init(1000000); + /* The timers are configurable between 32kHz and 1MHz + * defaulting to 1MHz but overrideable as a property + * They can be configured individually as a property + * but default is shared frequency */ + s->timer[0] = arm_timer_init(s->freq0); + s->timer[1] = arm_timer_init(s->freq1); + s->timer[0]->irq = qi[0]; s->timer[1]->irq = qi[1]; memory_region_init_io(&s->iomem, &sp804_ops, s, "sp804", 0x1000); @@ -281,6 +287,16 @@ static int sp804_init(SysBusDevice *dev) return 0; } +static SysBusDeviceInfo sp804_info = { + .init = sp804_init, + .qdev.name = "sp804", + .qdev.size = sizeof(sp804_state), + .qdev.props = (Property[]) { + DEFINE_PROP_INT32("freq0", sp804_state, freq0, 1000000), + DEFINE_PROP_INT32("freq1", sp804_state, freq1, 1000000), + DEFINE_PROP_END_OF_LIST(), + } +}; /* Integrator/CP timer module. */ @@ -349,7 +365,7 @@ static int icp_pit_init(SysBusDevice *dev) static void arm_timer_register_devices(void) { sysbus_register_dev("integrator_pit", sizeof(icp_pit_state), icp_pit_init); - sysbus_register_dev("sp804", sizeof(sp804_state), sp804_init); + sysbus_register_withprop(&sp804_info); } device_init(arm_timer_register_devices) -- 1.7.5.4