From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C09AC33CB7 for ; Wed, 29 Jan 2020 07:26:44 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E84D120716 for ; Wed, 29 Jan 2020 07:26:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=c-s.fr header.i=@c-s.fr header.b="j/GZoeZ7" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726216AbgA2H0n (ORCPT ); Wed, 29 Jan 2020 02:26:43 -0500 Received: from pegase1.c-s.fr ([93.17.236.30]:22127 "EHLO pegase1.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726091AbgA2H0m (ORCPT ); Wed, 29 Jan 2020 02:26:42 -0500 Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 486w5q6898z9txVs; Wed, 29 Jan 2020 08:26:39 +0100 (CET) Authentication-Results: localhost; dkim=pass reason="1024-bit key; insecure key" header.d=c-s.fr header.i=@c-s.fr header.b=j/GZoeZ7; dkim-adsp=pass; dkim-atps=neutral X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id fPfSf9D4r1FM; Wed, 29 Jan 2020 08:26:39 +0100 (CET) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 486w5q51hdz9txVr; Wed, 29 Jan 2020 08:26:39 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=c-s.fr; s=mail; t=1580282799; bh=5Fxvw/jc8y//pgWf3Spr5zDn1R4mwLPSzwzdVvG6uYE=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=j/GZoeZ7wNtfHmMjeTo0R1mIA/Jal8yTZuk8S1UKYG452qCeEkzIOsUiHWQUbSUyA xN2AF+i5Dd7yrwJNyYNINzj08Cqz55AfcregSWbEZxjqj7g9/tN/qj4szTYq+Jf9oz itEzCxCoNxR03K2bPrvRD7TAnf0KTL/yWQEVRw14= Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 913908B7FE; Wed, 29 Jan 2020 08:26:40 +0100 (CET) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id FlKTzVgQvj4i; Wed, 29 Jan 2020 08:26:40 +0100 (CET) Received: from [192.168.4.90] (unknown [192.168.4.90]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 88FFC8B768; Wed, 29 Jan 2020 08:26:39 +0100 (CET) Subject: Re: [RFC PATCH v4 10/11] lib: vdso: Allow arches to override the ns shift operation To: Thomas Gleixner , Andy Lutomirski Cc: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , nathanl@linux.ibm.com, Arnd Bergmann , Vincenzo Frascino , LKML , linuxppc-dev , linux-arm-kernel , "open list:MIPS" , X86 ML References: <877e1rfa40.fsf@nanos.tec.linutronix.de> <87mua64tv0.fsf@nanos.tec.linutronix.de> From: Christophe Leroy Message-ID: <1329105a-aa6b-bd40-3a62-5c7e130d2a7b@c-s.fr> Date: Wed, 29 Jan 2020 08:26:39 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.4.2 MIME-Version: 1.0 In-Reply-To: <87mua64tv0.fsf@nanos.tec.linutronix.de> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: fr Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le 29/01/2020 à 08:14, Thomas Gleixner a écrit : > Andy Lutomirski writes: > >> On Thu, Jan 16, 2020 at 11:57 AM Thomas Gleixner wrote: >>> >>> Andy Lutomirski writes: >>>> On Thu, Jan 16, 2020 at 9:58 AM Christophe Leroy >>>> >>>> Would mul_u64_u64_shr() be a good alternative? Could we adjust it to >>>> assume the shift is less than 32? That function exists to benefit >>>> 32-bit arches. >>> >>> We'd want mul_u64_u32_shr() for this. The rules for mult and shift are: >>> >> >> That's what I meant to type... > > Just that it does not work. The math is: > > ns = d->nsecs; // That's the nsec value shifted left by d->shift > > ns += ((cur - d->last) & d->mask) * mult; > > ns >>= d->shift; > > So we cannot use mul_u64_u32_shr() because we need the addition there > before shifting. And no, we can't drop the fractional part of > d->nsecs. Been there, done that, got sporadic time going backwards > problems as a reward. Need to look at that again as stuff has changed > over time. > > On x86 we enforce that mask is 64bit, so the & operation is not there, > but due to the nasties of TSC we have that conditional > > if (cur > last) > return (cur - last) * mult; > return 0; > > Christophe, on PPC the decrementer/RTC clocksource masks are 64bit as > well, so you can spare that & operation there too. > Yes, I did it already. It spares reading d->mast, that the main advantage. Christophe From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.0 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8B777C33CB2 for ; Wed, 29 Jan 2020 07:28:35 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2E72D20708 for ; Wed, 29 Jan 2020 07:28:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=c-s.fr header.i=@c-s.fr header.b="j/GZoeZ7" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2E72D20708 Authentication-Results: mail.kernel.org; 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Wed, 29 Jan 2020 08:26:40 +0100 (CET) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id FlKTzVgQvj4i; Wed, 29 Jan 2020 08:26:40 +0100 (CET) Received: from [192.168.4.90] (unknown [192.168.4.90]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 88FFC8B768; Wed, 29 Jan 2020 08:26:39 +0100 (CET) Subject: Re: [RFC PATCH v4 10/11] lib: vdso: Allow arches to override the ns shift operation To: Thomas Gleixner , Andy Lutomirski References: <877e1rfa40.fsf@nanos.tec.linutronix.de> <87mua64tv0.fsf@nanos.tec.linutronix.de> From: Christophe Leroy Message-ID: <1329105a-aa6b-bd40-3a62-5c7e130d2a7b@c-s.fr> Date: Wed, 29 Jan 2020 08:26:39 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.4.2 MIME-Version: 1.0 In-Reply-To: <87mua64tv0.fsf@nanos.tec.linutronix.de> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: fr Content-Transfer-Encoding: 8bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nathanl@linux.ibm.com, Arnd Bergmann , X86 ML , LKML , "open list:MIPS" , Paul Mackerras , Vincenzo Frascino , linuxppc-dev , linux-arm-kernel Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Le 29/01/2020 à 08:14, Thomas Gleixner a écrit : > Andy Lutomirski writes: > >> On Thu, Jan 16, 2020 at 11:57 AM Thomas Gleixner wrote: >>> >>> Andy Lutomirski writes: >>>> On Thu, Jan 16, 2020 at 9:58 AM Christophe Leroy >>>> >>>> Would mul_u64_u64_shr() be a good alternative? Could we adjust it to >>>> assume the shift is less than 32? That function exists to benefit >>>> 32-bit arches. >>> >>> We'd want mul_u64_u32_shr() for this. The rules for mult and shift are: >>> >> >> That's what I meant to type... > > Just that it does not work. The math is: > > ns = d->nsecs; // That's the nsec value shifted left by d->shift > > ns += ((cur - d->last) & d->mask) * mult; > > ns >>= d->shift; > > So we cannot use mul_u64_u32_shr() because we need the addition there > before shifting. And no, we can't drop the fractional part of > d->nsecs. Been there, done that, got sporadic time going backwards > problems as a reward. Need to look at that again as stuff has changed > over time. > > On x86 we enforce that mask is 64bit, so the & operation is not there, > but due to the nasties of TSC we have that conditional > > if (cur > last) > return (cur - last) * mult; > return 0; > > Christophe, on PPC the decrementer/RTC clocksource masks are 64bit as > well, so you can spare that & operation there too. > Yes, I did it already. It spares reading d->mast, that the main advantage. Christophe From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=0.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,URIBL_DBL_ABUSE_MALW,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51B13C33CB2 for ; Wed, 29 Jan 2020 07:27:01 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2547E20720 for ; Wed, 29 Jan 2020 07:27:01 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="S/MN7ubT"; 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Wed, 29 Jan 2020 08:26:39 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=c-s.fr; s=mail; t=1580282799; bh=5Fxvw/jc8y//pgWf3Spr5zDn1R4mwLPSzwzdVvG6uYE=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=j/GZoeZ7wNtfHmMjeTo0R1mIA/Jal8yTZuk8S1UKYG452qCeEkzIOsUiHWQUbSUyA xN2AF+i5Dd7yrwJNyYNINzj08Cqz55AfcregSWbEZxjqj7g9/tN/qj4szTYq+Jf9oz itEzCxCoNxR03K2bPrvRD7TAnf0KTL/yWQEVRw14= Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 913908B7FE; Wed, 29 Jan 2020 08:26:40 +0100 (CET) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id FlKTzVgQvj4i; Wed, 29 Jan 2020 08:26:40 +0100 (CET) Received: from [192.168.4.90] (unknown [192.168.4.90]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 88FFC8B768; Wed, 29 Jan 2020 08:26:39 +0100 (CET) Subject: Re: [RFC PATCH v4 10/11] lib: vdso: Allow arches to override the ns shift operation To: Thomas Gleixner , Andy Lutomirski References: <877e1rfa40.fsf@nanos.tec.linutronix.de> <87mua64tv0.fsf@nanos.tec.linutronix.de> From: Christophe Leroy Message-ID: <1329105a-aa6b-bd40-3a62-5c7e130d2a7b@c-s.fr> Date: Wed, 29 Jan 2020 08:26:39 +0100 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.4.2 MIME-Version: 1.0 In-Reply-To: <87mua64tv0.fsf@nanos.tec.linutronix.de> Content-Language: fr X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200128_232653_962844_2446B9A1 X-CRM114-Status: GOOD ( 13.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: nathanl@linux.ibm.com, Arnd Bergmann , Benjamin Herrenschmidt , X86 ML , LKML , "open list:MIPS" , Paul Mackerras , Michael Ellerman , Vincenzo Frascino , linuxppc-dev , linux-arm-kernel Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org CgpMZSAyOS8wMS8yMDIwIMOgIDA4OjE0LCBUaG9tYXMgR2xlaXhuZXIgYSDDqWNyaXTCoDoKPiBB bmR5IEx1dG9taXJza2kgPGx1dG9Aa2VybmVsLm9yZz4gd3JpdGVzOgo+IAo+PiBPbiBUaHUsIEph biAxNiwgMjAyMCBhdCAxMTo1NyBBTSBUaG9tYXMgR2xlaXhuZXIgPHRnbHhAbGludXRyb25peC5k ZT4gd3JvdGU6Cj4+Pgo+Pj4gQW5keSBMdXRvbWlyc2tpIDxsdXRvQGtlcm5lbC5vcmc+IHdyaXRl czoKPj4+PiBPbiBUaHUsIEphbiAxNiwgMjAyMCBhdCA5OjU4IEFNIENocmlzdG9waGUgTGVyb3kK Pj4+Pgo+Pj4+IFdvdWxkIG11bF91NjRfdTY0X3NocigpIGJlIGEgZ29vZCBhbHRlcm5hdGl2ZT8g IENvdWxkIHdlIGFkanVzdCBpdCB0bwo+Pj4+IGFzc3VtZSB0aGUgc2hpZnQgaXMgbGVzcyB0aGFu IDMyPyAgVGhhdCBmdW5jdGlvbiBleGlzdHMgdG8gYmVuZWZpdAo+Pj4+IDMyLWJpdCBhcmNoZXMu Cj4+Pgo+Pj4gV2UnZCB3YW50IG11bF91NjRfdTMyX3NocigpIGZvciB0aGlzLiBUaGUgcnVsZXMg Zm9yIG11bHQgYW5kIHNoaWZ0IGFyZToKPj4+Cj4+Cj4+IFRoYXQncyB3aGF0IEkgbWVhbnQgdG8g dHlwZS4uLgo+IAo+IEp1c3QgdGhhdCBpdCBkb2VzIG5vdCB3b3JrLiBUaGUgbWF0aCBpczoKPiAK PiAgICAgICBucyA9IGQtPm5zZWNzOyAgIC8vIFRoYXQncyB0aGUgbnNlYyB2YWx1ZSBzaGlmdGVk IGxlZnQgYnkgZC0+c2hpZnQKPiAKPiAgICAgICBucyArPSAoKGN1ciAtIGQtPmxhc3QpICYgZC0+ bWFzaykgKiBtdWx0Owo+IAo+ICAgICAgIG5zID4+PSBkLT5zaGlmdDsKPiAKPiBTbyB3ZSBjYW5u b3QgdXNlIG11bF91NjRfdTMyX3NocigpIGJlY2F1c2Ugd2UgbmVlZCB0aGUgYWRkaXRpb24gdGhl cmUKPiBiZWZvcmUgc2hpZnRpbmcuIEFuZCBubywgd2UgY2FuJ3QgZHJvcCB0aGUgZnJhY3Rpb25h bCBwYXJ0IG9mCj4gZC0+bnNlY3MuIEJlZW4gdGhlcmUsIGRvbmUgdGhhdCwgZ290IHNwb3JhZGlj IHRpbWUgZ29pbmcgYmFja3dhcmRzCj4gcHJvYmxlbXMgYXMgYSByZXdhcmQuIE5lZWQgdG8gbG9v ayBhdCB0aGF0IGFnYWluIGFzIHN0dWZmIGhhcyBjaGFuZ2VkCj4gb3ZlciB0aW1lLgo+IAo+IE9u IHg4NiB3ZSBlbmZvcmNlIHRoYXQgbWFzayBpcyA2NGJpdCwgc28gdGhlICYgb3BlcmF0aW9uIGlz IG5vdCB0aGVyZSwKPiBidXQgZHVlIHRvIHRoZSBuYXN0aWVzIG9mIFRTQyB3ZSBoYXZlIHRoYXQg Y29uZGl0aW9uYWwKPiAKPiAgICAgIGlmIChjdXIgPiBsYXN0KQo+ICAgICAgICAgcmV0dXJuIChj dXIgLSBsYXN0KSAqIG11bHQ7Cj4gICAgICByZXR1cm4gMDsKPiAKPiBDaHJpc3RvcGhlLCBvbiBQ UEMgdGhlIGRlY3JlbWVudGVyL1JUQyBjbG9ja3NvdXJjZSBtYXNrcyBhcmUgNjRiaXQgYXMKPiB3 ZWxsLCBzbyB5b3UgY2FuIHNwYXJlIHRoYXQgJiBvcGVyYXRpb24gdGhlcmUgdG9vLgo+IAoKWWVz LCBJIGRpZCBpdCBhbHJlYWR5LiBJdCBzcGFyZXMgcmVhZGluZyBkLT5tYXN0LCB0aGF0IHRoZSBt YWluIGFkdmFudGFnZS4KCkNocmlzdG9waGUKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fCmxpbnV4LWFybS1rZXJuZWwgbWFpbGluZyBsaXN0CmxpbnV4LWFy bS1rZXJuZWxAbGlzdHMuaW5mcmFkZWFkLm9yZwpodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9t YWlsbWFuL2xpc3RpbmZvL2xpbnV4LWFybS1rZXJuZWwK