From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:55479) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6C46-0008Mo-UE for qemu-devel@nongnu.org; Fri, 09 Mar 2012 21:29:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S6C3u-0001TV-7o for qemu-devel@nongnu.org; Fri, 09 Mar 2012 21:29:50 -0500 Received: from cantor2.suse.de ([195.135.220.15]:39846 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6C3t-0001Sz-V2 for qemu-devel@nongnu.org; Fri, 09 Mar 2012 21:29:38 -0500 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id D51298FFEB for ; Sat, 10 Mar 2012 03:29:36 +0100 (CET) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sat, 10 Mar 2012 03:27:59 +0100 Message-Id: <1331346496-10736-28-git-send-email-afaerber@suse.de> In-Reply-To: <1331346496-10736-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331346496-10736-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH RFC v4 27/44] arm-semi: Don't use CPUState List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= Scripted conversion: sed -i "s/CPUState/CPUARMState/g" arm-semi.c Signed-off-by: Andreas F=C3=A4rber --- arm-semi.c | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arm-semi.c b/arm-semi.c index 873518a..8debd19 100644 --- a/arm-semi.c +++ b/arm-semi.c @@ -108,7 +108,7 @@ static inline uint32_t set_swi_errno(TaskState *ts, u= int32_t code) return code; } #else -static inline uint32_t set_swi_errno(CPUState *env, uint32_t code) +static inline uint32_t set_swi_errno(CPUARMState *env, uint32_t code) { return code; } @@ -122,7 +122,7 @@ static target_ulong arm_semi_syscall_len; static target_ulong syscall_err; #endif =20 -static void arm_semi_cb(CPUState *env, target_ulong ret, target_ulong er= r) +static void arm_semi_cb(CPUARMState *env, target_ulong ret, target_ulong= err) { #ifdef CONFIG_USER_ONLY TaskState *ts =3D env->opaque; @@ -152,7 +152,7 @@ static void arm_semi_cb(CPUState *env, target_ulong r= et, target_ulong err) } } =20 -static void arm_semi_flen_cb(CPUState *env, target_ulong ret, target_ulo= ng err) +static void arm_semi_flen_cb(CPUARMState *env, target_ulong ret, target_= ulong err) { /* The size is always stored in big-endian order, extract the value. We assume the size always fit in 32 bits. */ @@ -174,7 +174,7 @@ static void arm_semi_flen_cb(CPUState *env, target_ul= ong ret, target_ulong err) __arg; \ }) #define SET_ARG(n, val) put_user_ual(val, args + (n) * 4) -uint32_t do_arm_semihosting(CPUState *env) +uint32_t do_arm_semihosting(CPUARMState *env) { target_ulong args; char * s; @@ -184,7 +184,7 @@ uint32_t do_arm_semihosting(CPUState *env) #ifdef CONFIG_USER_ONLY TaskState *ts =3D env->opaque; #else - CPUState *ts =3D env; + CPUARMState *ts =3D env; #endif =20 nr =3D env->regs[0]; --=20 1.7.7