From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:55454) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6C46-0008KX-6n for qemu-devel@nongnu.org; Fri, 09 Mar 2012 21:30:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S6C3i-0001Ps-R2 for qemu-devel@nongnu.org; Fri, 09 Mar 2012 21:29:49 -0500 Received: from cantor2.suse.de ([195.135.220.15]:39827 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6C3i-0001PN-LH for qemu-devel@nongnu.org; Fri, 09 Mar 2012 21:29:26 -0500 Received: from relay2.suse.de (unknown [195.135.220.254]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by mx2.suse.de (Postfix) with ESMTP id 8B14A8FC92 for ; Sat, 10 Mar 2012 03:29:25 +0100 (CET) From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sat, 10 Mar 2012 03:27:40 +0100 Message-Id: <1331346496-10736-9-git-send-email-afaerber@suse.de> In-Reply-To: <1331346496-10736-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331346496-10736-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH RFC v4 08/44] target-unicore32: Rename to CPUUniCore32State List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: =?UTF-8?q?Andreas=20F=C3=A4rber?= This aids in refactoring CPUState by adopting the common naming scheme. Signed-off-by: Andreas F=C3=A4rber --- target-unicore32/cpu.h | 8 ++++---- 1 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h index f725634..923db05 100644 --- a/target-unicore32/cpu.h +++ b/target-unicore32/cpu.h @@ -18,7 +18,7 @@ =20 #define ELF_MACHINE EM_UNICORE32 =20 -#define CPUState struct CPUState_UniCore32 +#define CPUState struct CPUUniCore32State =20 #include "config.h" #include "qemu-common.h" @@ -27,7 +27,7 @@ =20 #define NB_MMU_MODES 2 =20 -typedef struct CPUState_UniCore32 { +typedef struct CPUUniCore32State { /* Regs for current mode. */ uint32_t regs[32]; /* Frequently accessed ASR bits are stored separately for efficientl= y. @@ -71,7 +71,7 @@ typedef struct CPUState_UniCore32 { /* Internal CPU feature flags. */ uint32_t features; =20 -} CPUState_UniCore32; +} CPUUniCore32State; =20 #define ASR_M (0x1f) #define ASR_MODE_USER (0x10) @@ -179,7 +179,7 @@ static inline void cpu_get_tb_cpu_state(CPUState *env= , target_ulong *pc, =20 void uc32_translate_init(void); void do_interrupt(CPUState *); -void switch_mode(CPUState_UniCore32 *, int); +void switch_mode(CPUUniCore32State *, int); =20 static inline bool cpu_has_work(CPUState *env) { --=20 1.7.7