From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:41506) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6PYV-0006I7-4o for qemu-devel@nongnu.org; Sat, 10 Mar 2012 11:54:08 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S6PYQ-0001OL-Gn for qemu-devel@nongnu.org; Sat, 10 Mar 2012 11:54:06 -0500 Received: from cantor2.suse.de ([195.135.220.15]:42612 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6PYQ-0001O4-6m for qemu-devel@nongnu.org; Sat, 10 Mar 2012 11:54:02 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sat, 10 Mar 2012 17:53:36 +0100 Message-Id: <1331398436-20761-1-git-send-email-afaerber@suse.de> In-Reply-To: <1330893156-26569-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH RFC v4 00/20] QOM'ify ARM CPU List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Anthony Liguori , Paul Brook Hello, Since the ARM target lately has been the target with the highest rate of = changes, let's convert it first, as a proof of concept. Especially its reset handl= er can be greatly simplified through QOM. Patch 1 is a RESEND of object_class_get_list() v2. Needed for virtually e= very target. Patch 2 moves the CPUID lookup to ARMCPUClass. Patch 3 integrates legacy CPUARMState into ARMCPU. Patches 5-17 step by step move CPUID-dependent initializations to CPU-spe= cific code. Patch 6 is a proof of concept for CPUState -> CPU lookup. (NEW:) Patch 18 adds CPU properties to manipulate parts of the CPUID (MIDR). Patch 19 uses them to drop CPU classes that differ only by variant and re= vision. Patch 20 adds a "/cpu" property for -M integratorcp (a single-CPU board f= or which we have a test image on qemu.org) to allow inspection of CPU properties o= ver QMP. Available at: http://repo.or.cz/w/qemu/afaerber.git/shortlog/refs/heads/qom-cpu-arm.v4 Regards, Andreas Cc: Anthony Liguori Cc: Peter Maydell Cc: Paul Brook Cc: Andrzej Zaborowski v3 -> v4: * Rebased on top of type_init() v2, object_class_get_list() v2, qom-cpu v= 4. * Rename cpu-core.h to cpu-qom.h. While the term "ARM core" is quite comm= on, it is less so for other architectures like s390x so use a neutral term. * Use container_of() for CPUState -> CPU macros (suggested by Anthony). * Rework arm_env_get_object() -> arm_env_get_cpu(), avoids some casts (suggested by Anthony). Also rename ENV_GET_OBJECT() -> ENV_GET_CPU(). * Sort -cpu ? list. * Use object_class_get_list() and sort ourselves rather than using object_class_foreach_ordered() with callbacks (suggested by Anthony). * Drop ARMCPUClass jtag_id since it turned out unneeded in QEMU (Peter+An= drzej). * Drop experimental "halted" property since that should be in common code= . * Introduce "cpuid-variant" and "cpuid-revision" properties. * Use CPU properties to drop unneeded pxa270-* classes. * Move "/cpu" child property to integratorcp machine. v2 -> v3: * Rebased against qom-upstream.14 branch (and that against master). * Rename target-arm/cpu-core.c to cpu.c now that we no longer need VPATH. * Leave cpu-core.h as is to separate from legacy cpu.h. * Fix -cpu alias "pxa270": handled in cpu_arm_init(). * Use proper GPL headers. * Start removing CPUID uses in cpu_reset_model_id() and cpu.h. * Fully convert cpu_reset_model_id() to ARMCPUInfo or per-model code. * Experiment with adding properties ("halted"). * For testing, add a "/cpu" child property (HACK). v1 -> v2: * Cherry-pick Anthony's object_class_foreach() patch. * Fix ARMCPUClass type name (arm-cpu-core -> arm-cpu). * Add documentation. * Rename ARMCPUDef to ARMCPUInfo. * Use a C99-style table for initializing the classes through class_data instead of individual class_init functions (suggested by Anthony). * Prepare reset callback. * Make ENV_GET_OBJECT() use an inline function for readability. * Invoke the CPU's reset method from cpu_reset(). * Do feature initialization via table where sensible. * Add feature flags to ARMCPU as well (suggested by PMM for future tweaki= ng, also simplifies load/save a bit) and initialize them from ARMCPUClass. * Make feature inference work for ARMCPU as well by not passing the ARMCP= UClass. Use function-local macros to avoid the ugliness of deferencing the feat= ures pointer. Andreas F=C3=A4rber (20): qom: Introduce object_class_get_list() target-arm: Introduce QOM ARMCPUClass target-arm: Embed CPUARMState in QOM ARMCPU target-arm: Prepare model-specific class_init function target-arm: Overwrite reset handler for ti925t target-arm: Move CPU feature flags out of CPUState target-arm: No longer abort on unhandled CPUIDs on reset target-arm: Store cp15 c0_c1 and c0_c2 in ARMCPUClass target-arm: Store CTR in ARMCPUClass target-arm: Store SCTLR in ARMCPUClass target-arm: Drop JTAG_ID documentation target-arm: Move the PXA270's iwMMXt reset to pxa270_reset() target-arm: Store VFP FPSID register in ARMCPUClass target-arm: Store VFP MVFR0 and MVFR1 in ARMCPUClass target-arm: Store CLIDR in ARMCPUClass target-arm: Store CCSIDRs in ARMCPUClass target-arm: Kill off cpu_reset_model_id() target-arm: Add cpuid-{variant,revision} properties to CPU target-arm: Simplify pxa270 CPU classes hw/integratorcp: Add child property for CPU Makefile.target | 1 + hw/integratorcp.c | 3 + include/qemu/object.h | 11 + qom/object.c | 17 ++ target-arm/cpu-qom.h | 98 ++++++++ target-arm/cpu.c | 643 +++++++++++++++++++++++++++++++++++++++++++= ++++++ target-arm/cpu.h | 27 +-- target-arm/helper.c | 471 ++++++------------------------------ target-arm/machine.c | 6 +- 9 files changed, 851 insertions(+), 426 deletions(-) create mode 100644 target-arm/cpu-qom.h create mode 100644 target-arm/cpu.c --=20 1.7.7