From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:41736) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6PYq-0007Lx-KD for qemu-devel@nongnu.org; Sat, 10 Mar 2012 11:54:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S6PYW-0001Ta-Hc for qemu-devel@nongnu.org; Sat, 10 Mar 2012 11:54:28 -0500 Received: from cantor2.suse.de ([195.135.220.15]:42651 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6PYW-0001Sw-8k for qemu-devel@nongnu.org; Sat, 10 Mar 2012 11:54:08 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sat, 10 Mar 2012 17:53:47 +0100 Message-Id: <1331398436-20761-12-git-send-email-afaerber@suse.de> In-Reply-To: <1331398436-20761-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331398436-20761-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH RFC v4 11/20] target-arm: Drop JTAG_ID documentation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook None of the machines in QEMU offer a JTAG debug interface, so this info was unused. Further, the PXA250 ID contradicts the February 2002 Developer's Manual, which has it as 0xn9264013 with n the MIDR Revision. Signed-off-by: Andreas F=C3=A4rber Cc: Peter Maydell Cc: Andrzej Zaborowski --- target-arm/cpu.h | 5 ----- target-arm/helper.c | 8 -------- 2 files changed, 0 insertions(+), 13 deletions(-) diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 66e62e2..d7e73d8 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -406,11 +406,6 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum, #define ARM_CPUID_ARM926 0x41069265 #define ARM_CPUID_TI915T 0x54029152 #define ARM_CPUID_TI925T 0x54029252 -#define ARM_CPUID_PXA250 0x69052100 -#define ARM_CPUID_PXA255 0x69052d00 -#define ARM_CPUID_PXA260 0x69052903 -#define ARM_CPUID_PXA261 0x69052d05 -#define ARM_CPUID_PXA262 0x69052d06 #define ARM_CPUID_PXA270_A0 0x69054110 #define ARM_CPUID_PXA270_A1 0x69054111 #define ARM_CPUID_PXA270_B0 0x69054112 diff --git a/target-arm/helper.c b/target-arm/helper.c index 548d8cf..46e9dc5 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -71,20 +71,12 @@ static void cpu_reset_model_id(CPUARMState *env, uint= 32_t id) env->cp15.c15_i_max =3D 0x000; env->cp15.c15_i_min =3D 0xff0; break; - case ARM_CPUID_PXA250: - case ARM_CPUID_PXA255: - case ARM_CPUID_PXA260: - case ARM_CPUID_PXA261: - case ARM_CPUID_PXA262: - /* JTAG_ID is ((id << 28) | 0x09265013) */ - break; case ARM_CPUID_PXA270_A0: case ARM_CPUID_PXA270_A1: case ARM_CPUID_PXA270_B0: case ARM_CPUID_PXA270_B1: case ARM_CPUID_PXA270_C0: case ARM_CPUID_PXA270_C5: - /* JTAG_ID is ((id << 28) | 0x09265013) */ env->iwmmxt.cregs[ARM_IWMMXT_wCID] =3D 0x69051000 | 'Q'; break; default: --=20 1.7.7