From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:41634) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6PYc-0006di-Og for qemu-devel@nongnu.org; Sat, 10 Mar 2012 11:54:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S6PYZ-0001Vb-Ps for qemu-devel@nongnu.org; Sat, 10 Mar 2012 11:54:14 -0500 Received: from cantor2.suse.de ([195.135.220.15]:42672 helo=mx2.suse.de) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S6PYZ-0001UR-GO for qemu-devel@nongnu.org; Sat, 10 Mar 2012 11:54:11 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Sat, 10 Mar 2012 17:53:53 +0100 Message-Id: <1331398436-20761-18-git-send-email-afaerber@suse.de> In-Reply-To: <1331398436-20761-1-git-send-email-afaerber@suse.de> References: <1330893156-26569-1-git-send-email-afaerber@suse.de> <1331398436-20761-1-git-send-email-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH RFC v4 17/20] target-arm: Kill off cpu_reset_model_id() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Paul Brook Move last remaining TI925T bits to ti925t_reset(). This reduces cpu_state_reset() to triviality and lets us reset the CPU directly from arm_cpu_initfn(). Signed-off-by: Andreas F=C3=A4rber Cc: Peter Maydell --- target-arm/cpu.c | 4 ++++ target-arm/helper.c | 20 -------------------- 2 files changed, 4 insertions(+), 20 deletions(-) diff --git a/target-arm/cpu.c b/target-arm/cpu.c index 9f571a1..8917a20 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -217,6 +217,8 @@ static void ti925t_reset(CPUState *c) arm_cpu_reset(c); =20 env->cp15.c0_cpuid =3D ARM_CPUID_TI925T; /* Depends on wiring. */ + env->cp15.c15_i_max =3D 0x000; + env->cp15.c15_i_min =3D 0xff0; } =20 static void ti925t_class_init(ARMCPUClass *klass, const ARMCPUInfo *info= ) @@ -550,6 +552,8 @@ static void arm_cpu_initfn(Object *obj) =20 cpu->env.cpu_model_str =3D object_get_typename(obj); cpu->env.cp15.c0_cpuid =3D cpu_class->cp15.c0_cpuid; + + cpu_reset(CPU(cpu)); } =20 static void arm_cpu_class_init(ObjectClass *klass, void *data) diff --git a/target-arm/helper.c b/target-arm/helper.c index ba8a4ae..2d6331d 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -5,28 +5,9 @@ #include "sysemu.h" #include "cpu-qom.h" =20 -static void cpu_reset_model_id(CPUARMState *env, uint32_t id) -{ - switch (id) { - case ARM_CPUID_TI915T: - case ARM_CPUID_TI925T: - env->cp15.c15_i_max =3D 0x000; - env->cp15.c15_i_min =3D 0xff0; - break; - default: - break; - } -} - void cpu_state_reset(CPUARMState *env) { - uint32_t id; - cpu_reset(ENV_GET_CPU(env)); - - id =3D env->cp15.c0_cpuid; - if (id) - cpu_reset_model_id(env, id); } =20 static int vfp_gdb_get_reg(CPUARMState *env, uint8_t *buf, int reg) @@ -105,7 +86,6 @@ CPUARMState *cpu_arm_init(const char *cpu_model) arm_translate_init(); } =20 - cpu_state_reset(env); if (arm_feature(env, ARM_FEATURE_NEON)) { gdb_register_coprocessor(env, vfp_gdb_get_reg, vfp_gdb_set_reg, 51, "arm-neon.xml", 0); --=20 1.7.7